mirror of
https://github.com/Bodmer/TFT_eSPI.git
synced 2025-07-31 03:07:33 +02:00
ESP32 board package compatibility update
This commit is contained in:
@ -11,7 +11,10 @@
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// Get the screen touch coordinates, returns true if screen has been touched
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// Get the screen touch coordinates, returns true if screen has been touched
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// if the touch coordinates are off screen then x and y are not updated
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// if the touch coordinates are off screen then x and y are not updated
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// The returned value can be treated as a bool type, false or 0 means touch not detected
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// The returned value can be treated as a bool type, false or 0 means touch not detected
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// In future the function may return an 8 "quality" (jitter) value.
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// In future the function may return an 8-bit "quality" (jitter) value.
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// The threshold value is optional, this must be higher than the bias level for z (pressure)
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// reported by Test_Touch_Controller when the screen is NOT touched. When touched the z value
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// must be higher than the threshold for a touch to be detected.
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uint8_t getTouch(uint16_t *x, uint16_t *y, uint16_t threshold = 600);
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uint8_t getTouch(uint16_t *x, uint16_t *y, uint16_t threshold = 600);
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// Run screen calibration and test, report calibration values to the serial port
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// Run screen calibration and test, report calibration values to the serial port
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@ -806,6 +806,10 @@ bool TFT_eSPI::initDMA(bool ctrl_cs)
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.sclk_io_num = TFT_SCLK,
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.sclk_io_num = TFT_SCLK,
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.quadwp_io_num = -1,
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.quadwp_io_num = -1,
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.quadhd_io_num = -1,
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.quadhd_io_num = -1,
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.data4_io_num = -1,
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.data5_io_num = -1,
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.data6_io_num = -1,
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.data7_io_num = -1,
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.max_transfer_sz = TFT_WIDTH * TFT_HEIGHT * 2 + 8, // TFT screen size
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.max_transfer_sz = TFT_WIDTH * TFT_HEIGHT * 2 + 8, // TFT screen size
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.flags = 0,
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.flags = 0,
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.intr_flags = 0
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.intr_flags = 0
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@ -843,6 +843,10 @@ bool TFT_eSPI::initDMA(bool ctrl_cs)
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.sclk_io_num = TFT_SCLK,
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.sclk_io_num = TFT_SCLK,
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.quadwp_io_num = -1,
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.quadwp_io_num = -1,
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.quadhd_io_num = -1,
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.quadhd_io_num = -1,
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.data4_io_num = -1,
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.data5_io_num = -1,
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.data6_io_num = -1,
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.data7_io_num = -1,
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.max_transfer_sz = 65536, // ESP32 S3 max size is 64Kbytes
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.max_transfer_sz = 65536, // ESP32 S3 max size is 64Kbytes
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.flags = 0,
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.flags = 0,
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.intr_flags = 0
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.intr_flags = 0
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@ -14,6 +14,15 @@
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#define TFT_NOP 0x00
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#define TFT_NOP 0x00
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#define TFT_SWRST 0x01
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#define TFT_SWRST 0x01
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#define TFT_SLPIN 0x10
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#define TFT_SLPOUT 0x11
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#define TFT_INVOFF 0x20
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#define TFT_INVON 0x21
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#define TFT_DISPOFF 0x28
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#define TFT_DISPON 0x29
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#define TFT_CASET 0x2A
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#define TFT_CASET 0x2A
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#define TFT_PASET 0x2B
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#define TFT_PASET 0x2B
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#define TFT_RAMWR 0x2C
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#define TFT_RAMWR 0x2C
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@ -29,6 +38,3 @@
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#define TFT_MAD_BGR 0x08
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#define TFT_MAD_BGR 0x08
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#define TFT_MAD_MH 0x04
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#define TFT_MAD_MH 0x04
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#define TFT_MAD_RGB 0x00
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#define TFT_MAD_RGB 0x00
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#define TFT_INVOFF 0x20
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#define TFT_INVON 0x21
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@ -42,6 +42,12 @@
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#define TFT_NOP 0x00
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#define TFT_NOP 0x00
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#define TFT_SWRST 0x01
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#define TFT_SWRST 0x01
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#define TFT_INVOFF 0x20
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#define TFT_INVON 0x21
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#define TFT_DISPOFF 0x28
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#define TFT_DISPON 0x29
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#define TFT_CASET 0x2A
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#define TFT_CASET 0x2A
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#define TFT_PASET 0x2B
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#define TFT_PASET 0x2B
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#define TFT_RAMWR 0x2C
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#define TFT_RAMWR 0x2C
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@ -57,6 +63,3 @@
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#define TFT_MAD_BGR 0x08
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#define TFT_MAD_BGR 0x08
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#define TFT_MAD_MH 0x04
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#define TFT_MAD_MH 0x04
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#define TFT_MAD_RGB 0x00
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#define TFT_MAD_RGB 0x00
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#define TFT_INVOFF 0x20
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#define TFT_INVON 0x21
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@ -40,6 +40,12 @@
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#define TFT_NOP 0x00
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#define TFT_NOP 0x00
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#define TFT_SWRST 0x01
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#define TFT_SWRST 0x01
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#define TFT_INVOFF 0x20
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#define TFT_INVON 0x21
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#define TFT_DISPOFF 0x28
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#define TFT_DISPON 0x29
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#define TFT_CASET 0x2A
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#define TFT_CASET 0x2A
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#define TFT_PASET 0x2B
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#define TFT_PASET 0x2B
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#define TFT_RAMWR 0x2C
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#define TFT_RAMWR 0x2C
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@ -66,10 +72,6 @@
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#define TFT_MAD_COLOR_ORDER TFT_MAD_BGR
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#define TFT_MAD_COLOR_ORDER TFT_MAD_BGR
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#endif
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#endif
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#define TFT_INVOFF 0x20
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#define TFT_INVON 0x21
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// All ILI9341 specific commands some are used by init()
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// All ILI9341 specific commands some are used by init()
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#define ILI9341_NOP 0x00
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#define ILI9341_NOP 0x00
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#define ILI9341_SWRESET 0x01
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#define ILI9341_SWRESET 0x01
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@ -39,6 +39,12 @@
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#define TFT_NOP 0x00
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#define TFT_NOP 0x00
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#define TFT_SWRST 0x01
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#define TFT_SWRST 0x01
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#define TFT_INVOFF 0x20
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#define TFT_INVON 0x21
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#define TFT_DISPOFF 0x28
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#define TFT_DISPON 0x29
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#define TFT_CASET 0x2A
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#define TFT_CASET 0x2A
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#define TFT_PASET 0x2B
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#define TFT_PASET 0x2B
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#define TFT_RAMWR 0x2C
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#define TFT_RAMWR 0x2C
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@ -56,6 +62,3 @@
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#define TFT_MAD_SS 0x02
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#define TFT_MAD_SS 0x02
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#define TFT_MAD_GS 0x01
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#define TFT_MAD_GS 0x01
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#define TFT_MAD_RGB 0x00
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#define TFT_MAD_RGB 0x00
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#define TFT_INVOFF 0x20
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#define TFT_INVON 0x21
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@ -17,6 +17,12 @@
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#define TFT_NOP 0x0000
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#define TFT_NOP 0x0000
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#define TFT_SWRST 0x0100
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#define TFT_SWRST 0x0100
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#define TFT_INVOFF 0x2000
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#define TFT_INVON 0x2100
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#define TFT_DISPOFF 0x2800
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#define TFT_DISPON 0x2900
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#define TFT_CASET 0x2A00
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#define TFT_CASET 0x2A00
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#define TFT_PASET 0x2B00
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#define TFT_PASET 0x2B00
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#define TFT_RAMWR 0x2C00
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#define TFT_RAMWR 0x2C00
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@ -44,6 +50,3 @@
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#else
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#else
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#define TFT_MAD_COLOR_ORDER TFT_MAD_RGB
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#define TFT_MAD_COLOR_ORDER TFT_MAD_RGB
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#endif
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#endif
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#define TFT_INVOFF 0x2000
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#define TFT_INVON 0x2100
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@ -35,6 +35,12 @@
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#define TFT_NOP 0x00
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#define TFT_NOP 0x00
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#define TFT_SWRST 0x01
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#define TFT_SWRST 0x01
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#define TFT_INVOFF 0x20
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#define TFT_INVON 0x21
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#define TFT_DISPOFF 0x28
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#define TFT_DISPON 0x29
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#define TFT_CASET 0x2A
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#define TFT_CASET 0x2A
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#define TFT_PASET 0x2B
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#define TFT_PASET 0x2B
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#define TFT_RAMWR 0x2C
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#define TFT_RAMWR 0x2C
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@ -50,6 +56,3 @@
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#define TFT_MAD_BGR 0x08
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#define TFT_MAD_BGR 0x08
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#define TFT_MAD_MH 0x04
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#define TFT_MAD_MH 0x04
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#define TFT_MAD_RGB 0x00
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#define TFT_MAD_RGB 0x00
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#define TFT_INVOFF 0x20
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#define TFT_INVON 0x21
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@ -26,6 +26,12 @@
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#define TFT_NOP 0x00
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#define TFT_NOP 0x00
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#define TFT_SWRST 0x01
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#define TFT_SWRST 0x01
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#define TFT_INVOFF 0x20
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#define TFT_INVON 0x21
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#define TFT_DISPOFF 0x28
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#define TFT_DISPON 0x29
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#define TFT_CASET 0x2A
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#define TFT_CASET 0x2A
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#define TFT_PASET 0x2B
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#define TFT_PASET 0x2B
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#define TFT_RAMWR 0x2C
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#define TFT_RAMWR 0x2C
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@ -51,6 +57,3 @@
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#else
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#else
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#define TFT_MAD_COLOR_ORDER TFT_MAD_BGR
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#define TFT_MAD_COLOR_ORDER TFT_MAD_BGR
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#endif
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#endif
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#define TFT_INVOFF 0x20
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#define TFT_INVON 0x21
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@ -12,6 +12,12 @@
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#define TFT_NOP 0x00
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#define TFT_NOP 0x00
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#define TFT_SWRST 0x01
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#define TFT_SWRST 0x01
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#define TFT_INVOFF 0x20
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#define TFT_INVON 0x21
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#define TFT_DISPOFF 0x28
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#define TFT_DISPON 0x29
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#define TFT_CASET 0x2A
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#define TFT_CASET 0x2A
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#define TFT_PASET 0x2B
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#define TFT_PASET 0x2B
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#define TFT_RAMWR 0x2C
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#define TFT_RAMWR 0x2C
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@ -36,10 +42,6 @@
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#define TFT_MAD_COLOR_ORDER TFT_MAD_BGR
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#define TFT_MAD_COLOR_ORDER TFT_MAD_BGR
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#endif
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#endif
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#define TFT_INVOFF 0x20
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#define TFT_INVON 0x21
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// ST7796 specific commands
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// ST7796 specific commands
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#define ST7796_NOP 0x00
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#define ST7796_NOP 0x00
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#define ST7796_SWRESET 0x01
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#define ST7796_SWRESET 0x01
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@ -2097,7 +2097,7 @@ void TFT_eSPI::pushMaskedImage(int32_t x, int32_t y, int32_t w, int32_t h, uint1
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if (_vpOoB || w < 1 || h < 1) return;
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if (_vpOoB || w < 1 || h < 1) return;
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// To simplify mask handling the window clipping is done by the pushImage function
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// To simplify mask handling the window clipping is done by the pushImage function
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// Each mask image line assumed to be padded to and integer number of bytes & padding bits are 0
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// Each mask image line assumed to be padded to an integer number of bytes & padding bits are 0
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begin_tft_write();
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begin_tft_write();
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inTransaction = true;
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inTransaction = true;
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@ -4966,7 +4966,10 @@ uint16_t TFT_eSPI::decodeUTF8(uint8_t *buf, uint16_t *index, uint16_t remaining)
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}
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}
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// 21-bit Unicode not supported so fall-back to extended ASCII
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// 21-bit Unicode not supported so fall-back to extended ASCII
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// if ((c & 0xF8) == 0xF0) return c;
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// if (((c & 0xF8) == 0xF0) && (remaining > 3)) {
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// c = ((c & 0x07) << 18) | ((buf[(*index)++] & 0x03F) << 12);
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// c |= ((buf[(*index)++] & 0x3F) << 6);
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// return c | ((buf[(*index)++] & 0x3F));
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return c; // fall-back to extended ASCII
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return c; // fall-back to extended ASCII
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}
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}
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@ -16,7 +16,7 @@
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#ifndef _TFT_eSPIH_
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#ifndef _TFT_eSPIH_
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#define _TFT_eSPIH_
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#define _TFT_eSPIH_
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#define TFT_ESPI_VERSION "2.5.41"
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#define TFT_ESPI_VERSION "2.5.42"
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// Bit level feature flags
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// Bit level feature flags
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// Bit 0 set: viewport capability
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// Bit 0 set: viewport capability
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@ -1,6 +1,6 @@
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{
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{
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"name": "TFT_eSPI",
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"name": "TFT_eSPI",
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"version": "2.5.41",
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"version": "2.5.42",
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"keywords": "Arduino, tft, display, ttgo, LilyPi, WT32-SC01, ePaper, display, Pico, RP2040 Nano Connect, RP2040, STM32, ESP8266, NodeMCU, ESP32, M5Stack, ILI9341, ST7735, ILI9163, S6D02A1, ILI9481, ILI9486, ILI9488, ST7789, ST7796, RM68140, SSD1351, SSD1963, ILI9225, HX8357D, GC9A01, R61581",
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"keywords": "Arduino, tft, display, ttgo, LilyPi, WT32-SC01, ePaper, display, Pico, RP2040 Nano Connect, RP2040, STM32, ESP8266, NodeMCU, ESP32, M5Stack, ILI9341, ST7735, ILI9163, S6D02A1, ILI9481, ILI9486, ILI9488, ST7789, ST7796, RM68140, SSD1351, SSD1963, ILI9225, HX8357D, GC9A01, R61581",
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"description": "A TFT and ePaper (SPI or parallel interface) graphics library with optimisation for Raspberry Pi Pico, RP2040, ESP8266, ESP32 and STM32 processors",
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"description": "A TFT and ePaper (SPI or parallel interface) graphics library with optimisation for Raspberry Pi Pico, RP2040, ESP8266, ESP32 and STM32 processors",
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"repository":
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"repository":
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@ -1,5 +1,5 @@
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name=TFT_eSPI
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name=TFT_eSPI
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version=2.5.41
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version=2.5.42
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author=Bodmer
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author=Bodmer
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maintainer=Bodmer
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maintainer=Bodmer
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sentence=TFT graphics library for Arduino processors with performance optimisation for RP2040, STM32, ESP8266 and ESP32
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sentence=TFT graphics library for Arduino processors with performance optimisation for RP2040, STM32, ESP8266 and ESP32
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