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Allow RP2040 SPI 0 or SPI 1 ports to be used

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Auto set of CGRAM offset for 135 x 240 ST7789 display
This commit is contained in:
Bodmer
2021-12-05 22:34:37 +00:00
parent 12f9ce8691
commit 5959550dd7
11 changed files with 160 additions and 119 deletions
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42
Processors/TFT_eSPI_RP2040.c
View File

@@ -14,7 +14,7 @@
#else #else
// Community RP2040 board package by Earle Philhower // Community RP2040 board package by Earle Philhower
//SPIClass& spi = SPI; // will use board package default pins //SPIClass& spi = SPI; // will use board package default pins
SPIClassRP2040 spi = SPIClassRP2040(spi0, TFT_MISO, -1, TFT_SCLK, TFT_MOSI); SPIClassRP2040 spi = SPIClassRP2040(SPI_X, TFT_MISO, -1, TFT_SCLK, TFT_MOSI);
#endif #endif
#endif #endif
@@ -201,17 +201,17 @@ void TFT_eSPI::pushBlock(uint16_t color, uint32_t len)
uint32_t br = b<<8 | r; uint32_t br = b<<8 | r;
uint32_t gb = g<<8 | b; uint32_t gb = g<<8 | b;
// Must wait before changing to 16 bit // Must wait before changing to 16 bit
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
spi_set_format(spi0, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST); spi_set_format(SPI_X, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST);
while ( len > 1 ) { while ( len > 1 ) {
while (!spi_is_writable(spi0)){}; spi_get_hw(spi0)->dr = rg; while (!spi_is_writable(SPI_X)){}; spi_get_hw(SPI_X)->dr = rg;
while (!spi_is_writable(spi0)){}; spi_get_hw(spi0)->dr = br; while (!spi_is_writable(SPI_X)){}; spi_get_hw(SPI_X)->dr = br;
while (!spi_is_writable(spi0)){}; spi_get_hw(spi0)->dr = gb; while (!spi_is_writable(SPI_X)){}; spi_get_hw(SPI_X)->dr = gb;
len -= 2; len -= 2;
} }
// Must wait before changing back to 8 bit // Must wait before changing back to 8 bit
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
spi_set_format(spi0, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST); spi_set_format(SPI_X, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST);
} }
// Mop up the remaining pixels // Mop up the remaining pixels
@@ -250,8 +250,8 @@ void TFT_eSPI::pushPixels(const void* data_in, uint32_t len){
void TFT_eSPI::pushBlock(uint16_t color, uint32_t len){ void TFT_eSPI::pushBlock(uint16_t color, uint32_t len){
while(len--) while(len--)
{ {
while (!spi_is_writable(spi0)){}; while (!spi_is_writable(SPI_X)){};
spi_get_hw(spi0)->dr = (uint32_t)color; spi_get_hw(SPI_X)->dr = (uint32_t)color;
} }
} }
@@ -264,8 +264,8 @@ void TFT_eSPI::pushPixels(const void* data_in, uint32_t len){
if (_swapBytes) { if (_swapBytes) {
while(len--) while(len--)
{ {
while (!spi_is_writable(spi0)){}; while (!spi_is_writable(SPI_X)){};
spi_get_hw(spi0)->dr = (uint32_t)(*data++); spi_get_hw(SPI_X)->dr = (uint32_t)(*data++);
} }
} }
else else
@@ -274,8 +274,8 @@ void TFT_eSPI::pushPixels(const void* data_in, uint32_t len){
{ {
uint16_t color = *data++; uint16_t color = *data++;
color = color >> 8 | color << 8; color = color >> 8 | color << 8;
while (!spi_is_writable(spi0)){}; while (!spi_is_writable(SPI_X)){};
spi_get_hw(spi0)->dr = (uint32_t)color; spi_get_hw(SPI_X)->dr = (uint32_t)color;
} }
} }
} }
@@ -303,8 +303,8 @@ bool TFT_eSPI::dmaBusy(void) {
if (!DMA_Enabled) return false; if (!DMA_Enabled) return false;
if (dma_channel_is_busy(dma_tx_channel)) return true; if (dma_channel_is_busy(dma_tx_channel)) return true;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
spi_set_format(spi0, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST); spi_set_format(SPI_X, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST);
return false; return false;
} }
@@ -315,8 +315,8 @@ bool TFT_eSPI::dmaBusy(void) {
void TFT_eSPI::dmaWait(void) void TFT_eSPI::dmaWait(void)
{ {
while (dma_channel_is_busy(dma_tx_channel)); while (dma_channel_is_busy(dma_tx_channel));
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
spi_set_format(spi0, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST); spi_set_format(SPI_X, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST);
} }
/*************************************************************************************** /***************************************************************************************
@@ -330,7 +330,7 @@ void TFT_eSPI::pushPixelsDMA(uint16_t* image, uint32_t len)
dmaWait(); dmaWait();
channel_config_set_bswap(&dma_tx_config, !_swapBytes); channel_config_set_bswap(&dma_tx_config, !_swapBytes);
dma_channel_configure(dma_tx_channel, &dma_tx_config, &spi_get_hw(spi0)->dr, (uint16_t*)image, len, true); dma_channel_configure(dma_tx_channel, &dma_tx_config, &spi_get_hw(SPI_X)->dr, (uint16_t*)image, len, true);
} }
/*************************************************************************************** /***************************************************************************************
@@ -378,7 +378,7 @@ void TFT_eSPI::pushImageDMA(int32_t x, int32_t y, int32_t w, int32_t h, uint16_t
setAddrWindow(x, y, dw, dh); setAddrWindow(x, y, dw, dh);
channel_config_set_bswap(&dma_tx_config, !_swapBytes); channel_config_set_bswap(&dma_tx_config, !_swapBytes);
dma_channel_configure(dma_tx_channel, &dma_tx_config, &spi_get_hw(spi0)->dr, (uint16_t*)buffer, len, true); dma_channel_configure(dma_tx_channel, &dma_tx_config, &spi_get_hw(SPI_X)->dr, (uint16_t*)buffer, len, true);
} }
@@ -396,7 +396,7 @@ bool TFT_eSPI::initDMA(bool ctrl_cs)
dma_tx_config = dma_channel_get_default_config(dma_tx_channel); dma_tx_config = dma_channel_get_default_config(dma_tx_channel);
channel_config_set_transfer_data_size(&dma_tx_config, DMA_SIZE_16); channel_config_set_transfer_data_size(&dma_tx_config, DMA_SIZE_16);
channel_config_set_dreq(&dma_tx_config, spi_get_index(spi0) ? DREQ_SPI1_TX : DREQ_SPI0_TX); channel_config_set_dreq(&dma_tx_config, spi_get_index(SPI_X) ? DREQ_SPI1_TX : DREQ_SPI0_TX);
DMA_Enabled = true; DMA_Enabled = true;
return true; return true;

51
Processors/TFT_eSPI_RP2040.h
View File

@@ -17,9 +17,20 @@
// Include processor specific header // Include processor specific header
// None // None
// Use SPI0 as default if not defined
#ifndef TFT_SPI_PORT
#define TFT_SPI_PORT 0
#endif
#if (TFT_SPI_PORT == 0)
#define SPI_X spi0
#else
#define SPI_X spi1
#endif
// Processor specific code used by SPI bus transaction begin/end_tft_write functions // Processor specific code used by SPI bus transaction begin/end_tft_write functions
#define SET_BUS_WRITE_MODE spi_set_format(spi0, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST) #define SET_BUS_WRITE_MODE spi_set_format(SPI_X, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST)
#define SET_BUS_READ_MODE // spi_set_format(spi0, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST) #define SET_BUS_READ_MODE // spi_set_format(SPI_X, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST)
// Code to check if SPI or DMA is busy, used by SPI bus transaction startWrite and/or endWrite functions // Code to check if SPI or DMA is busy, used by SPI bus transaction startWrite and/or endWrite functions
#if !defined(TFT_PARALLEL_8_BIT) && !defined(SPI_18BIT_DRIVER) #if !defined(TFT_PARALLEL_8_BIT) && !defined(SPI_18BIT_DRIVER)
@@ -31,9 +42,9 @@
#endif #endif
// Wait for tx to end, flush rx FIFO, clear rx overrun // Wait for tx to end, flush rx FIFO, clear rx overrun
#define SPI_BUSY_CHECK while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; \ #define SPI_BUSY_CHECK while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {}; \
while (spi_is_readable(spi0)) (void)spi_get_hw(spi0)->dr; \ while (spi_is_readable(SPI_X)) (void)spi_get_hw(SPI_X)->dr; \
spi_get_hw(spi0)->icr = SPI_SSPICR_RORIC_BITS spi_get_hw(SPI_X)->icr = SPI_SSPICR_RORIC_BITS
// To be safe, SUPPORT_TRANSACTIONS is assumed mandatory // To be safe, SUPPORT_TRANSACTIONS is assumed mandatory
#if !defined (SUPPORT_TRANSACTIONS) #if !defined (SUPPORT_TRANSACTIONS)
@@ -123,12 +134,12 @@
#if defined (SPI_18BIT_DRIVER) // SPI 18 bit colour #if defined (SPI_18BIT_DRIVER) // SPI 18 bit colour
// Write 8 bits to TFT // Write 8 bits to TFT
#define tft_Write_8(C) spi_get_hw(spi0)->dr = (uint32_t)(C); \ #define tft_Write_8(C) spi_get_hw(SPI_X)->dr = (uint32_t)(C); \
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; \ while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {}; \
//#define tft_Write_8(C) spi.transfer(C); //#define tft_Write_8(C) spi.transfer(C);
#define tft_Write_8N(B) while (!spi_is_writable(spi0)){}; \ #define tft_Write_8N(B) while (!spi_is_writable(SPI_X)){}; \
spi_get_hw(spi0)->dr = (uint8_t)(B) spi_get_hw(SPI_X)->dr = (uint8_t)(B)
// Convert 16 bit colour to 18 bit and write in 3 bytes // Convert 16 bit colour to 18 bit and write in 3 bytes
#define tft_Write_16(C) tft_Write_8N(((C) & 0xF800)>>8); \ #define tft_Write_16(C) tft_Write_8N(((C) & 0xF800)>>8); \
@@ -191,25 +202,25 @@
#else #else
// This swaps to 8 bit mode, then back to 16 bit mode // This swaps to 8 bit mode, then back to 16 bit mode
#define tft_Write_8(C) while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; \ #define tft_Write_8(C) while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {}; \
spi_set_format(spi0, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST); \ spi_set_format(SPI_X, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST); \
spi_get_hw(spi0)->dr = (uint32_t)(C); \ spi_get_hw(SPI_X)->dr = (uint32_t)(C); \
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; \ while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {}; \
spi_set_format(spi0, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST) spi_set_format(SPI_X, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST)
// Note: the following macros do not wait for the end of transmission // Note: the following macros do not wait for the end of transmission
#define tft_Write_16(C) while (!spi_is_writable(spi0)){}; spi_get_hw(spi0)->dr = (uint32_t)(C) #define tft_Write_16(C) while (!spi_is_writable(SPI_X)){}; spi_get_hw(SPI_X)->dr = (uint32_t)(C)
#define tft_Write_16N(C) while (!spi_is_writable(spi0)){}; spi_get_hw(spi0)->dr = (uint32_t)(C) #define tft_Write_16N(C) while (!spi_is_writable(SPI_X)){}; spi_get_hw(SPI_X)->dr = (uint32_t)(C)
#define tft_Write_16S(C) while (!spi_is_writable(spi0)){}; spi_get_hw(spi0)->dr = (uint32_t)(C)<<8 | (C)>>8 #define tft_Write_16S(C) while (!spi_is_writable(SPI_X)){}; spi_get_hw(SPI_X)->dr = (uint32_t)(C)<<8 | (C)>>8
#define tft_Write_32(C) spi_get_hw(spi0)->dr = (uint32_t)((C)>>16); spi_get_hw(spi0)->dr = (uint32_t)(C) #define tft_Write_32(C) spi_get_hw(SPI_X)->dr = (uint32_t)((C)>>16); spi_get_hw(SPI_X)->dr = (uint32_t)(C)
#define tft_Write_32C(C,D) spi_get_hw(spi0)->dr = (uint32_t)(C); spi_get_hw(spi0)->dr = (uint32_t)(D) #define tft_Write_32C(C,D) spi_get_hw(SPI_X)->dr = (uint32_t)(C); spi_get_hw(SPI_X)->dr = (uint32_t)(D)
#define tft_Write_32D(C) spi_get_hw(spi0)->dr = (uint32_t)(C); spi_get_hw(spi0)->dr = (uint32_t)(C) #define tft_Write_32D(C) spi_get_hw(SPI_X)->dr = (uint32_t)(C); spi_get_hw(SPI_X)->dr = (uint32_t)(C)
#endif // RPI_DISPLAY_TYPE #endif // RPI_DISPLAY_TYPE
#endif #endif

11
TFT_Drivers/ST7789_2_Defines.h
View File

@@ -8,7 +8,16 @@
#endif #endif
#if (TFT_HEIGHT == 240) && (TFT_WIDTH == 240) #if (TFT_HEIGHT == 240) && (TFT_WIDTH == 240)
#define CGRAM_OFFSET #ifndef CGRAM_OFFSET
#define CGRAM_OFFSET
#endif
#endif
// Adafruit 1.44 TFT support
#if (TFT_HEIGHT == 240) && (TFT_WIDTH == 135)
#ifndef CGRAM_OFFSET
#define CGRAM_OFFSET
#endif
#endif #endif
// Delay between some initialisation commands // Delay between some initialisation commands

11
TFT_Drivers/ST7789_Defines.h
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@@ -8,7 +8,16 @@
#endif #endif
#if (TFT_HEIGHT == 240) && (TFT_WIDTH == 240) #if (TFT_HEIGHT == 240) && (TFT_WIDTH == 240)
#define CGRAM_OFFSET #ifndef CGRAM_OFFSET
#define CGRAM_OFFSET
#endif
#endif
// Adafruit 1.44 TFT support
#if (TFT_HEIGHT == 240) && (TFT_WIDTH == 135)
#ifndef CGRAM_OFFSET
#define CGRAM_OFFSET
#endif
#endif #endif
// Delay between some initialisation commands // Delay between some initialisation commands

147
TFT_eSPI.cpp
View File

@@ -3097,42 +3097,42 @@ void TFT_eSPI::setWindow(int32_t x0, int32_t y0, int32_t x1, int32_t y1)
// Temporary solution is to include the RP2040 optimised code here // Temporary solution is to include the RP2040 optimised code here
#if defined(ARDUINO_ARCH_RP2040) && !defined(TFT_PARALLEL_8BIT) #if defined(ARDUINO_ARCH_RP2040) && !defined(TFT_PARALLEL_8BIT)
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_C; DC_C;
#if !defined (SPI_18BIT_DRIVER) #if !defined (SPI_18BIT_DRIVER)
#if defined (RPI_DISPLAY_TYPE) // RPi TFT type always needs 16 bit transfers #if defined (RPI_DISPLAY_TYPE) // RPi TFT type always needs 16 bit transfers
spi_set_format(spi0, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST); spi_set_format(SPI_X, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST);
#else #else
spi_set_format(spi0, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST); spi_set_format(SPI_X, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST);
#endif #endif
#endif #endif
spi_get_hw(spi0)->dr = (uint32_t)TFT_CASET; spi_get_hw(SPI_X)->dr = (uint32_t)TFT_CASET;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_D; DC_D;
spi_get_hw(spi0)->dr = (uint32_t)x0>>8; spi_get_hw(SPI_X)->dr = (uint32_t)x0>>8;
spi_get_hw(spi0)->dr = (uint32_t)x0; spi_get_hw(SPI_X)->dr = (uint32_t)x0;
spi_get_hw(spi0)->dr = (uint32_t)x1>>8; spi_get_hw(SPI_X)->dr = (uint32_t)x1>>8;
spi_get_hw(spi0)->dr = (uint32_t)x1; spi_get_hw(SPI_X)->dr = (uint32_t)x1;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_C; DC_C;
spi_get_hw(spi0)->dr = (uint32_t)TFT_PASET; spi_get_hw(SPI_X)->dr = (uint32_t)TFT_PASET;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_D; DC_D;
spi_get_hw(spi0)->dr = (uint32_t)y0>>8; spi_get_hw(SPI_X)->dr = (uint32_t)y0>>8;
spi_get_hw(spi0)->dr = (uint32_t)y0; spi_get_hw(SPI_X)->dr = (uint32_t)y0;
spi_get_hw(spi0)->dr = (uint32_t)y1>>8; spi_get_hw(SPI_X)->dr = (uint32_t)y1>>8;
spi_get_hw(spi0)->dr = (uint32_t)y1; spi_get_hw(SPI_X)->dr = (uint32_t)y1;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_C; DC_C;
spi_get_hw(spi0)->dr = (uint32_t)TFT_RAMWR; spi_get_hw(SPI_X)->dr = (uint32_t)TFT_RAMWR;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
#if !defined (SPI_18BIT_DRIVER) #if !defined (SPI_18BIT_DRIVER)
spi_set_format(spi0, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST); spi_set_format(SPI_X, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST);
#endif #endif
DC_D; DC_D;
@@ -3177,40 +3177,40 @@ void TFT_eSPI::readAddrWindow(int32_t xs, int32_t ys, int32_t w, int32_t h)
// Temporary solution is to include the RP2040 optimised code here // Temporary solution is to include the RP2040 optimised code here
#if defined(ARDUINO_ARCH_RP2040) && !defined(TFT_PARALLEL_8BIT) #if defined(ARDUINO_ARCH_RP2040) && !defined(TFT_PARALLEL_8BIT)
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_C; DC_C;
spi_set_format(spi0, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST); spi_set_format(SPI_X, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST);
spi_get_hw(spi0)->dr = (uint32_t)TFT_CASET; spi_get_hw(SPI_X)->dr = (uint32_t)TFT_CASET;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_D; DC_D;
spi_get_hw(spi0)->dr = (uint32_t)xs>>8; spi_get_hw(SPI_X)->dr = (uint32_t)xs>>8;
spi_get_hw(spi0)->dr = (uint32_t)xs; spi_get_hw(SPI_X)->dr = (uint32_t)xs;
spi_get_hw(spi0)->dr = (uint32_t)xe>>8; spi_get_hw(SPI_X)->dr = (uint32_t)xe>>8;
spi_get_hw(spi0)->dr = (uint32_t)xe; spi_get_hw(SPI_X)->dr = (uint32_t)xe;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_C; DC_C;
spi_get_hw(spi0)->dr = (uint32_t)TFT_PASET; spi_get_hw(SPI_X)->dr = (uint32_t)TFT_PASET;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_D; DC_D;
spi_get_hw(spi0)->dr = (uint32_t)ys>>8; spi_get_hw(SPI_X)->dr = (uint32_t)ys>>8;
spi_get_hw(spi0)->dr = (uint32_t)ys; spi_get_hw(SPI_X)->dr = (uint32_t)ys;
spi_get_hw(spi0)->dr = (uint32_t)ye>>8; spi_get_hw(SPI_X)->dr = (uint32_t)ye>>8;
spi_get_hw(spi0)->dr = (uint32_t)ye; spi_get_hw(SPI_X)->dr = (uint32_t)ye;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_C; DC_C;
spi_get_hw(spi0)->dr = (uint32_t)TFT_RAMRD; spi_get_hw(SPI_X)->dr = (uint32_t)TFT_RAMRD;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
//spi_set_format(spi0, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST); //spi_set_format(SPI_X, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST);
DC_D; DC_D;
// Flush the rx buffer and reset overflow flag // Flush the rx buffer and reset overflow flag
while (spi_is_readable(spi0)) (void)spi_get_hw(spi0)->dr; while (spi_is_readable(SPI_X)) (void)spi_get_hw(SPI_X)->dr;
spi_get_hw(spi0)->icr = SPI_SSPICR_RORIC_BITS; spi_get_hw(SPI_X)->icr = SPI_SSPICR_RORIC_BITS;
#else #else
// Column addr set // Column addr set
@@ -3291,73 +3291,73 @@ void TFT_eSPI::drawPixel(int32_t x, int32_t y, uint32_t color)
// Since the SPI functions do not terminate until transmission is complete // Since the SPI functions do not terminate until transmission is complete
// a busy check is not needed. // a busy check is not needed.
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_C; DC_C;
#if defined (RPI_DISPLAY_TYPE) // RPi TFT type always needs 16 bit transfers #if defined (RPI_DISPLAY_TYPE) // RPi TFT type always needs 16 bit transfers
spi_set_format(spi0, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST); spi_set_format(SPI_X, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST);
#else #else
spi_set_format(spi0, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST); spi_set_format(SPI_X, 8, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST);
#endif #endif
spi_get_hw(spi0)->dr = (uint32_t)TFT_CASET; spi_get_hw(SPI_X)->dr = (uint32_t)TFT_CASET;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS){}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS){};
DC_D; DC_D;
spi_get_hw(spi0)->dr = (uint32_t)x>>8; spi_get_hw(SPI_X)->dr = (uint32_t)x>>8;
spi_get_hw(spi0)->dr = (uint32_t)x; spi_get_hw(SPI_X)->dr = (uint32_t)x;
spi_get_hw(spi0)->dr = (uint32_t)x>>8; spi_get_hw(SPI_X)->dr = (uint32_t)x>>8;
spi_get_hw(spi0)->dr = (uint32_t)x; spi_get_hw(SPI_X)->dr = (uint32_t)x;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_C; DC_C;
spi_get_hw(spi0)->dr = (uint32_t)TFT_PASET; spi_get_hw(SPI_X)->dr = (uint32_t)TFT_PASET;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_D; DC_D;
spi_get_hw(spi0)->dr = (uint32_t)y>>8; spi_get_hw(SPI_X)->dr = (uint32_t)y>>8;
spi_get_hw(spi0)->dr = (uint32_t)y; spi_get_hw(SPI_X)->dr = (uint32_t)y;
spi_get_hw(spi0)->dr = (uint32_t)y>>8; spi_get_hw(SPI_X)->dr = (uint32_t)y>>8;
spi_get_hw(spi0)->dr = (uint32_t)y; spi_get_hw(SPI_X)->dr = (uint32_t)y;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_C; DC_C;
spi_get_hw(spi0)->dr = (uint32_t)TFT_RAMWR; spi_get_hw(SPI_X)->dr = (uint32_t)TFT_RAMWR;
#if defined (SPI_18BIT_DRIVER) // SPI 18 bit colour #if defined (SPI_18BIT_DRIVER) // SPI 18 bit colour
uint8_t r = (color & 0xF800)>>8; uint8_t r = (color & 0xF800)>>8;
uint8_t g = (color & 0x07E0)>>3; uint8_t g = (color & 0x07E0)>>3;
uint8_t b = (color & 0x001F)<<3; uint8_t b = (color & 0x001F)<<3;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_D; DC_D;
tft_Write_8N(r); tft_Write_8N(g); tft_Write_8N(b); tft_Write_8N(r); tft_Write_8N(g); tft_Write_8N(b);
#else #else
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
DC_D; DC_D;
#if defined (RPI_DISPLAY_TYPE) // RPi TFT type always needs 16 bit transfers #if defined (RPI_DISPLAY_TYPE) // RPi TFT type always needs 16 bit transfers
spi_get_hw(spi0)->dr = (uint32_t)color; spi_get_hw(SPI_X)->dr = (uint32_t)color;
#else #else
spi_get_hw(spi0)->dr = (uint32_t)color>>8; spi_get_hw(SPI_X)->dr = (uint32_t)color>>8;
spi_get_hw(spi0)->dr = (uint32_t)color; spi_get_hw(SPI_X)->dr = (uint32_t)color;
#endif #endif
#endif #endif
/* /*
// Subsequent pixel reads work OK without draining the FIFO... // Subsequent pixel reads work OK without draining the FIFO...
// Drain RX FIFO, then wait for shifting to finish (which may be *after* // Drain RX FIFO, then wait for shifting to finish (which may be *after*
// TX FIFO drains), then drain RX FIFO again // TX FIFO drains), then drain RX FIFO again
while (spi_is_readable(spi0)) while (spi_is_readable(SPI_X))
(void)spi_get_hw(spi0)->dr; (void)spi_get_hw(SPI_X)->dr;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS)
tight_loop_contents(); tight_loop_contents();
while (spi_is_readable(spi0)) while (spi_is_readable(SPI_X))
(void)spi_get_hw(spi0)->dr; (void)spi_get_hw(SPI_X)->dr;
//*/ //*/
// Subsequent pixel reads work without this // Subsequent pixel reads work without this
// spi_get_hw(spi0)->icr = SPI_SSPICR_RORIC_BITS; // spi_get_hw(SPI_X)->icr = SPI_SSPICR_RORIC_BITS;
while (spi_get_hw(spi0)->sr & SPI_SSPSR_BSY_BITS) {}; while (spi_get_hw(SPI_X)->sr & SPI_SSPSR_BSY_BITS) {};
// Next call will start with 8 bit command so changing to 16 bit not needed here // Next call will start with 8 bit command so changing to 16 bit not needed here
//spi_set_format(spi0, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST); //spi_set_format(SPI_X, 16, (spi_cpol_t)0, (spi_cpha_t)0, SPI_MSB_FIRST);
#else #else
@@ -4999,5 +4999,8 @@ void TFT_eSPI::getSetup(setup_t &tft_settings)
#include "Extensions/Smooth_font.cpp" #include "Extensions/Smooth_font.cpp"
#endif #endif
#ifdef AA_GRAPHICS
#include "Extensions/AA_graphics.cpp" // Loaded if SMOOTH_FONT is defined by user
#endif
//////////////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////////////

2
TFT_eSPI.h
View File

@@ -16,7 +16,7 @@
#ifndef _TFT_eSPIH_ #ifndef _TFT_eSPIH_
#define _TFT_eSPIH_ #define _TFT_eSPIH_
#define TFT_ESPI_VERSION "2.3.85" #define TFT_ESPI_VERSION "2.3.86"
// Bit level feature flags // Bit level feature flags
// Bit 0 set: viewport capability // Bit 0 set: viewport capability

6
User_Setup.h
View File

@@ -311,6 +311,12 @@
// //
// ################################################################################## // ##################################################################################
// For the RP2040 processor define the SPI port channel used (default 0 if undefined)
//#define TFT_SPI_PORT 1 // Set to 0 if SPI0 pins are used, or 1 if spi1 pins used
// For the STM32 processor define the SPI port channel used (default 1 if undefined)
//#define TFT_SPI_PORT 2 // Set to 1 for SPI port 1, or 2 for SPI port 2
// Define the SPI clock frequency, this affects the graphics rendering speed. Too // Define the SPI clock frequency, this affects the graphics rendering speed. Too
// fast and the TFT driver will not keep up and display corruption appears. // fast and the TFT driver will not keep up and display corruption appears.
// With an ILI9341 display 40MHz works OK, 80MHz sometimes fails // With an ILI9341 display 40MHz works OK, 80MHz sometimes fails

3
User_Setups/Setup60_RP2040_ILI9341.h
View File

@@ -163,6 +163,9 @@
// //
// ################################################################################## // ##################################################################################
// For the RP2040 processor define the SPI port channel used, default is 0
// #define TFT_SPI_PORT 1 // Set to 0 if SPI0 pins are used, or 1 if spi1 pins used
// Define the SPI clock frequency, this affects the graphics rendering speed. Too // Define the SPI clock frequency, this affects the graphics rendering speed. Too
// fast and the TFT driver will not keep up and display corruption appears. // fast and the TFT driver will not keep up and display corruption appears.
// With an ILI9341 display 40MHz works OK, 80MHz sometimes fails // With an ILI9341 display 40MHz works OK, 80MHz sometimes fails

2
examples/Test and diagnostics/Read_User_Setup/Read_User_Setup.ino
View File

@@ -159,7 +159,7 @@ void printProcessorName(void)
// Get pin name // Get pin name
int8_t getPinName(int8_t pin) int8_t getPinName(int8_t pin)
{ {
// For ESP32 pin labels on boards use the GPIO number // For ESP32 and RP2040 pin labels on boards use the GPIO number
if (user.esp == 0x32 || user.esp == 0x2040) return pin; if (user.esp == 0x32 || user.esp == 0x2040) return pin;
if (user.esp == 0x8266) { if (user.esp == 0x8266) {

2
library.json
View File

@@ -1,6 +1,6 @@
{ {
"name": "TFT_eSPI", "name": "TFT_eSPI",
"version": "2.3.85", "version": "2.3.86",
"keywords": "Arduino, tft, ePaper, display, Pico, RP2040, STM32, ESP8266, NodeMCU, ESP32, M5Stack, ILI9341, ST7735, ILI9163, S6D02A1, ILI9481, ILI9486, ILI9488, ST7789, RM68140, SSD1351, SSD1963, ILI9225, HX8357D", "keywords": "Arduino, tft, ePaper, display, Pico, RP2040, STM32, ESP8266, NodeMCU, ESP32, M5Stack, ILI9341, ST7735, ILI9163, S6D02A1, ILI9481, ILI9486, ILI9488, ST7789, RM68140, SSD1351, SSD1963, ILI9225, HX8357D",
"description": "A TFT and ePaper SPI graphics library with optimisation for Raspberry Pi Pico, ESP8266, ESP32 and STM32", "description": "A TFT and ePaper SPI graphics library with optimisation for Raspberry Pi Pico, ESP8266, ESP32 and STM32",
"repository": "repository":

2
library.properties
View File

@@ -1,5 +1,5 @@
name=TFT_eSPI name=TFT_eSPI
version=2.3.85 version=2.3.86
author=Bodmer author=Bodmer
maintainer=Bodmer maintainer=Bodmer
sentence=TFT graphics library for Arduino processors with performance optimisation for RP2040, STM32, ESP8266 and ESP32 sentence=TFT graphics library for Arduino processors with performance optimisation for RP2040, STM32, ESP8266 and ESP32