From d1bb18bdded8e05381f61a90cd261ee8e3994879 Mon Sep 17 00:00:00 2001 From: Bodmer Date: Mon, 10 Oct 2022 19:02:05 +0100 Subject: [PATCH] Various tweaks and bug fixes --- Processors/TFT_eSPI_ESP32.h | 9 ++++++++- Processors/TFT_eSPI_ESP32_S3.c | 9 --------- Processors/TFT_eSPI_ESP32_S3.h | 7 ++++++- TFT_eSPI.cpp | 2 ++ TFT_eSPI.h | 2 +- examples/Generic/Sketch_with_tft_setup/Read_Me.ino | 6 +++--- library.json | 2 +- library.properties | 2 +- 8 files changed, 22 insertions(+), 17 deletions(-) diff --git a/Processors/TFT_eSPI_ESP32.h b/Processors/TFT_eSPI_ESP32.h index c0dc893..66330ab 100644 --- a/Processors/TFT_eSPI_ESP32.h +++ b/Processors/TFT_eSPI_ESP32.h @@ -135,7 +135,14 @@ SPI3_HOST = 2 // Call up the SPIFFS (SPI FLASH Filing System) for the anti-aliased fonts #define FS_NO_GLOBALS #include - #include "SPIFFS.h" // ESP32 only + #if defined(CONFIG_IDF_TARGET_ESP32) + #include "SPIFFS.h" // ESP32 only + #else + #ifndef SPIFFS + #include + #define SPIFFS LittleFS + #endif + #endif #define FONT_FS_AVAILABLE #endif diff --git a/Processors/TFT_eSPI_ESP32_S3.c b/Processors/TFT_eSPI_ESP32_S3.c index c17be8a..3bdf9d0 100644 --- a/Processors/TFT_eSPI_ESP32_S3.c +++ b/Processors/TFT_eSPI_ESP32_S3.c @@ -52,15 +52,6 @@ #endif #endif -#if !defined (TFT_PARALLEL_8_BIT) - // Volatile for register reads: - volatile uint32_t* _spi_cmd = (volatile uint32_t*)(SPI_CMD_REG(SPI_PORT)); - volatile uint32_t* _spi_user = (volatile uint32_t*)(SPI_USER_REG(SPI_PORT)); - // Register writes only: - volatile uint32_t* _spi_mosi_dlen = (volatile uint32_t*)(SPI_MOSI_DLEN_REG(SPI_PORT)); - volatile uint32_t* _spi_w = (volatile uint32_t*)(SPI_W0_REG(SPI_PORT)); -#endif - //////////////////////////////////////////////////////////////////////////////////////// #if defined (TFT_SDA_READ) && !defined (TFT_PARALLEL_8_BIT) //////////////////////////////////////////////////////////////////////////////////////// diff --git a/Processors/TFT_eSPI_ESP32_S3.h b/Processors/TFT_eSPI_ESP32_S3.h index 4ec4e20..e103dec 100644 --- a/Processors/TFT_eSPI_ESP32_S3.h +++ b/Processors/TFT_eSPI_ESP32_S3.h @@ -112,6 +112,11 @@ SPI3_HOST = 2 // Processor specific code used by SPI bus transaction startWrite and endWrite functions #if !defined (ESP32_PARALLEL) + #define _spi_cmd (volatile uint32_t*)(SPI_CMD_REG(SPI_PORT)) + #define _spi_user (volatile uint32_t*)(SPI_USER_REG(SPI_PORT)) + #define _spi_mosi_dlen (volatile uint32_t*)(SPI_MOSI_DLEN_REG(SPI_PORT)) + #define _spi_w (volatile uint32_t*)(SPI_W0_REG(SPI_PORT)) + #if (TFT_SPI_MODE == SPI_MODE1) || (TFT_SPI_MODE == SPI_MODE2) #define SET_BUS_WRITE_MODE *_spi_user = SPI_USR_MOSI | SPI_CK_OUT_EDGE #define SET_BUS_READ_MODE *_spi_user = SPI_USR_MOSI | SPI_USR_MISO | SPI_DOUTDIN | SPI_CK_OUT_EDGE @@ -129,7 +134,7 @@ SPI3_HOST = 2 #if !defined(TFT_PARALLEL_8_BIT) && !defined(SPI_18BIT_DRIVER) #define ESP32_DMA // Code to check if DMA is busy, used by SPI DMA + transaction + endWrite functions - #define DMA_BUSY_CHECK dmaWait() + #define DMA_BUSY_CHECK //dmaWait() #else #define DMA_BUSY_CHECK #endif diff --git a/TFT_eSPI.cpp b/TFT_eSPI.cpp index 14eea87..46557cc 100644 --- a/TFT_eSPI.cpp +++ b/TFT_eSPI.cpp @@ -3828,6 +3828,7 @@ void TFT_eSPI::fillSmoothRoundRect(int32_t x, int32_t y, int32_t w, int32_t h, i int32_t cx = 0; // Limit radius to half width or height + if (r < 0) r = 0; if (r > w/2) r = w/2; if (r > h/2) r = h/2; @@ -3892,6 +3893,7 @@ void TFT_eSPI::drawWideLine(float ax, float ay, float bx, float by, float wd, ui ***************************************************************************************/ void TFT_eSPI::drawWedgeLine(float ax, float ay, float bx, float by, float ar, float br, uint32_t fg_color, uint32_t bg_color) { + if ( (ar < 0.0) || (br < 0.0) )return; if ( (abs(ax - bx) < 0.01f) && (abs(ay - by) < 0.01f) ) bx += 0.01f; // Avoid divide by zero // Find line bounding box diff --git a/TFT_eSPI.h b/TFT_eSPI.h index 3ac40df..43a4551 100644 --- a/TFT_eSPI.h +++ b/TFT_eSPI.h @@ -16,7 +16,7 @@ #ifndef _TFT_eSPIH_ #define _TFT_eSPIH_ -#define TFT_ESPI_VERSION "2.4.76" +#define TFT_ESPI_VERSION "2.4.77" // Bit level feature flags // Bit 0 set: viewport capability diff --git a/examples/Generic/Sketch_with_tft_setup/Read_Me.ino b/examples/Generic/Sketch_with_tft_setup/Read_Me.ino index 2d24139..c5e8bef 100644 --- a/examples/Generic/Sketch_with_tft_setup/Read_Me.ino +++ b/examples/Generic/Sketch_with_tft_setup/Read_Me.ino @@ -17,10 +17,10 @@ The procedure is as follows: 3. Close the Arduino IDE and open it again so the added file is recognised. -4. This step is already done in this sketch, but to adapt you own sketches, open the a sketch and add a +4. This step is already done in this sketch, but to adapt you own sketches, open the sketch and add a new tab, "tft_setup.h" in the main sketch, put all the tft library setup information in that header. The tab header name must be tft_setup.h IMPORTANT: You will need to remember to add the platform.local.txt file again if you upgrade the IDE or - the board package version). Note that the file must be added to each processor board package you are using. -*/ \ No newline at end of file + the board package version. Note that the file must be added to each processor board package you are using. +*/ diff --git a/library.json b/library.json index f3c6ab8..0e6b964 100644 --- a/library.json +++ b/library.json @@ -1,6 +1,6 @@ { "name": "TFT_eSPI", - "version": "2.4.76", + "version": "2.4.77", "keywords": "Arduino, tft, display, ttgo, LilyPi, WT32-SC01, ePaper, display, Pico, RP2040 Nano Connect, RP2040, STM32, ESP8266, NodeMCU, ESP32, M5Stack, ILI9341, ST7735, ILI9163, S6D02A1, ILI9481, ILI9486, ILI9488, ST7789, ST7796, RM68140, SSD1351, SSD1963, ILI9225, HX8357D, GC9A01, R61581", "description": "A TFT and ePaper SPI graphics library with optimisation for Raspberry Pi Pico, RP2040, ESP8266, ESP32 and STM32", "repository": diff --git a/library.properties b/library.properties index 20b4fdb..e46281d 100644 --- a/library.properties +++ b/library.properties @@ -1,5 +1,5 @@ name=TFT_eSPI -version=2.4.76 +version=2.4.77 author=Bodmer maintainer=Bodmer sentence=TFT graphics library for Arduino processors with performance optimisation for RP2040, STM32, ESP8266 and ESP32