diff --git a/Processors/TFT_eSPI_ESP32_S3.h b/Processors/TFT_eSPI_ESP32_S3.h index ec5ad8d..197ebc5 100644 --- a/Processors/TFT_eSPI_ESP32_S3.h +++ b/Processors/TFT_eSPI_ESP32_S3.h @@ -351,31 +351,51 @@ SPI3_HOST = 2 //////////////////////////////////////////////////////////////////////////////////////// #if defined (TFT_PARALLEL_8_BIT) + #if (TFT_D0 >= 32) // If D0 is a high GPIO assume all other data bits are high GPIO + #define MASK_OFFSET 32 + #define GPIO_CLR_REG GPIO.out1_w1tc.val + #define GPIO_SET_REG GPIO.out1_w1ts.val + #else + #define MASK_OFFSET 0 + #define GPIO_CLR_REG GPIO.out_w1tc + #define GPIO_SET_REG GPIO.out_w1ts + #endif + // Create a bit set lookup table for data bus - wastes 1kbyte of RAM but speeds things up dramatically // can then use e.g. GPIO.out_w1ts = set_mask(0xFF); to set data bus to 0xFF #define PARALLEL_INIT_TFT_DATA_BUS \ for (int32_t c = 0; c<256; c++) \ { \ - xset_mask[c] = 0; \ - if ( c & 0x01 ) xset_mask[c] |= (1 << TFT_D0); \ - if ( c & 0x02 ) xset_mask[c] |= (1 << TFT_D1); \ - if ( c & 0x04 ) xset_mask[c] |= (1 << TFT_D2); \ - if ( c & 0x08 ) xset_mask[c] |= (1 << TFT_D3); \ - if ( c & 0x10 ) xset_mask[c] |= (1 << TFT_D4); \ - if ( c & 0x20 ) xset_mask[c] |= (1 << TFT_D5); \ - if ( c & 0x40 ) xset_mask[c] |= (1 << TFT_D6); \ - if ( c & 0x80 ) xset_mask[c] |= (1 << TFT_D7); \ + xset_mask[c] = 0; \ + if ( c & 0x01 ) xset_mask[c] |= (1 << (TFT_D0-MASK_OFFSET)); \ + if ( c & 0x02 ) xset_mask[c] |= (1 << (TFT_D1-MASK_OFFSET)); \ + if ( c & 0x04 ) xset_mask[c] |= (1 << (TFT_D2-MASK_OFFSET)); \ + if ( c & 0x08 ) xset_mask[c] |= (1 << (TFT_D3-MASK_OFFSET)); \ + if ( c & 0x10 ) xset_mask[c] |= (1 << (TFT_D4-MASK_OFFSET)); \ + if ( c & 0x20 ) xset_mask[c] |= (1 << (TFT_D5-MASK_OFFSET)); \ + if ( c & 0x40 ) xset_mask[c] |= (1 << (TFT_D6-MASK_OFFSET)); \ + if ( c & 0x80 ) xset_mask[c] |= (1 << (TFT_D7-MASK_OFFSET)); \ } \ // Mask for the 8 data bits to set pin directions - #define GPIO_DIR_MASK ((1 << TFT_D0) | (1 << TFT_D1) | (1 << TFT_D2) | (1 << TFT_D3) | (1 << TFT_D4) | (1 << TFT_D5) | (1 << TFT_D6) | (1 << TFT_D7)) + #define GPIO_DIR_MASK ((1 << (TFT_D0-MASK_OFFSET)) | (1 << (TFT_D1-MASK_OFFSET)) | (1 << (TFT_D2-MASK_OFFSET)) | (1 << (TFT_D3-MASK_OFFSET)) | (1 << (TFT_D4-MASK_OFFSET)) | (1 << (TFT_D5-MASK_OFFSET)) | (1 << (TFT_D6-MASK_OFFSET)) | (1 << (TFT_D7-MASK_OFFSET))) #if (TFT_WR >= 32) - // Data bits and the write line are cleared sequentially - #define GPIO_OUT_CLR_MASK (GPIO_DIR_MASK); WR_L + #if (TFT_D0 >= 32) + // Data bits and the write line are cleared to 0 in one step (1.25x faster) + #define GPIO_OUT_CLR_MASK (GPIO_DIR_MASK | (1 << (TFT_WR-32))) + #elif (TFT_D0 >= 0) + // Data bits and the write line are cleared sequentially + #define GPIO_OUT_CLR_MASK (GPIO_DIR_MASK); WR_L + #endif #elif (TFT_WR >= 0) - // Data bits and the write line are cleared to 0 in one step (1.25x faster) - #define GPIO_OUT_CLR_MASK (GPIO_DIR_MASK | (1 << TFT_WR)) + #if (TFT_D0 >= 32) + // Data bits and the write line are cleared sequentially + #define GPIO_OUT_CLR_MASK (GPIO_DIR_MASK); WR_L + #elif (TFT_D0 >= 0) + // Data bits and the write line are cleared to 0 in one step (1.25x faster) + #define GPIO_OUT_CLR_MASK (GPIO_DIR_MASK | (1 << TFT_WR)) + #endif #else #define GPIO_OUT_CLR_MASK #endif @@ -389,7 +409,7 @@ SPI3_HOST = 2 //*/ // Write 8 bits to TFT - #define tft_Write_8(C) GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t)(C)); WR_H + #define tft_Write_8(C) GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t)(C)); WR_H #if defined (SSD1963_DRIVER) @@ -409,33 +429,33 @@ SPI3_HOST = 2 #define tft_Write_16S(C) GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H #else // Write 16 bits to TFT - #define tft_Write_16(C) GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \ - GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H + #define tft_Write_16(C) GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((C) >> 8)); WR_H; \ + GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((C) >> 0)); WR_H // 16 bit write with swapped bytes - #define tft_Write_16S(C) GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H; \ - GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H + #define tft_Write_16S(C) GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((C) >> 0)); WR_H; \ + GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((C) >> 8)); WR_H #endif #endif // Write 32 bits to TFT - #define tft_Write_32(C) GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 24)); WR_H; \ - GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 16)); WR_H; \ - GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \ - GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H + #define tft_Write_32(C) GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((C) >> 24)); WR_H; \ + GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((C) >> 16)); WR_H; \ + GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((C) >> 8)); WR_H; \ + GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((C) >> 0)); WR_H // Write two concatenated 16 bit values to TFT - #define tft_Write_32C(C,D) GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \ - GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H; \ - GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((D) >> 8)); WR_H; \ - GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((D) >> 0)); WR_H + #define tft_Write_32C(C,D) GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((C) >> 8)); WR_H; \ + GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((C) >> 0)); WR_H; \ + GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((D) >> 8)); WR_H; \ + GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((D) >> 0)); WR_H // Write 16 bit value twice to TFT - used by drawPixel() - #define tft_Write_32D(C) GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \ - GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H; \ - GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 8)); WR_H; \ - GPIO.out_w1tc = GPIO_OUT_CLR_MASK; GPIO.out_w1ts = set_mask((uint8_t) ((C) >> 0)); WR_H + #define tft_Write_32D(C) GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((C) >> 8)); WR_H; \ + GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((C) >> 0)); WR_H; \ + GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((C) >> 8)); WR_H; \ + GPIO_CLR_REG = GPIO_OUT_CLR_MASK; GPIO_SET_REG = set_mask((uint8_t) ((C) >> 0)); WR_H // Read pin #ifdef TFT_RD diff --git a/TFT_Drivers/ST7789_Init.h b/TFT_Drivers/ST7789_Init.h index 05b9dd7..ec6f756 100644 --- a/TFT_Drivers/ST7789_Init.h +++ b/TFT_Drivers/ST7789_Init.h @@ -5,6 +5,7 @@ // // See ST7735_Setup.h file for an alternative format +#ifndef INIT_SEQUENCE_3 { writecommand(ST7789_SLPOUT); // Sleep out delay(120); @@ -126,3 +127,103 @@ pinMode(TFT_BL, OUTPUT); #endif } + + +#else +// TTGO ESP32 S3 T-Display +{ + writecommand(ST7789_SLPOUT); // Sleep out + delay(120); + + writecommand(ST7789_NORON); // Normal display mode on + + //------------------------------display and color format setting--------------------------------// + writecommand(ST7789_MADCTL); + writedata(TFT_MAD_COLOR_ORDER); + + //--------------------------------ST7789V Frame rate setting----------------------------------// + writecommand(ST7789_PORCTRL); + writedata(0x0b); + writedata(0x0b); + writedata(0x00); + writedata(0x33); + writedata(0x33); + + writecommand(ST7789_GCTRL); // Voltages: VGH / VGL + writedata(0x75); + + //---------------------------------ST7789V Power setting--------------------------------------// + writecommand(ST7789_VCOMS); + writedata(0x28); // JLX240 display datasheet + + writecommand(ST7789_LCMCTRL); + writedata(0x2C); + + writecommand(ST7789_VDVVRHEN); + writedata(0x01); + + writecommand(ST7789_VRHS); // voltage VRHS + writedata(0x1F); + + writecommand(ST7789_FRCTR2); + writedata(0x13); + + writecommand(ST7789_PWCTRL1); + writedata(0xa7); + + writecommand(ST7789_PWCTRL1); + writedata(0xa4); + writedata(0xa1); + + writecommand(0xD6); + writedata(0xa1); + + //--------------------------------ST7789V gamma setting---------------------------------------// + writecommand(ST7789_PVGAMCTRL); + writedata(0xf0); + writedata(0x05); + writedata(0x0a); + writedata(0x06); + writedata(0x06); + writedata(0x03); + writedata(0x2b); + writedata(0x32); + writedata(0x43); + writedata(0x36); + writedata(0x11); + writedata(0x10); + writedata(0x2b); + writedata(0x32); + + writecommand(ST7789_NVGAMCTRL); + writedata(0xf0); + writedata(0x08); + writedata(0x0c); + writedata(0x0b); + writedata(0x09); + writedata(0x24); + writedata(0x2b); + writedata(0x22); + writedata(0x43); + writedata(0x38); + writedata(0x15); + writedata(0x16); + writedata(0x2f); + writedata(0x37); + +/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + + end_tft_write(); + delay(120); + begin_tft_write(); + + writecommand(ST7789_DISPON); //Display on + delay(120); + +#ifdef TFT_BL + // Turn on the back-light LED + digitalWrite(TFT_BL, HIGH); + pinMode(TFT_BL, OUTPUT); +#endif +} +#endif \ No newline at end of file diff --git a/User_Setup_Select.h b/User_Setup_Select.h index f6da3be..294ecae 100644 --- a/User_Setup_Select.h +++ b/User_Setup_Select.h @@ -27,7 +27,7 @@ // Only ONE line below should be uncommented to define your setup. Add extra lines and files as needed. -#include // Default setup is root library folder +//#include // Default setup is root library folder //#include // Setup file for ESP8266 configured for my ILI9341 //#include // Setup file for ESP8266 configured for my ST7735 @@ -128,6 +128,8 @@ //#include // Setup file for the ESP32 TouchDown S3 based on ILI9488 480 x 320 TFT +#include + //#include // Setup file for Bw16-based boards with ST7735 160 x 80 TFT //#include // Template file for a setup diff --git a/User_Setups/Setup206_LilyGo_T_Display_S3.h b/User_Setups/Setup206_LilyGo_T_Display_S3.h new file mode 100644 index 0000000..c9fe283 --- /dev/null +++ b/User_Setups/Setup206_LilyGo_T_Display_S3.h @@ -0,0 +1,46 @@ +// ST7789 using 8-bit Parallel + +#define USER_SETUP_ID 206 + +#define ST7789_DRIVER +#define INIT_SEQUENCE_3 // Using this initialisation sequence improves the display image + +#define CGRAM_OFFSET +// #define TFT_RGB_ORDER TFT_RGB // Colour order Red-Green-Blue +#define TFT_RGB_ORDER TFT_BGR // Colour order Blue-Green-Red + +#define TFT_INVERSION_ON +// #define TFT_INVERSION_OFF + +#define TFT_PARALLEL_8_BIT + +#define TFT_WIDTH 170 +#define TFT_HEIGHT 320 + +#define TFT_DC 7 +#define TFT_RST 5 + +#define TFT_WR 8 +#define TFT_RD 9 + +#define TFT_D0 39 +#define TFT_D1 40 +#define TFT_D2 41 +#define TFT_D3 42 +#define TFT_D4 45 +#define TFT_D5 46 +#define TFT_D6 47 +#define TFT_D7 48 + +#define TFT_BL 38 +#define TFT_BACKLIGHT_ON HIGH + +#define LOAD_GLCD +#define LOAD_FONT2 +#define LOAD_FONT4 +#define LOAD_FONT6 +#define LOAD_FONT7 +#define LOAD_FONT8 +#define LOAD_GFXFF + +#define SMOOTH_FONT