diff --git a/Inc/BLDC_controller.h b/Inc/BLDC_controller.h
new file mode 100644
index 0000000..38c3dc3
--- /dev/null
+++ b/Inc/BLDC_controller.h
@@ -0,0 +1,444 @@
+/*
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * File: BLDC_controller.h
+ *
+ * Code generated for Simulink model 'BLDC_controller'.
+ *
+ * Model version                  : 1.800
+ * Simulink Coder version         : 8.13 (R2017b) 24-Jul-2017
+ * C/C++ source code generated on : Sat May 25 21:42:39 2019
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM Cortex
+ * Emulation hardware selection:
+ *    Differs from embedded hardware (MATLAB Host)
+ * Code generation objectives:
+ *    1. Execution efficiency
+ *    2. RAM efficiency
+ * Validation result: Not run
+ */
+
+#ifndef RTW_HEADER_BLDC_controller_h_
+#define RTW_HEADER_BLDC_controller_h_
+#include "rtwtypes.h"
+#include "zero_crossing_types.h"
+#ifndef BLDC_controller_COMMON_INCLUDES_
+# define BLDC_controller_COMMON_INCLUDES_
+#include "rtwtypes.h"
+#include "zero_crossing_types.h"
+#endif                                 /* BLDC_controller_COMMON_INCLUDES_ */
+
+/* Macros for accessing real-time model data structure */
+
+/* Block signals and states (auto storage) for system '<S12>/F01_03_Direction_Detection' */
+typedef struct {
+  int8_T UnitDelay1_DSTATE;            /* '<S22>/UnitDelay1' */
+} DW_F01_03_Direction_Detection;
+
+/* Block signals and states (auto storage) for system '<S23>/Edge_counter' */
+typedef struct {
+  uint8_T UnitDelay1_DSTATE;           /* '<S38>/UnitDelay1' */
+  boolean_T Edge_counter_MODE;         /* '<S23>/Edge_counter' */
+} DW_Edge_counter;
+
+/* Block signals and states (auto storage) for system '<S23>/Moving_Average_Filter' */
+typedef struct {
+  int32_T UnitDelay5_DSTATE;           /* '<S28>/UnitDelay5' */
+  int32_T UnitDelay1_DSTATE;           /* '<S28>/UnitDelay1' */
+} DW_Moving_Average_Filter;
+
+/* Zero-crossing (trigger) state for system '<S23>/Moving_Average_Filter' */
+typedef struct {
+  ZCSigState Moving_Average_Filter_Trig_ZCE;/* '<S23>/Moving_Average_Filter' */
+} ZCE_Moving_Average_Filter;
+
+/* Zero-crossing (trigger) state for system '<S23>/Raw_ Speed_calculation' */
+typedef struct {
+  ZCSigState Raw_Speed_calculation_Trig_ZCE;/* '<S23>/Raw_ Speed_calculation' */
+} ZCE_Raw_Speed_calculation;
+
+/* Block signals and states (auto storage) for system '<Root>' */
+typedef struct {
+  DW_Moving_Average_Filter Moving_Average_Filter_n;/* '<S63>/Moving_Average_Filter' */
+  DW_Edge_counter Edge_counter_l;      /* '<S63>/Edge_counter' */
+  DW_F01_03_Direction_Detection F01_03_Direction_Detection_j;/* '<S52>/F01_03_Direction_Detection' */
+  DW_Moving_Average_Filter Moving_Average_Filter_l;/* '<S23>/Moving_Average_Filter' */
+  DW_Edge_counter Edge_counter_f;      /* '<S23>/Edge_counter' */
+  DW_F01_03_Direction_Detection F01_03_Direction_Detection_o;/* '<S12>/F01_03_Direction_Detection' */
+  int32_T Switch_PhaAdv;               /* '<S53>/Switch_PhaAdv' */
+  int32_T rpm_signed;                  /* '<S69>/Product2' */
+  int32_T Switch_PhaAdv_a;             /* '<S13>/Switch_PhaAdv' */
+  int32_T rpm_signed_c;                /* '<S29>/Product2' */
+  int16_T Merge;                       /* '<S14>/Merge' */
+  int16_T Merge1;                      /* '<S14>/Merge1' */
+  int16_T Merge2;                      /* '<S14>/Merge2' */
+  int16_T Merge_j;                     /* '<S54>/Merge' */
+  int16_T Merge1_m;                    /* '<S54>/Merge1' */
+  int16_T Merge2_d;                    /* '<S54>/Merge2' */
+  int16_T z_counterRawPrev_DSTATE;     /* '<S23>/z_counterRawPrev' */
+  int16_T z_counter2_DSTATE;           /* '<S23>/z_counter2' */
+  int16_T UnitDelay1_DSTATE;           /* '<S32>/UnitDelay1' */
+  int16_T z_counterRawPrev_DSTATE_p;   /* '<S63>/z_counterRawPrev' */
+  int16_T z_counter2_DSTATE_h;         /* '<S63>/z_counter2' */
+  int16_T UnitDelay1_DSTATE_k;         /* '<S72>/UnitDelay1' */
+  int8_T UnitDelay1;                   /* '<S62>/UnitDelay1' */
+  int8_T Switch2;                      /* '<S62>/Switch2' */
+  int8_T UnitDelay1_k;                 /* '<S22>/UnitDelay1' */
+  int8_T Switch2_e;                    /* '<S22>/Switch2' */
+  int8_T If1_ActiveSubsystem;          /* '<S2>/If1' */
+  int8_T If1_ActiveSubsystem_j;        /* '<S3>/If1' */
+  uint8_T Sum2_i;                      /* '<S67>/Sum2' */
+  uint8_T Sum2_l;                      /* '<S27>/Sum2' */
+  uint8_T UnitDelay_DSTATE;            /* '<S20>/UnitDelay' */
+  uint8_T UnitDelay1_DSTATE_p;         /* '<S20>/UnitDelay1' */
+  uint8_T UnitDelay2_DSTATE;           /* '<S20>/UnitDelay2' */
+  uint8_T UnitDelay1_DSTATE_g;         /* '<S21>/UnitDelay1' */
+  uint8_T UnitDelay_DSTATE_j;          /* '<S60>/UnitDelay' */
+  uint8_T UnitDelay1_DSTATE_f;         /* '<S60>/UnitDelay1' */
+  uint8_T UnitDelay2_DSTATE_b;         /* '<S60>/UnitDelay2' */
+  uint8_T UnitDelay1_DSTATE_j;         /* '<S61>/UnitDelay1' */
+  boolean_T RelationalOperator4;       /* '<S63>/Relational Operator4' */
+  boolean_T LogicalOperator;           /* '<S71>/Logical Operator' */
+  boolean_T UnitDelay8_DSTATE;         /* '<S23>/UnitDelay8' */
+  boolean_T UnitDelay8_DSTATE_p;       /* '<S63>/UnitDelay8' */
+  boolean_T UnitDelay_DSTATE_k;        /* '<S71>/UnitDelay' */
+  boolean_T UnitDelay_DSTATE_l;        /* '<S31>/UnitDelay' */
+  boolean_T Memory_PreviousInput;      /* '<S30>/Memory' */
+  boolean_T Relay_Mode;                /* '<S15>/Relay' */
+  boolean_T Memory_PreviousInput_i;    /* '<S70>/Memory' */
+  boolean_T Relay_Mode_m;              /* '<S55>/Relay' */
+} DW;
+
+/* Zero-crossing (trigger) state */
+typedef struct {
+  ZCE_Raw_Speed_calculation Raw_Speed_calculation_k;/* '<S63>/Raw_ Speed_calculation' */
+  ZCE_Moving_Average_Filter Moving_Average_Filter_n;/* '<S63>/Moving_Average_Filter' */
+  ZCE_Raw_Speed_calculation Raw_Speed_calculation_m;/* '<S23>/Raw_ Speed_calculation' */
+  ZCE_Moving_Average_Filter Moving_Average_Filter_l;/* '<S23>/Moving_Average_Filter' */
+} PrevZCX;
+
+/* Constant parameters (auto storage) */
+typedef struct {
+  /* Pooled Parameter (Expression: r_trapPhaA_M1)
+   * Referenced by:
+   *   '<S43>/r_trapPhaA_M1'
+   *   '<S83>/r_trapPhaA_M1'
+   */
+  int16_T pooled8[7];
+
+  /* Pooled Parameter (Expression: r_trapPhaB_M1)
+   * Referenced by:
+   *   '<S43>/r_trapPhaB_M1'
+   *   '<S83>/r_trapPhaB_M1'
+   */
+  int16_T pooled9[7];
+
+  /* Pooled Parameter (Expression: r_trapPhaC_M1)
+   * Referenced by:
+   *   '<S43>/r_trapPhaC_M1'
+   *   '<S83>/r_trapPhaC_M1'
+   */
+  int16_T pooled10[7];
+
+  /* Pooled Parameter (Expression: r_sinPhaA_M1)
+   * Referenced by:
+   *   '<S45>/r_sinPhaA_M1'
+   *   '<S85>/r_sinPhaA_M1'
+   */
+  int16_T pooled11[37];
+
+  /* Pooled Parameter (Expression: r_sinPhaB_M1)
+   * Referenced by:
+   *   '<S45>/r_sinPhaB_M1'
+   *   '<S85>/r_sinPhaB_M1'
+   */
+  int16_T pooled12[37];
+
+  /* Pooled Parameter (Expression: r_sinPhaC_M1)
+   * Referenced by:
+   *   '<S45>/r_sinPhaC_M1'
+   *   '<S85>/r_sinPhaC_M1'
+   */
+  int16_T pooled13[37];
+
+  /* Pooled Parameter (Expression: r_sin3PhaA_M1)
+   * Referenced by:
+   *   '<S44>/r_sin3PhaA_M1'
+   *   '<S84>/r_sin3PhaA_M1'
+   */
+  int16_T pooled14[37];
+
+  /* Pooled Parameter (Expression: r_sin3PhaB_M1)
+   * Referenced by:
+   *   '<S44>/r_sin3PhaB_M1'
+   *   '<S84>/r_sin3PhaB_M1'
+   */
+  int16_T pooled15[37];
+
+  /* Pooled Parameter (Expression: r_sin3PhaC_M1)
+   * Referenced by:
+   *   '<S44>/r_sin3PhaC_M1'
+   *   '<S84>/r_sin3PhaC_M1'
+   */
+  int16_T pooled16[37];
+
+  /* Pooled Parameter (Expression: z_commutMap_M1)
+   * Referenced by:
+   *   '<S15>/z_commutMap_M1'
+   *   '<S55>/z_commutMap_M1'
+   */
+  int16_T pooled17[18];
+
+  /* Pooled Parameter (Expression: vec_hallToPos)
+   * Referenced by:
+   *   '<S21>/vec_hallToPos'
+   *   '<S61>/vec_hallToPos'
+   */
+  uint8_T pooled27[8];
+
+  /* Pooled Parameter (Expression: [0 1;1 0;0 1;0 1;1 0;1 0;0 0;0 0])
+   * Referenced by:
+   *   '<S30>/Logic'
+   *   '<S70>/Logic'
+   */
+  boolean_T pooled31[16];
+} ConstP;
+
+/* External inputs (root inport signals with auto storage) */
+typedef struct {
+  uint8_T b_hallALeft;                 /* '<Root>/b_hallALeft ' */
+  uint8_T b_hallBLeft;                 /* '<Root>/b_hallBLeft' */
+  uint8_T b_hallCLeft;                 /* '<Root>/b_hallCLeft' */
+  int32_T r_DCLeft;                    /* '<Root>/r_DCLeft' */
+  uint8_T b_hallARight;                /* '<Root>/b_hallARight' */
+  uint8_T b_hallBRight;                /* '<Root>/b_hallBRight' */
+  uint8_T b_hallCRight;                /* '<Root>/b_hallCRight' */
+  int32_T r_DCRight;                   /* '<Root>/r_DCRight' */
+} ExtU;
+
+/* External outputs (root outports fed by signals with auto storage) */
+typedef struct {
+  int32_T DC_phaALeft;                 /* '<Root>/DC_phaALeft' */
+  int32_T DC_phaBLeft;                 /* '<Root>/DC_phaBLeft' */
+  int32_T DC_phaCLeft;                 /* '<Root>/DC_phaCLeft' */
+  int32_T n_motLeft;                   /* '<Root>/n_motLeft' */
+  int32_T a_elecAngleLeft;             /* '<Root>/a_elecAngleLeft' */
+  int32_T DC_phaARight;                /* '<Root>/DC_phaARight' */
+  int32_T DC_phaBRight;                /* '<Root>/DC_phaBRight' */
+  int32_T DC_phaCRight;                /* '<Root>/DC_phaCRight' */
+  int32_T n_motRight;                  /* '<Root>/n_motRight' */
+  int32_T a_elecAngleRight;            /* '<Root>/a_elecAngleRight' */
+} ExtY;
+
+/* Parameters (auto storage) */
+struct P_ {
+  int32_T cf_spdCoef;                  /* Variable: cf_spdCoef
+                                        * Referenced by:
+                                        *   '<S29>/cf_spdCoef'
+                                        *   '<S69>/cf_spdCoef'
+                                        */
+  int32_T n_commAcvLo;                 /* Variable: n_commAcvLo
+                                        * Referenced by:
+                                        *   '<S15>/Relay'
+                                        *   '<S55>/Relay'
+                                        */
+  int32_T n_commDeacvHi;               /* Variable: n_commDeacvHi
+                                        * Referenced by:
+                                        *   '<S15>/Relay'
+                                        *   '<S55>/Relay'
+                                        */
+  int32_T n_thresSpdDeacv;             /* Variable: n_thresSpdDeacv
+                                        * Referenced by:
+                                        *   '<S23>/n_thresSpdDeacv'
+                                        *   '<S63>/n_thresSpdDeacv'
+                                        */
+  int32_T r_commDCDeacv;               /* Variable: r_commDCDeacv
+                                        * Referenced by:
+                                        *   '<S15>/r_commDCDeacv'
+                                        *   '<S55>/r_commDCDeacv'
+                                        */
+  int32_T r_phaAdvDC_XA[11];           /* Variable: r_phaAdvDC_XA
+                                        * Referenced by:
+                                        *   '<S13>/r_phaAdvDC_XA'
+                                        *   '<S53>/r_phaAdvDC_XA'
+                                        */
+  int16_T a_phaAdv_M1[11];             /* Variable: a_phaAdv_M1
+                                        * Referenced by:
+                                        *   '<S13>/a_phaAdv_M2'
+                                        *   '<S53>/a_phaAdv_M2'
+                                        */
+  int16_T z_maxCntRst;                 /* Variable: z_maxCntRst
+                                        * Referenced by:
+                                        *   '<S23>/z_maxCntRst'
+                                        *   '<S63>/z_maxCntRst'
+                                        *   '<S29>/z_maxCntRst'
+                                        *   '<S69>/z_maxCntRst'
+                                        */
+  uint8_T z_ctrlTypSel;                /* Variable: z_ctrlTypSel
+                                        * Referenced by:
+                                        *   '<S12>/z_ctrlTypSel1'
+                                        *   '<S52>/z_ctrlTypSel1'
+                                        */
+  uint8_T z_nrEdgeSpdAcv;              /* Variable: z_nrEdgeSpdAcv
+                                        * Referenced by:
+                                        *   '<S23>/z_nrEdgeSpdAcv'
+                                        *   '<S63>/z_nrEdgeSpdAcv'
+                                        */
+  boolean_T b_phaAdvEna;               /* Variable: b_phaAdvEna
+                                        * Referenced by:
+                                        *   '<S13>/a_elecPeriod1'
+                                        *   '<S53>/a_elecPeriod1'
+                                        */
+};
+
+/* Parameters (auto storage) */
+typedef struct P_ P;
+
+/* Block parameters (auto storage) */
+extern P rtP;
+
+/* Block signals and states (auto storage) */
+extern DW rtDW;
+
+/* External inputs (root inport signals with auto storage) */
+extern ExtU rtU;
+
+/* External outputs (root outports fed by signals with auto storage) */
+extern ExtY rtY;
+
+/* Constant parameters (auto storage) */
+extern const ConstP rtConstP;
+
+/* Model entry point functions */
+extern void BLDC_controller_initialize(void);
+extern void BLDC_controller_step(void);
+
+/*-
+ * These blocks were eliminated from the model due to optimizations:
+ *
+ * Block '<S23>/Scope2' : Unused code path elimination
+ * Block '<S13>/Scope' : Unused code path elimination
+ * Block '<S63>/Scope2' : Unused code path elimination
+ * Block '<S53>/Scope' : Unused code path elimination
+ */
+
+/*-
+ * The generated code includes comments that allow you to trace directly
+ * back to the appropriate location in the model.  The basic format
+ * is <system>/block_name, where system is the system number (uniquely
+ * assigned by Simulink) and block_name is the name of the block.
+ *
+ * Note that this particular code originates from a subsystem build,
+ * and has its own system numbers different from the parent model.
+ * Refer to the system hierarchy for this subsystem below, and use the
+ * MATLAB hilite_system command to trace the generated code back
+ * to the parent model.  For example,
+ *
+ * hilite_system('BLDCmotorControl_R2017b/BLDC_controller')    - opens subsystem BLDCmotorControl_R2017b/BLDC_controller
+ * hilite_system('BLDCmotorControl_R2017b/BLDC_controller/Kp') - opens and selects block Kp
+ *
+ * Here is the system hierarchy for this model
+ *
+ * '<Root>' : 'BLDCmotorControl_R2017b'
+ * '<S1>'   : 'BLDCmotorControl_R2017b/BLDC_controller'
+ * '<S2>'   : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left'
+ * '<S3>'   : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right'
+ * '<S4>'   : 'BLDCmotorControl_R2017b/BLDC_controller/signal_log1'
+ * '<S5>'   : 'BLDCmotorControl_R2017b/BLDC_controller/signal_log2'
+ * '<S6>'   : 'BLDCmotorControl_R2017b/BLDC_controller/signal_log3'
+ * '<S7>'   : 'BLDCmotorControl_R2017b/BLDC_controller/signal_log4'
+ * '<S8>'   : 'BLDCmotorControl_R2017b/BLDC_controller/signal_log5'
+ * '<S9>'   : 'BLDCmotorControl_R2017b/BLDC_controller/signal_log6'
+ * '<S10>'  : 'BLDCmotorControl_R2017b/BLDC_controller/signal_log7'
+ * '<S11>'  : 'BLDCmotorControl_R2017b/BLDC_controller/signal_log8'
+ * '<S12>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations'
+ * '<S13>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F02_Electrical_Angle_Calculation'
+ * '<S14>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F03_Control_Method_Selection'
+ * '<S15>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F04_Control_Type_Management'
+ * '<S16>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/signal_log1'
+ * '<S17>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/signal_log2'
+ * '<S18>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/signal_log3'
+ * '<S19>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/signal_log6'
+ * '<S20>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_01_Edge_Detector'
+ * '<S21>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_02_Position_Calculation'
+ * '<S22>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_03_Direction_Detection'
+ * '<S23>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_04_Speed_Calculation'
+ * '<S24>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_01_Edge_Detector/signal_log6'
+ * '<S25>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_02_Position_Calculation/signal_log6'
+ * '<S26>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_03_Direction_Detection/signal_log6'
+ * '<S27>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_04_Speed_Calculation/Edge_counter'
+ * '<S28>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_04_Speed_Calculation/Moving_Average_Filter'
+ * '<S29>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_04_Speed_Calculation/Raw_ Speed_calculation'
+ * '<S30>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_04_Speed_Calculation/S-R Flip-Flop'
+ * '<S31>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_04_Speed_Calculation/rising_edge'
+ * '<S32>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_04_Speed_Calculation/rst_Delay'
+ * '<S33>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_04_Speed_Calculation/signal_log1'
+ * '<S34>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_04_Speed_Calculation/signal_log2'
+ * '<S35>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_04_Speed_Calculation/signal_log3'
+ * '<S36>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_04_Speed_Calculation/signal_log4'
+ * '<S37>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_04_Speed_Calculation/signal_log6'
+ * '<S38>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F01_Preliminary_Calculations/F01_04_Speed_Calculation/Edge_counter/rst_Delay'
+ * '<S39>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F02_Electrical_Angle_Calculation/Modulo_Calculation'
+ * '<S40>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F02_Electrical_Angle_Calculation/signal_log1'
+ * '<S41>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F02_Electrical_Angle_Calculation/signal_log2'
+ * '<S42>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F02_Electrical_Angle_Calculation/signal_log6'
+ * '<S43>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F03_Control_Method_Selection/F03_01_Pure_Trapezoidal_Method'
+ * '<S44>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F03_Control_Method_Selection/F03_02_Sinusoidal3rd_Method'
+ * '<S45>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F03_Control_Method_Selection/F03_02_Sinusoidal_Method'
+ * '<S46>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F03_Control_Method_Selection/signal_log1'
+ * '<S47>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F03_Control_Method_Selection/signal_log2'
+ * '<S48>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F03_Control_Method_Selection/signal_log6'
+ * '<S49>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F04_Control_Type_Management/signal_log1'
+ * '<S50>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F04_Control_Type_Management/signal_log2'
+ * '<S51>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Left/F04_Control_Type_Management/signal_log6'
+ * '<S52>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations'
+ * '<S53>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F02_Electrical_Angle_Calculation'
+ * '<S54>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F03_Control_Method_Selection'
+ * '<S55>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F04_Control_Type_Management'
+ * '<S56>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/signal_log1'
+ * '<S57>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/signal_log2'
+ * '<S58>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/signal_log3'
+ * '<S59>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/signal_log6'
+ * '<S60>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_01_Edge_Detector'
+ * '<S61>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_02_Position_Calculation'
+ * '<S62>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_03_Direction_Detection'
+ * '<S63>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_04_Speed_Calculation'
+ * '<S64>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_01_Edge_Detector/signal_log6'
+ * '<S65>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_02_Position_Calculation/signal_log6'
+ * '<S66>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_03_Direction_Detection/signal_log6'
+ * '<S67>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_04_Speed_Calculation/Edge_counter'
+ * '<S68>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_04_Speed_Calculation/Moving_Average_Filter'
+ * '<S69>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_04_Speed_Calculation/Raw_ Speed_calculation'
+ * '<S70>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_04_Speed_Calculation/S-R Flip-Flop'
+ * '<S71>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_04_Speed_Calculation/rising_edge'
+ * '<S72>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_04_Speed_Calculation/rst_Delay'
+ * '<S73>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_04_Speed_Calculation/signal_log1'
+ * '<S74>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_04_Speed_Calculation/signal_log2'
+ * '<S75>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_04_Speed_Calculation/signal_log3'
+ * '<S76>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_04_Speed_Calculation/signal_log4'
+ * '<S77>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_04_Speed_Calculation/signal_log6'
+ * '<S78>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F01_Preliminary_Calculations/F01_04_Speed_Calculation/Edge_counter/rst_Delay'
+ * '<S79>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F02_Electrical_Angle_Calculation/Modulo_Calculation'
+ * '<S80>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F02_Electrical_Angle_Calculation/signal_log1'
+ * '<S81>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F02_Electrical_Angle_Calculation/signal_log2'
+ * '<S82>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F02_Electrical_Angle_Calculation/signal_log6'
+ * '<S83>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F03_Control_Method_Selection/F03_01_Pure_Trapezoidal_Method'
+ * '<S84>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F03_Control_Method_Selection/F03_02_Sinusoidal3rd_Method'
+ * '<S85>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F03_Control_Method_Selection/F03_02_Sinusoidal_Method'
+ * '<S86>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F03_Control_Method_Selection/signal_log1'
+ * '<S87>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F03_Control_Method_Selection/signal_log2'
+ * '<S88>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F03_Control_Method_Selection/signal_log6'
+ * '<S89>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F04_Control_Type_Management/signal_log1'
+ * '<S90>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F04_Control_Type_Management/signal_log2'
+ * '<S91>'  : 'BLDCmotorControl_R2017b/BLDC_controller/BLDC_controller_Right/F04_Control_Type_Management/signal_log6'
+ */
+#endif                                 /* RTW_HEADER_BLDC_controller_h_ */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */
diff --git a/Inc/config.h b/Inc/config.h
index 2ecac25..4f3d590 100644
--- a/Inc/config.h
+++ b/Inc/config.h
@@ -6,16 +6,16 @@
 #define PWM_FREQ         16000      // PWM frequency in Hz
 #define DEAD_TIME        32         // PWM deadtime
 
-#define DELAY_IN_MAIN_LOOP 5        // in ms. default 5. it is independent of all the timing critical stuff. do not touch if you do not know what you are doing.
+#define DELAY_IN_MAIN_LOOP  5        // in ms. default 5. it is independent of all the timing critical stuff. do not touch if you do not know what you are doing.
 
-#define TIMEOUT          5          // number of wrong / missing input commands before emergency off
+#define TIMEOUT           5          // number of wrong / missing input commands before emergency off
 
 // ############################### GENERAL ###############################
 
 // How to calibrate: connect GND and RX of a 3.3v uart-usb adapter to the right sensor board cable (be careful not to use the red wire of the cable. 15v will destroye verything.). if you are using nunchuck, disable it temporarily. enable DEBUG_SERIAL_USART3 and DEBUG_SERIAL_ASCII use asearial terminal.
 
 // Battery voltage calibration: connect power source. see <How to calibrate>. write value nr 5 to BAT_CALIB_ADC. make and flash firmware. then you can verify voltage on value 6 (devide it by 100.0 to get calibrated voltage).
-#define BAT_CALIB_REAL_VOLTAGE        43.0       // input voltage measured by multimeter  
+#define BAT_CALIB_REAL_VOLTAGE        43.0       // input voltage measured by multimeter
 #define BAT_CALIB_ADC                 1704       // adc-value measured by mainboard (value nr 5 on UART debug output)
 
 #define BAT_NUMBER_OF_CELLS     10        // normal Hoverboard battery: 10s
@@ -64,16 +64,35 @@
 
 // ###### CONTROL VIA TWO POTENTIOMETERS ######
 // ADC-calibration to cover the full poti-range: connect potis to left sensor board cable (0 to 3.3V) (do NOT use the red 15V wire in the cable!). see <How to calibrate>. turn the potis to minimum position, write value 1 to ADC1_MIN and value 2 to ADC2_MIN. turn to maximum position and repeat it for ADC?_MAX. make, flash and test it.
-#define CONTROL_ADC                 // use ADC as input. disable CONTROL_SERIAL_USART2!
-#define ADC1_MIN 0                // min ADC1-value while poti at minimum-position (0 - 4095)
-#define ADC1_MAX 4095               // max ADC1-value while poti at maximum-position (0 - 4095)
-#define ADC2_MIN 0                // min ADC2-value while poti at minimum-position (0 - 4095)
-#define ADC2_MAX 4095               // max ADC2-value while poti at maximum-position (0 - 4095)
+#define CONTROL_ADC           // use ADC as input. disable CONTROL_SERIAL_USART2!
+#define ADC1_MIN 0            // min ADC1-value while poti at minimum-position (0 - 4095)
+#define ADC1_MAX 4095         // max ADC1-value while poti at maximum-position (0 - 4095)
+#define ADC2_MIN 0            // min ADC2-value while poti at minimum-position (0 - 4095)
+#define ADC2_MAX 4095         // max ADC2-value while poti at maximum-position (0 - 4095)
 
 // ###### CONTROL VIA NINTENDO NUNCHUCK ######
 // left sensor board cable. keep cable short, use shielded cable, use ferrits, stabalize voltage in nunchuck, use the right one of the 2 types of nunchucks, add i2c pullups. use original nunchuck. most clones does not work very well.
 //#define CONTROL_NUNCHUCK            // use nunchuck as input. disable DEBUG_SERIAL_USART3!
 
+
+// ############################### MOTOR CONTROL (overwrite) #########################
+#define CTRL_TYP_SEL            3   // [-] Control method selection: 0 = Commutation , 1 = Pure Trapezoidal , 2 = Sinusoidal, 3 = Sinusoidal 3rd armonic (default)
+#define PHASE_ADV_ENA           1   // [-] Phase advance enable parameter: 0 = disabled, 1 = enabled (default)
+#define COMM_DEACV_HI         180   // [rpm] Commutation method deactivation speed high (above this value the control switches from Commutation method to Selected method above)
+#define COMM_ACV_LO           100   // [rpm] Commutation method activation speed low
+
+// GENERAL NOTES:
+// 1. All the available motor parameters can be found in the BLDC_controller_data.c
+// 2. For more details regarding the parameters and the working principle of the controller please consult the Simulink model
+// 3. A webview was created, so Matlab/Simulink installation is not needed, unless you want to regenerate the code
+
+// NOTES Phase Advance / Field weakening:
+// 1. In BLDC_controller_data.c you can find the Phase advance Map as a function of Duty Cycle: MAP = a_phaAdv_M1, XAXIS = r_phaAdvDC_XA
+// 2. The default calibration was experimentaly obtained on the real motor based on the minimum noise and minimum torque ripple
+// 3. If you re-calibrate the Phase advance map please take all the safety measures! 
+// 4. I do not recommend more than 40 deg MAX Phase advance. The motors can spin VERY VERY FAST!!! Please use it with care!!
+
+
 // ############################### DRIVING BEHAVIOR ###############################
 
 // inputs:
@@ -82,23 +101,13 @@
 // - adc_buffer.l_tx2 and adc_buffer.l_rx2: unfiltered ADC values (you do not need them). 0 to 4095
 // outputs:
 // - speedR and speedL: normal driving -1000 to 1000
-// - weakr and weakl: field weakening for extra boost at high speed (speedR > 700 and speedL > 700). 0 to ~400
 
 #define FILTER              0.1  // lower value == softer filter. do not use values <0.01, you will get float precision issues.
-#define SPEED_COEFFICIENT   0.5  // higher value == stronger. 0.0 to ~2.0?
-#define STEER_COEFFICIENT   0.5  // higher value == stronger. if you do not want any steering, set it to 0.0; 0.0 to 1.0
+#define SPEED_COEFFICIENT   1.0 //0.5  // higher value == stronger. 0.0 to ~2.0?
+#define STEER_COEFFICIENT   0.5//0.5  // higher value == stronger. if you do not want any steering, set it to 0.0; 0.0 to 1.0
 #define INVERT_R_DIRECTION
 #define INVERT_L_DIRECTION
-#define BEEPS_BACKWARD 1    // 0 or 1
-
-//Turbo boost at high speeds while button1 is pressed:
-//#define ADDITIONAL_CODE \
-if (button1 && speedR > 700) { /* field weakening at high speeds */ \
-  weakl = cmd1 - 700; /* weak should never exceed 400 or 450 MAX!! */ \
-  weakr = cmd1 - 700; } \
-else { \
-  weakl = 0; \
-  weakr = 0; }
+#define BEEPS_BACKWARD 0    // 0 or 1
 
 // ###### SIMPLE BOBBYCAR ######
 // for better bobbycar code see: https://github.com/larsmm/hoverboard-firmware-hack-bbcar
@@ -106,30 +115,10 @@ else { \
 // #define SPEED_COEFFICIENT   -1
 // #define STEER_COEFFICIENT   0
 
-// #define ADDITIONAL_CODE \
-if (button1 && speedR < 300) { /* drive backwards */ \
-  speedR = speedR * -0.2f;   \
-  speedL = speedL * -0.2f; } \
-else { \
-  direction = 1; } \
-if (button1 && speedR > 700) { /* field weakening at high speeds */ \
-  weakl = speedR - 600; /* weak should never exceed 400 or 450 MAX!! */ \
-  weakr = speedR - 600; } \
-else { \
-  weakl = 0; \
-  weakr = 0; }
-
 // ###### ARMCHAIR ######
 // #define FILTER              0.05
 // #define SPEED_COEFFICIENT   0.5
-// #define STEER_COEFFICIENT   -0.2
-
-// #define ADDITIONAL_CODE if (button1 && scale > 0.8) { /* field weakening at high speeds */ \
-  weakl = speedL - 600; /* weak should never exceed 400 or 450 MAX!! */ \
-  weakr = speedR - 600; } \
-else {\
-  weakl = 0;\
-  weakr = 0;
+// #define STEER_COEFFICIENT  -0.2
 
 // ############################### VALIDATE SETTINGS ###############################
 
diff --git a/Inc/ert_main.c b/Inc/ert_main.c
new file mode 100644
index 0000000..ba38846
--- /dev/null
+++ b/Inc/ert_main.c
@@ -0,0 +1,116 @@
+/*
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * File: ert_main.c
+ *
+ * Code generated for Simulink model 'BLDC_controller'.
+ *
+ * Model version                  : 1.790
+ * Simulink Coder version         : 8.13 (R2017b) 24-Jul-2017
+ * C/C++ source code generated on : Wed May 22 23:49:19 2019
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM Cortex
+ * Emulation hardware selection:
+ *    Differs from embedded hardware (MATLAB Host)
+ * Code generation objectives:
+ *    1. Execution efficiency
+ *    2. RAM efficiency
+ * Validation result: Not run
+ */
+
+#include <stddef.h>
+#include <stdio.h>                     /* This ert_main.c example uses printf/fflush */
+#include "BLDC_controller.h"           /* Model's header file */
+#include "rtwtypes.h"
+#include "zero_crossing_types.h"
+
+/*
+ * Associating rt_OneStep with a real-time clock or interrupt service routine
+ * is what makes the generated code "real-time".  The function rt_OneStep is
+ * always associated with the base rate of the model.  Subrates are managed
+ * by the base rate from inside the generated code.  Enabling/disabling
+ * interrupts and floating point context switches are target specific.  This
+ * example code indicates where these should take place relative to executing
+ * the generated code step function.  Overrun behavior should be tailored to
+ * your application needs.  This example simply sets an error status in the
+ * real-time model and returns from rt_OneStep.
+ */
+void rt_OneStep(void);
+void rt_OneStep(void)
+{
+  static boolean_T OverrunFlag = false;
+
+  /* Disable interrupts here */
+
+  /* Check for overrun */
+  if (OverrunFlag) {
+    return;
+  }
+
+  OverrunFlag = true;
+
+  /* Save FPU context here (if necessary) */
+  /* Re-enable timer or interrupt here */
+  /* Set model inputs here */
+
+  /* Step the model */
+  BLDC_controller_step();
+
+  /* Get model outputs here */
+
+  /* Indicate task complete */
+  OverrunFlag = false;
+
+  /* Disable interrupts here */
+  /* Restore FPU context here (if necessary) */
+  /* Enable interrupts here */
+}
+
+/*
+ * The example "main" function illustrates what is required by your
+ * application code to initialize, execute, and terminate the generated code.
+ * Attaching rt_OneStep to a real-time clock is target specific.  This example
+ * illustrates how you do this relative to initializing the model.
+ */
+int_T main(int_T argc, const char *argv[])
+{
+  /* Unused arguments */
+  (void)(argc);
+  (void)(argv);
+
+  /* Initialize model */
+  BLDC_controller_initialize();
+
+  /* Attach rt_OneStep to a timer or interrupt service routine with
+   * period 1.0E-5 seconds (the model's base sample time) here.  The
+   * call syntax for rt_OneStep is
+   *
+   *  rt_OneStep();
+   */
+  printf("Warning: The simulation will run forever. "
+         "Generated ERT main won't simulate model step behavior. "
+         "To change this behavior select the 'MAT-file logging' option.\n");
+  fflush((NULL));
+  while (1) {
+    /*  Perform other application tasks here */
+  }
+
+  /* The option 'Remove error status field in real-time model data structure'
+   * is selected, therefore the following code does not need to execute.
+   */
+#if 0
+
+  /* Disable rt_OneStep() here */
+#endif
+
+  return 0;
+}
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */
diff --git a/Inc/rtwtypes.h b/Inc/rtwtypes.h
new file mode 100644
index 0000000..80e8117
--- /dev/null
+++ b/Inc/rtwtypes.h
@@ -0,0 +1,108 @@
+/*
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * File: rtwtypes.h
+ *
+ * Code generated for Simulink model 'BLDC_controller'.
+ *
+ * Model version                  : 1.800
+ * Simulink Coder version         : 8.13 (R2017b) 24-Jul-2017
+ * C/C++ source code generated on : Sat May 25 21:42:39 2019
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM Cortex
+ * Emulation hardware selection:
+ *    Differs from embedded hardware (MATLAB Host)
+ * Code generation objectives:
+ *    1. Execution efficiency
+ *    2. RAM efficiency
+ * Validation result: Not run
+ */
+
+#ifndef RTWTYPES_H
+#define RTWTYPES_H
+
+/* Logical type definitions */
+#if (!defined(__cplusplus))
+#  ifndef false
+#   define false                       (0U)
+#  endif
+
+#  ifndef true
+#   define true                        (1U)
+#  endif
+#endif
+
+/*=======================================================================*
+ * Target hardware information
+ *   Device type: MATLAB Host
+ *   Number of bits:     char:   8    short:   16    int:  32
+ *                       long:  32    long long:  64
+ *                       native word size:  64
+ *   Byte ordering: LittleEndian
+ *   Signed integer division rounds to: Zero
+ *   Shift right on a signed integer as arithmetic shift: on
+ *=======================================================================*/
+
+/*=======================================================================*
+ * Fixed width word size data types:                                     *
+ *   int8_T, int16_T, int32_T     - signed 8, 16, or 32 bit integers     *
+ *   uint8_T, uint16_T, uint32_T  - unsigned 8, 16, or 32 bit integers   *
+ *   real32_T, real64_T           - 32 and 64 bit floating point numbers *
+ *=======================================================================*/
+typedef signed char int8_T;
+typedef unsigned char uint8_T;
+typedef short int16_T;
+typedef unsigned short uint16_T;
+typedef int int32_T;
+typedef unsigned int uint32_T;
+typedef long long int64_T;
+typedef unsigned long long uint64_T;
+typedef float real32_T;
+typedef double real64_T;
+
+/*===========================================================================*
+ * Generic type definitions: boolean_T, char_T, byte_T, int_T, uint_T,       *
+ *                           real_T, time_T, ulong_T, ulonglong_T.           *
+ *===========================================================================*/
+typedef double real_T;
+typedef double time_T;
+typedef unsigned char boolean_T;
+typedef int int_T;
+typedef unsigned int uint_T;
+typedef unsigned long ulong_T;
+typedef unsigned long long ulonglong_T;
+typedef char char_T;
+typedef unsigned char uchar_T;
+typedef char_T byte_T;
+
+/*=======================================================================*
+ * Min and Max:                                                          *
+ *   int8_T, int16_T, int32_T     - signed 8, 16, or 32 bit integers     *
+ *   uint8_T, uint16_T, uint32_T  - unsigned 8, 16, or 32 bit integers   *
+ *=======================================================================*/
+#define MAX_int8_T                     ((int8_T)(127))
+#define MIN_int8_T                     ((int8_T)(-128))
+#define MAX_uint8_T                    ((uint8_T)(255U))
+#define MAX_int16_T                    ((int16_T)(32767))
+#define MIN_int16_T                    ((int16_T)(-32768))
+#define MAX_uint16_T                   ((uint16_T)(65535U))
+#define MAX_int32_T                    ((int32_T)(2147483647))
+#define MIN_int32_T                    ((int32_T)(-2147483647-1))
+#define MAX_uint32_T                   ((uint32_T)(0xFFFFFFFFU))
+#define MAX_int64_T                    ((int64_T)(9223372036854775807LL))
+#define MIN_int64_T                    ((int64_T)(-9223372036854775807LL-1LL))
+#define MAX_uint64_T                   ((uint64_T)(0xFFFFFFFFFFFFFFFFULL))
+
+/* Block D-Work pointer type */
+typedef void * pointer_T;
+
+#endif                                 /* RTWTYPES_H */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */
diff --git a/Inc/zero_crossing_types.h b/Inc/zero_crossing_types.h
new file mode 100644
index 0000000..c402c64
--- /dev/null
+++ b/Inc/zero_crossing_types.h
@@ -0,0 +1,57 @@
+/*
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * File: zero_crossing_types.h
+ *
+ * Code generated for Simulink model 'BLDC_controller'.
+ *
+ * Model version                  : 1.800
+ * Simulink Coder version         : 8.13 (R2017b) 24-Jul-2017
+ * C/C++ source code generated on : Sat May 25 21:42:39 2019
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM Cortex
+ * Emulation hardware selection:
+ *    Differs from embedded hardware (MATLAB Host)
+ * Code generation objectives:
+ *    1. Execution efficiency
+ *    2. RAM efficiency
+ * Validation result: Not run
+ */
+
+#ifndef ZERO_CROSSING_TYPES_H
+#define ZERO_CROSSING_TYPES_H
+#include "rtwtypes.h"
+
+/* Trigger directions: falling, either, and rising */
+typedef enum {
+  FALLING_ZERO_CROSSING = -1,
+  ANY_ZERO_CROSSING = 0,
+  RISING_ZERO_CROSSING = 1
+} ZCDirection;
+
+/* Previous state of a trigger signal */
+typedef uint8_T ZCSigState;
+
+/* Initial value of a trigger zero crossing signal */
+#define UNINITIALIZED_ZCSIG            0x03U
+#define NEG_ZCSIG                      0x02U
+#define POS_ZCSIG                      0x01U
+#define ZERO_ZCSIG                     0x00U
+
+/* Current state of a trigger signal */
+typedef enum {
+  FALLING_ZCEVENT = -1,
+  NO_ZCEVENT = 0,
+  RISING_ZCEVENT = 1
+} ZCEventType;
+
+#endif                                 /* ZERO_CROSSING_TYPES_H */
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */
diff --git a/Src/BLDC_controller.c b/Src/BLDC_controller.c
new file mode 100644
index 0000000..9111d29
--- /dev/null
+++ b/Src/BLDC_controller.c
@@ -0,0 +1,1313 @@
+/*
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * File: BLDC_controller.c
+ *
+ * Code generated for Simulink model 'BLDC_controller'.
+ *
+ * Model version                  : 1.800
+ * Simulink Coder version         : 8.13 (R2017b) 24-Jul-2017
+ * C/C++ source code generated on : Sat May 25 21:42:39 2019
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM Cortex
+ * Emulation hardware selection:
+ *    Differs from embedded hardware (MATLAB Host)
+ * Code generation objectives:
+ *    1. Execution efficiency
+ *    2. RAM efficiency
+ * Validation result: Not run
+ */
+
+#include "BLDC_controller.h"
+#ifndef UCHAR_MAX
+#include <limits.h>
+#endif
+
+#if ( UCHAR_MAX != (0xFFU) ) || ( SCHAR_MAX != (0x7F) )
+#error Code was generated for compiler with different sized uchar/char. \
+Consider adjusting Test hardware word size settings on the \
+Hardware Implementation pane to match your compiler word sizes as \
+defined in limits.h of the compiler. Alternatively, you can \
+select the Test hardware is the same as production hardware option and \
+select the Enable portable word sizes option on the Code Generation > \
+Verification pane for ERT based targets, which will disable the \
+preprocessor word size checks.
+#endif
+
+#if ( USHRT_MAX != (0xFFFFU) ) || ( SHRT_MAX != (0x7FFF) )
+#error Code was generated for compiler with different sized ushort/short. \
+Consider adjusting Test hardware word size settings on the \
+Hardware Implementation pane to match your compiler word sizes as \
+defined in limits.h of the compiler. Alternatively, you can \
+select the Test hardware is the same as production hardware option and \
+select the Enable portable word sizes option on the Code Generation > \
+Verification pane for ERT based targets, which will disable the \
+preprocessor word size checks.
+#endif
+
+#if ( UINT_MAX != (0xFFFFFFFFU) ) || ( INT_MAX != (0x7FFFFFFF) )
+#error Code was generated for compiler with different sized uint/int. \
+Consider adjusting Test hardware word size settings on the \
+Hardware Implementation pane to match your compiler word sizes as \
+defined in limits.h of the compiler. Alternatively, you can \
+select the Test hardware is the same as production hardware option and \
+select the Enable portable word sizes option on the Code Generation > \
+Verification pane for ERT based targets, which will disable the \
+preprocessor word size checks.
+#endif
+
+#if ( ULONG_MAX != (0xFFFFFFFFU) ) || ( LONG_MAX != (0x7FFFFFFF) )
+#error Code was generated for compiler with different sized ulong/long. \
+Consider adjusting Test hardware word size settings on the \
+Hardware Implementation pane to match your compiler word sizes as \
+defined in limits.h of the compiler. Alternatively, you can \
+select the Test hardware is the same as production hardware option and \
+select the Enable portable word sizes option on the Code Generation > \
+Verification pane for ERT based targets, which will disable the \
+preprocessor word size checks.
+#endif
+
+#if 0
+
+/* Skip this size verification because of preprocessor limitation */
+#if ( ULLONG_MAX != (0xFFFFFFFFFFFFFFFFULL) ) || ( LLONG_MAX != (0x7FFFFFFFFFFFFFFFLL) )
+#error Code was generated for compiler with different sized ulong_long/long_long. \
+Consider adjusting Test hardware word size settings on the \
+Hardware Implementation pane to match your compiler word sizes as \
+defined in limits.h of the compiler. Alternatively, you can \
+select the Test hardware is the same as production hardware option and \
+select the Enable portable word sizes option on the Code Generation > \
+Verification pane for ERT based targets, which will disable the \
+preprocessor word size checks.
+#endif
+#endif
+
+/* Block signals and states (auto storage) */
+DW rtDW;
+
+/* Previous zero-crossings (trigger) states */
+PrevZCX rtPrevZCX;
+
+/* External inputs (root inport signals with auto storage) */
+ExtU rtU;
+
+/* External outputs (root outports fed by signals with auto storage) */
+ExtY rtY;
+static uint8_T plook_u8s32u32n31_evenc_s(int32_T u, int32_T bp0, uint32_T
+  bpSpace, uint32_T maxIndex, uint32_T *fraction);
+static int16_T intrp1d_s16s32s32u8u32n31l_s(uint8_T bpIndex, uint32_T frac,
+  const int16_T table[]);
+static int32_T div_nde_s32_floor(int32_T numerator, int32_T denominator);
+static void F01_03_Direction_Detection(boolean_T rtu_Enable, uint8_T rtu_z_pos,
+  uint8_T rtu_z_posPrev, int8_T *rty_z_dir, int8_T *rty_z_dirPrev,
+  DW_F01_03_Direction_Detection *localDW);
+static void Edge_counter_Reset(DW_Edge_counter *localDW);
+static void Edge_counter_Disable(uint8_T *rty_cnt, DW_Edge_counter *localDW);
+static void Edge_counter(boolean_T rtu_Enable, boolean_T rtu_b_edge, int8_T
+  rtu_z_dir, int8_T rtu_z_dirPrev, uint8_T *rty_cnt, DW_Edge_counter *localDW);
+static void Moving_Average_Filter(boolean_T rtu_Trigger, int32_T rtu_n_motRaw,
+  int32_T *rty_n_mot, DW_Moving_Average_Filter *localDW,
+  ZCE_Moving_Average_Filter *localZCE);
+static void Raw_Speed_calculation(boolean_T rtu_Trigger, int16_T rtu_z_counter,
+  int8_T rtu_z_dir, int32_T *rty_n_motRaw, ZCE_Raw_Speed_calculation *localZCE);
+static void F03_01_Pure_Trapezoidal_Method(int32_T rtu_a_elecAngleAdv, int16_T
+  *rty_r_phaA_Trap, int16_T *rty_r_phaB_Trap, int16_T *rty_r_phaC_Trap);
+static void F03_02_Sinusoidal_Method(int32_T rtu_a_elecAngleAdv, int16_T
+  *rty_r_phaA_Sin, int16_T *rty_r_phaB_Sin, int16_T *rty_r_phaC_Sin);
+static void F03_02_Sinusoidal3rd_Method(int32_T rtu_a_elecAngleAdv, int16_T
+  *rty_r_phaA_Sin3, int16_T *rty_r_phaB_Sin3, int16_T *rty_r_phaC_Sin3);
+static void F02_Electrical_Angle_Ca_Disable(int32_T *rty_a_elecAngleAdv, int32_T
+  *rty_a_elecAngle);
+static void F02_Electrical_Angle_Calculatio(int32_T rtu_r_DC, uint8_T rtu_z_pos,
+  int8_T rtu_z_dir, int16_T rtu_z_counter, int16_T rtu_z_counterRaw, int32_T
+  *rty_a_elecAngleAdv, int32_T *rty_a_elecAngle);
+static void rising_edge(void);
+static void rising_edge_f(void);
+static uint8_T plook_u8s32u32n31_evenc_s(int32_T u, int32_T bp0, uint32_T
+  bpSpace, uint32_T maxIndex, uint32_T *fraction)
+{
+  uint8_T bpIndex;
+  uint32_T uAdjust;
+  uint32_T fbpIndex;
+
+  /* Prelookup - Index and Fraction
+     Index Search method: 'even'
+     Extrapolation method: 'Clip'
+     Use previous index: 'off'
+     Use last breakpoint for index at or above upper limit: 'off'
+     Remove protection against out-of-range input in generated code: 'off'
+     Rounding mode: 'simplest'
+   */
+  if (u <= bp0) {
+    bpIndex = 0U;
+    *fraction = 0U;
+  } else {
+    uAdjust = (uint32_T)u - bp0;
+    fbpIndex = uAdjust / bpSpace;
+    if (fbpIndex < maxIndex) {
+      bpIndex = (uint8_T)fbpIndex;
+      *fraction = (uint32_T)(((uint64_T)(uAdjust - bpIndex * bpSpace) << 31) /
+        bpSpace);
+    } else {
+      bpIndex = (uint8_T)(maxIndex - 1U);
+      *fraction = 2147483648U;
+    }
+  }
+
+  return bpIndex;
+}
+
+static int16_T intrp1d_s16s32s32u8u32n31l_s(uint8_T bpIndex, uint32_T frac,
+  const int16_T table[])
+{
+  uint32_T offset_0d;
+
+  /* Interpolation 1-D
+     Interpolation method: 'Linear'
+     Use last breakpoint for index at or above upper limit: 'off'
+     Rounding mode: 'simplest'
+     Overflow mode: 'wrapping'
+   */
+  offset_0d = bpIndex;
+  return (int16_T)((int16_T)(((int64_T)(table[offset_0d + 1U] - table[offset_0d])
+    * frac) >> 31) + table[offset_0d]);
+}
+
+static int32_T div_nde_s32_floor(int32_T numerator, int32_T denominator)
+{
+  return (((numerator < 0) != (denominator < 0)) && (numerator % denominator !=
+           0) ? -1 : 0) + numerator / denominator;
+}
+
+/*
+ * Output and update for enable system:
+ *    '<S12>/F01_03_Direction_Detection'
+ *    '<S52>/F01_03_Direction_Detection'
+ */
+static void F01_03_Direction_Detection(boolean_T rtu_Enable, uint8_T rtu_z_pos,
+  uint8_T rtu_z_posPrev, int8_T *rty_z_dir, int8_T *rty_z_dirPrev,
+  DW_F01_03_Direction_Detection *localDW)
+{
+  int8_T rtb_Sum2;
+
+  /* Outputs for Enabled SubSystem: '<S12>/F01_03_Direction_Detection' incorporates:
+   *  EnablePort: '<S22>/Enable'
+   */
+  if (rtu_Enable) {
+    /* UnitDelay: '<S22>/UnitDelay1' */
+    *rty_z_dirPrev = localDW->UnitDelay1_DSTATE;
+
+    /* Sum: '<S22>/Sum2' incorporates:
+     *  DataTypeConversion: '<S22>/Data Type Conversion1'
+     *  DataTypeConversion: '<S22>/Data Type Conversion10'
+     */
+    rtb_Sum2 = (int8_T)((int8_T)rtu_z_pos - (int8_T)rtu_z_posPrev);
+
+    /* Switch: '<S22>/Switch2' incorporates:
+     *  Constant: '<S22>/Constant20'
+     *  Constant: '<S22>/Constant23'
+     *  Constant: '<S22>/Constant24'
+     *  Constant: '<S22>/Constant8'
+     *  Logic: '<S22>/Logical Operator3'
+     *  RelationalOperator: '<S22>/Relational Operator1'
+     *  RelationalOperator: '<S22>/Relational Operator6'
+     */
+    if ((rtb_Sum2 == 1) || (rtb_Sum2 == -5)) {
+      *rty_z_dir = 1;
+    } else {
+      *rty_z_dir = -1;
+    }
+
+    /* End of Switch: '<S22>/Switch2' */
+
+    /* Update for UnitDelay: '<S22>/UnitDelay1' */
+    localDW->UnitDelay1_DSTATE = *rty_z_dir;
+  }
+
+  /* End of Outputs for SubSystem: '<S12>/F01_03_Direction_Detection' */
+}
+
+/*
+ * System reset for enable system:
+ *    '<S23>/Edge_counter'
+ *    '<S63>/Edge_counter'
+ */
+static void Edge_counter_Reset(DW_Edge_counter *localDW)
+{
+  /* InitializeConditions for UnitDelay: '<S38>/UnitDelay1' */
+  localDW->UnitDelay1_DSTATE = 0U;
+}
+
+/*
+ * Disable for enable system:
+ *    '<S23>/Edge_counter'
+ *    '<S63>/Edge_counter'
+ */
+static void Edge_counter_Disable(uint8_T *rty_cnt, DW_Edge_counter *localDW)
+{
+  /* Outputs for Enabled SubSystem: '<S23>/Edge_counter' incorporates:
+   *  EnablePort: '<S27>/Enable'
+   */
+  /* Disable for Outport: '<S27>/cnt' */
+  *rty_cnt = 0U;
+
+  /* End of Outputs for SubSystem: '<S23>/Edge_counter' */
+  localDW->Edge_counter_MODE = false;
+}
+
+/*
+ * Output and update for enable system:
+ *    '<S23>/Edge_counter'
+ *    '<S63>/Edge_counter'
+ */
+static void Edge_counter(boolean_T rtu_Enable, boolean_T rtu_b_edge, int8_T
+  rtu_z_dir, int8_T rtu_z_dirPrev, uint8_T *rty_cnt, DW_Edge_counter *localDW)
+{
+  boolean_T rtb_RelationalOperator1_i;
+  uint8_T rtb_RelationalOperator1_m1;
+
+  /* Outputs for Enabled SubSystem: '<S23>/Edge_counter' incorporates:
+   *  EnablePort: '<S27>/Enable'
+   */
+  if (rtu_Enable) {
+    if (!localDW->Edge_counter_MODE) {
+      Edge_counter_Reset(localDW);
+      localDW->Edge_counter_MODE = true;
+    }
+
+    /* RelationalOperator: '<S27>/Relational Operator1' */
+    rtb_RelationalOperator1_i = (rtu_z_dir == rtu_z_dirPrev);
+
+    /* Switch: '<S38>/Switch1' incorporates:
+     *  Constant: '<S38>/Constant23'
+     *  Logic: '<S27>/Logical Operator2'
+     *  UnitDelay: '<S38>/UnitDelay1'
+     */
+    if (!rtb_RelationalOperator1_i) {
+      rtb_RelationalOperator1_m1 = 0U;
+    } else {
+      rtb_RelationalOperator1_m1 = localDW->UnitDelay1_DSTATE;
+    }
+
+    /* End of Switch: '<S38>/Switch1' */
+
+    /* Sum: '<S27>/Sum2' incorporates:
+     *  Logic: '<S27>/Logical Operator1'
+     */
+    *rty_cnt = (uint8_T)((uint32_T)(rtu_b_edge && rtb_RelationalOperator1_i) +
+                         rtb_RelationalOperator1_m1);
+
+    /* Update for UnitDelay: '<S38>/UnitDelay1' */
+    localDW->UnitDelay1_DSTATE = *rty_cnt;
+  } else {
+    if (localDW->Edge_counter_MODE) {
+      Edge_counter_Disable(rty_cnt, localDW);
+    }
+  }
+
+  /* End of Outputs for SubSystem: '<S23>/Edge_counter' */
+}
+
+/*
+ * Output and update for trigger system:
+ *    '<S23>/Moving_Average_Filter'
+ *    '<S63>/Moving_Average_Filter'
+ */
+static void Moving_Average_Filter(boolean_T rtu_Trigger, int32_T rtu_n_motRaw,
+  int32_T *rty_n_mot, DW_Moving_Average_Filter *localDW,
+  ZCE_Moving_Average_Filter *localZCE)
+{
+  int32_T rtb_UnitDelay1_f;
+
+  /* Outputs for Triggered SubSystem: '<S23>/Moving_Average_Filter' incorporates:
+   *  TriggerPort: '<S28>/Trigger'
+   */
+  if (rtu_Trigger && (localZCE->Moving_Average_Filter_Trig_ZCE != POS_ZCSIG)) {
+    /* UnitDelay: '<S28>/UnitDelay1' */
+    rtb_UnitDelay1_f = localDW->UnitDelay1_DSTATE;
+
+    /* Product: '<S28>/Divide4' incorporates:
+     *  Constant: '<S28>/Constant1'
+     *  Sum: '<S28>/Sum2'
+     *  UnitDelay: '<S28>/UnitDelay5'
+     */
+    *rty_n_mot = ((localDW->UnitDelay5_DSTATE + rtb_UnitDelay1_f) + rtu_n_motRaw)
+      / 3;
+
+    /* Update for UnitDelay: '<S28>/UnitDelay5' */
+    localDW->UnitDelay5_DSTATE = rtb_UnitDelay1_f;
+
+    /* Update for UnitDelay: '<S28>/UnitDelay1' */
+    localDW->UnitDelay1_DSTATE = rtu_n_motRaw;
+  }
+
+  localZCE->Moving_Average_Filter_Trig_ZCE = rtu_Trigger;
+
+  /* End of Outputs for SubSystem: '<S23>/Moving_Average_Filter' */
+}
+
+/*
+ * Output and update for trigger system:
+ *    '<S23>/Raw_ Speed_calculation'
+ *    '<S63>/Raw_ Speed_calculation'
+ */
+static void Raw_Speed_calculation(boolean_T rtu_Trigger, int16_T rtu_z_counter,
+  int8_T rtu_z_dir, int32_T *rty_n_motRaw, ZCE_Raw_Speed_calculation *localZCE)
+{
+  int32_T rtb_Switch_p;
+
+  /* Outputs for Triggered SubSystem: '<S23>/Raw_ Speed_calculation' incorporates:
+   *  TriggerPort: '<S29>/Trigger'
+   */
+  if (rtu_Trigger && (localZCE->Raw_Speed_calculation_Trig_ZCE != POS_ZCSIG)) {
+    /* Switch: '<S29>/Switch' incorporates:
+     *  Constant: '<S29>/Constant1'
+     *  Constant: '<S29>/cf_spdCoef'
+     *  Constant: '<S29>/z_maxCntRst'
+     *  Product: '<S29>/Divide4'
+     *  RelationalOperator: '<S29>/Relational Operator1'
+     */
+    if (rtu_z_counter > rtP.z_maxCntRst) {
+      rtb_Switch_p = 0;
+    } else {
+      rtb_Switch_p = rtP.cf_spdCoef / rtu_z_counter;
+    }
+
+    /* End of Switch: '<S29>/Switch' */
+
+    /* Product: '<S29>/Product2' */
+    *rty_n_motRaw = rtb_Switch_p * rtu_z_dir;
+  }
+
+  localZCE->Raw_Speed_calculation_Trig_ZCE = rtu_Trigger;
+
+  /* End of Outputs for SubSystem: '<S23>/Raw_ Speed_calculation' */
+}
+
+/* Output and update for atomic system: '<S23>/rising_edge' */
+static void rising_edge(void)
+{
+  /* Logic: '<S31>/Logical Operator' incorporates:
+   *  Logic: '<S31>/Logical Operator1'
+   *  UnitDelay: '<S31>/UnitDelay'
+   */
+  rtDW.LogicalOperator = (rtDW.RelationalOperator4 && (!rtDW.UnitDelay_DSTATE_l));
+
+  /* Update for UnitDelay: '<S31>/UnitDelay' */
+  rtDW.UnitDelay_DSTATE_l = rtDW.RelationalOperator4;
+}
+
+/*
+ * Output and update for action system:
+ *    '<S14>/F03_01_Pure_Trapezoidal_Method'
+ *    '<S54>/F03_01_Pure_Trapezoidal_Method'
+ */
+static void F03_01_Pure_Trapezoidal_Method(int32_T rtu_a_elecAngleAdv, int16_T
+  *rty_r_phaA_Trap, int16_T *rty_r_phaB_Trap, int16_T *rty_r_phaC_Trap)
+{
+  uint8_T rtb_a_trapElecAngle_XA_o1;
+  uint32_T rtb_a_trapElecAngle_XA_o2;
+
+  /* PreLookup: '<S43>/a_trapElecAngle_XA' */
+  rtb_a_trapElecAngle_XA_o1 = plook_u8s32u32n31_evenc_s(rtu_a_elecAngleAdv, 0,
+    60U, 6U, &rtb_a_trapElecAngle_XA_o2);
+
+  /* Interpolation_n-D: '<S43>/r_trapPhaA_M1' */
+  *rty_r_phaA_Trap = intrp1d_s16s32s32u8u32n31l_s(rtb_a_trapElecAngle_XA_o1,
+    rtb_a_trapElecAngle_XA_o2, rtConstP.pooled8);
+
+  /* Interpolation_n-D: '<S43>/r_trapPhaB_M1' */
+  *rty_r_phaB_Trap = intrp1d_s16s32s32u8u32n31l_s(rtb_a_trapElecAngle_XA_o1,
+    rtb_a_trapElecAngle_XA_o2, rtConstP.pooled9);
+
+  /* Interpolation_n-D: '<S43>/r_trapPhaC_M1' */
+  *rty_r_phaC_Trap = intrp1d_s16s32s32u8u32n31l_s(rtb_a_trapElecAngle_XA_o1,
+    rtb_a_trapElecAngle_XA_o2, rtConstP.pooled10);
+}
+
+/*
+ * Output and update for action system:
+ *    '<S14>/F03_02_Sinusoidal_Method'
+ *    '<S54>/F03_02_Sinusoidal_Method'
+ */
+static void F03_02_Sinusoidal_Method(int32_T rtu_a_elecAngleAdv, int16_T
+  *rty_r_phaA_Sin, int16_T *rty_r_phaB_Sin, int16_T *rty_r_phaC_Sin)
+{
+  uint8_T rtb_a_sinElecAngle_XA_o1;
+  uint32_T rtb_a_sinElecAngle_XA_o2;
+
+  /* PreLookup: '<S45>/a_sinElecAngle_XA' */
+  rtb_a_sinElecAngle_XA_o1 = plook_u8s32u32n31_evenc_s(rtu_a_elecAngleAdv, 0,
+    10U, 36U, &rtb_a_sinElecAngle_XA_o2);
+
+  /* Interpolation_n-D: '<S45>/r_sinPhaA_M1' */
+  *rty_r_phaA_Sin = intrp1d_s16s32s32u8u32n31l_s(rtb_a_sinElecAngle_XA_o1,
+    rtb_a_sinElecAngle_XA_o2, rtConstP.pooled11);
+
+  /* Interpolation_n-D: '<S45>/r_sinPhaB_M1' */
+  *rty_r_phaB_Sin = intrp1d_s16s32s32u8u32n31l_s(rtb_a_sinElecAngle_XA_o1,
+    rtb_a_sinElecAngle_XA_o2, rtConstP.pooled12);
+
+  /* Interpolation_n-D: '<S45>/r_sinPhaC_M1' */
+  *rty_r_phaC_Sin = intrp1d_s16s32s32u8u32n31l_s(rtb_a_sinElecAngle_XA_o1,
+    rtb_a_sinElecAngle_XA_o2, rtConstP.pooled13);
+}
+
+/*
+ * Output and update for action system:
+ *    '<S14>/F03_02_Sinusoidal3rd_Method'
+ *    '<S54>/F03_02_Sinusoidal3rd_Method'
+ */
+static void F03_02_Sinusoidal3rd_Method(int32_T rtu_a_elecAngleAdv, int16_T
+  *rty_r_phaA_Sin3, int16_T *rty_r_phaB_Sin3, int16_T *rty_r_phaC_Sin3)
+{
+  uint8_T rtb_a_sinElecAngle_XA_o1;
+  uint32_T rtb_a_sinElecAngle_XA_o2;
+
+  /* PreLookup: '<S44>/a_sinElecAngle_XA' */
+  rtb_a_sinElecAngle_XA_o1 = plook_u8s32u32n31_evenc_s(rtu_a_elecAngleAdv, 0,
+    10U, 36U, &rtb_a_sinElecAngle_XA_o2);
+
+  /* Interpolation_n-D: '<S44>/r_sin3PhaA_M1' */
+  *rty_r_phaA_Sin3 = intrp1d_s16s32s32u8u32n31l_s(rtb_a_sinElecAngle_XA_o1,
+    rtb_a_sinElecAngle_XA_o2, rtConstP.pooled14);
+
+  /* Interpolation_n-D: '<S44>/r_sin3PhaB_M1' */
+  *rty_r_phaB_Sin3 = intrp1d_s16s32s32u8u32n31l_s(rtb_a_sinElecAngle_XA_o1,
+    rtb_a_sinElecAngle_XA_o2, rtConstP.pooled15);
+
+  /* Interpolation_n-D: '<S44>/r_sin3PhaC_M1' */
+  *rty_r_phaC_Sin3 = intrp1d_s16s32s32u8u32n31l_s(rtb_a_sinElecAngle_XA_o1,
+    rtb_a_sinElecAngle_XA_o2, rtConstP.pooled16);
+}
+
+/*
+ * Disable for action system:
+ *    '<S2>/F02_Electrical_Angle_Calculation'
+ *    '<S3>/F02_Electrical_Angle_Calculation'
+ */
+static void F02_Electrical_Angle_Ca_Disable(int32_T *rty_a_elecAngleAdv, int32_T
+  *rty_a_elecAngle)
+{
+  /* Disable for Outport: '<S13>/a_elecAngleAdv' */
+  *rty_a_elecAngleAdv = 0;
+
+  /* Disable for Outport: '<S13>/a_elecAngle' */
+  *rty_a_elecAngle = 0;
+}
+
+/*
+ * Output and update for action system:
+ *    '<S2>/F02_Electrical_Angle_Calculation'
+ *    '<S3>/F02_Electrical_Angle_Calculation'
+ */
+static void F02_Electrical_Angle_Calculatio(int32_T rtu_r_DC, uint8_T rtu_z_pos,
+  int8_T rtu_z_dir, int16_T rtu_z_counter, int16_T rtu_z_counterRaw, int32_T
+  *rty_a_elecAngleAdv, int32_T *rty_a_elecAngle)
+{
+  uint8_T rtb_Switch3;
+  int32_T rtb_Sum3_e;
+  int16_T rtb_a_phaAdv_M2;
+  uint32_T rtb_r_phaAdvDC_XA_o2;
+
+  /* Switch: '<S13>/Switch3' incorporates:
+   *  Constant: '<S13>/Constant16'
+   *  RelationalOperator: '<S13>/Relational Operator7'
+   *  Sum: '<S13>/Sum1'
+   */
+  if (rtu_z_dir == 1) {
+    rtb_Switch3 = rtu_z_pos;
+  } else {
+    rtb_Switch3 = (uint8_T)(rtu_z_pos + 1U);
+  }
+
+  /* End of Switch: '<S13>/Switch3' */
+
+  /* Sum: '<S13>/Sum2' incorporates:
+   *  Product: '<S13>/Divide4'
+   *  Product: '<S13>/Divide5'
+   *  Product: '<S13>/Product6'
+   */
+  *rty_a_elecAngle = 60 * rtu_z_counterRaw / rtu_z_counter * rtu_z_dir +
+    rtb_Switch3 * 60;
+
+  /* Switch: '<S13>/Switch_PhaAdv' incorporates:
+   *  Constant: '<S13>/a_elecPeriod1'
+   *  Constant: '<S13>/a_elecPeriod2'
+   *  Product: '<S39>/Divide2'
+   *  Product: '<S39>/Divide3'
+   *  Sum: '<S39>/Sum3'
+   */
+  if (rtP.b_phaAdvEna) {
+    /* Abs: '<S13>/Abs2' */
+    if (rtu_r_DC < 0) {
+      rtb_Sum3_e = -rtu_r_DC;
+    } else {
+      rtb_Sum3_e = rtu_r_DC;
+    }
+
+    /* End of Abs: '<S13>/Abs2' */
+
+    /* PreLookup: '<S13>/r_phaAdvDC_XA' */
+    rtb_Switch3 = plook_u8s32u32n31_evenc_s(rtb_Sum3_e, rtP.r_phaAdvDC_XA[0],
+      (uint32_T)rtP.r_phaAdvDC_XA[1] - rtP.r_phaAdvDC_XA[0], 10U,
+      &rtb_r_phaAdvDC_XA_o2);
+
+    /* Interpolation_n-D: '<S13>/a_phaAdv_M2' */
+    rtb_a_phaAdv_M2 = intrp1d_s16s32s32u8u32n31l_s(rtb_Switch3,
+      rtb_r_phaAdvDC_XA_o2, rtP.a_phaAdv_M1);
+
+    /* Sum: '<S13>/Sum3' incorporates:
+     *  Product: '<S13>/Product2'
+     */
+    rtb_Sum3_e = rtu_z_dir * rtb_a_phaAdv_M2 + *rty_a_elecAngle;
+    *rty_a_elecAngleAdv = rtb_Sum3_e - div_nde_s32_floor(rtb_Sum3_e, 360) * 360;
+  } else {
+    *rty_a_elecAngleAdv = *rty_a_elecAngle;
+  }
+
+  /* End of Switch: '<S13>/Switch_PhaAdv' */
+}
+
+/* Output and update for atomic system: '<S63>/rising_edge' */
+static void rising_edge_f(void)
+{
+  /* Logic: '<S71>/Logical Operator' incorporates:
+   *  Logic: '<S71>/Logical Operator1'
+   *  UnitDelay: '<S71>/UnitDelay'
+   */
+  rtDW.LogicalOperator = (rtDW.RelationalOperator4 && (!rtDW.UnitDelay_DSTATE_k));
+
+  /* Update for UnitDelay: '<S71>/UnitDelay' */
+  rtDW.UnitDelay_DSTATE_k = rtDW.RelationalOperator4;
+}
+
+/* Model step function */
+void BLDC_controller_step(void)
+{
+  int32_T rowIdx;
+  uint8_T rtb_Sum;
+  boolean_T rtb_LogicalOperator;
+  boolean_T rtb_LogicalOperator3;
+  int32_T rtb_Abs1;
+  int8_T rtPrevAction;
+  int8_T rtAction;
+  uint8_T rtb_Sum_a;
+  int16_T rtb_Switch;
+  int16_T rtb_Switch_b;
+  int16_T rtb_Sum1;
+  int16_T rtb_Sum1_c;
+  int32_T rtb_Switch1_idx_0;
+  int32_T rtb_Switch1_idx_1;
+  boolean_T rtb_Logic_idx_0;
+  uint8_T tmp;
+
+  /* Outputs for Atomic SubSystem: '<Root>/BLDC_controller' */
+  /* Sum: '<S21>/Sum' incorporates:
+   *  Gain: '<S21>/g_Ha'
+   *  Gain: '<S21>/g_Hb'
+   *  Inport: '<Root>/b_hallALeft '
+   *  Inport: '<Root>/b_hallBLeft'
+   *  Inport: '<Root>/b_hallCLeft'
+   */
+  rtb_Sum = (uint8_T)((uint32_T)(uint8_T)((uint32_T)(uint8_T)(rtU.b_hallALeft <<
+    2) + (uint8_T)(rtU.b_hallBLeft << 1)) + rtU.b_hallCLeft);
+
+  /* Logic: '<S20>/Logical Operator' incorporates:
+   *  Inport: '<Root>/b_hallALeft '
+   *  Inport: '<Root>/b_hallBLeft'
+   *  Inport: '<Root>/b_hallCLeft'
+   *  UnitDelay: '<S20>/UnitDelay'
+   *  UnitDelay: '<S20>/UnitDelay1'
+   *  UnitDelay: '<S20>/UnitDelay2'
+   */
+  rtb_LogicalOperator = (boolean_T)((rtU.b_hallALeft != 0) ^ (rtU.b_hallBLeft !=
+    0) ^ (rtU.b_hallCLeft != 0) ^ (rtDW.UnitDelay_DSTATE != 0) ^
+    (rtDW.UnitDelay1_DSTATE_p != 0)) ^ (rtDW.UnitDelay2_DSTATE != 0);
+
+  /* Logic: '<S23>/Logical Operator3' incorporates:
+   *  Constant: '<S23>/z_maxCntRst'
+   *  RelationalOperator: '<S23>/Relational Operator1'
+   *  UnitDelay: '<S23>/z_counterRawPrev'
+   */
+  rtb_LogicalOperator3 = (rtb_LogicalOperator || (rtDW.z_counterRawPrev_DSTATE >
+    rtP.z_maxCntRst));
+
+  /* Outputs for Enabled SubSystem: '<S12>/F01_03_Direction_Detection' */
+
+  /* Selector: '<S21>/Selector' incorporates:
+   *  Constant: '<S21>/vec_hallToPos'
+   *  UnitDelay: '<S21>/UnitDelay1'
+   */
+  F01_03_Direction_Detection(rtb_LogicalOperator, rtConstP.pooled27[rtb_Sum],
+    rtDW.UnitDelay1_DSTATE_g, &rtDW.Switch2_e, &rtDW.UnitDelay1_k,
+    &rtDW.F01_03_Direction_Detection_o);
+
+  /* End of Outputs for SubSystem: '<S12>/F01_03_Direction_Detection' */
+
+  /* Outputs for Enabled SubSystem: '<S23>/Edge_counter' */
+
+  /* Logic: '<S23>/Logical Operator2' incorporates:
+   *  UnitDelay: '<S23>/UnitDelay8'
+   */
+  Edge_counter(!rtDW.UnitDelay8_DSTATE, rtb_LogicalOperator, rtDW.Switch2_e,
+               rtDW.UnitDelay1_k, &rtDW.Sum2_l, &rtDW.Edge_counter_f);
+
+  /* End of Outputs for SubSystem: '<S23>/Edge_counter' */
+
+  /* Abs: '<S23>/Abs4' incorporates:
+   *  UnitDelay: '<S23>/UnitDelay10'
+   */
+  if (rtDW.rpm_signed_c < 0) {
+    rtb_Switch1_idx_0 = -rtDW.rpm_signed_c;
+  } else {
+    rtb_Switch1_idx_0 = rtDW.rpm_signed_c;
+  }
+
+  /* End of Abs: '<S23>/Abs4' */
+
+  /* RelationalOperator: '<S23>/Relational Operator4' incorporates:
+   *  Constant: '<S23>/n_thresSpdDeacv'
+   */
+  rtDW.RelationalOperator4 = (rtb_Switch1_idx_0 < rtP.n_thresSpdDeacv);
+
+  /* Outputs for Atomic SubSystem: '<S23>/rising_edge' */
+  rising_edge();
+
+  /* End of Outputs for SubSystem: '<S23>/rising_edge' */
+
+  /* CombinatorialLogic: '<S30>/Logic' incorporates:
+   *  Constant: '<S23>/z_nrEdgeSpdAcv'
+   *  Memory: '<S30>/Memory'
+   *  RelationalOperator: '<S23>/Relational Operator5'
+   */
+  rowIdx = (int32_T)(((((uint32_T)(rtDW.Sum2_l >= rtP.z_nrEdgeSpdAcv) << 1) +
+                       rtDW.LogicalOperator) << 1) + rtDW.Memory_PreviousInput);
+  rtb_Logic_idx_0 = rtConstP.pooled31[(uint32_T)rowIdx];
+
+  /* Switch: '<S23>/Switch' incorporates:
+   *  CombinatorialLogic: '<S30>/Logic'
+   *  Logic: '<S23>/Logical Operator1'
+   *  UnitDelay: '<S23>/z_counter2'
+   *  UnitDelay: '<S23>/z_counterRawPrev'
+   */
+  if (rtb_LogicalOperator3 && rtConstP.pooled31[(uint32_T)rowIdx]) {
+    rtb_Switch = rtDW.z_counterRawPrev_DSTATE;
+  } else {
+    rtb_Switch = rtDW.z_counter2_DSTATE;
+  }
+
+  /* End of Switch: '<S23>/Switch' */
+
+  /* Outputs for Triggered SubSystem: '<S23>/Raw_ Speed_calculation' */
+  Raw_Speed_calculation(rtb_LogicalOperator3, rtb_Switch, rtDW.Switch2_e,
+                        &rtDW.rpm_signed_c, &rtPrevZCX.Raw_Speed_calculation_m);
+
+  /* End of Outputs for SubSystem: '<S23>/Raw_ Speed_calculation' */
+
+  /* Outputs for Triggered SubSystem: '<S23>/Moving_Average_Filter' */
+
+  /* Outport: '<Root>/n_motLeft' */
+  Moving_Average_Filter(rtb_LogicalOperator3, rtDW.rpm_signed_c, &rtY.n_motLeft,
+                        &rtDW.Moving_Average_Filter_l,
+                        &rtPrevZCX.Moving_Average_Filter_l);
+
+  /* End of Outputs for SubSystem: '<S23>/Moving_Average_Filter' */
+
+  /* Abs: '<S15>/Abs5' incorporates:
+   *  Outport: '<Root>/n_motLeft'
+   */
+  if (rtY.n_motLeft < 0) {
+    rtb_Abs1 = -rtY.n_motLeft;
+  } else {
+    rtb_Abs1 = rtY.n_motLeft;
+  }
+
+  /* End of Abs: '<S15>/Abs5' */
+
+  /* Relay: '<S15>/Relay' */
+  if (rtb_Abs1 >= rtP.n_commDeacvHi) {
+    rtDW.Relay_Mode = true;
+  } else {
+    if (rtb_Abs1 <= rtP.n_commAcvLo) {
+      rtDW.Relay_Mode = false;
+    }
+  }
+
+  /* Switch: '<S32>/Switch1' incorporates:
+   *  Constant: '<S32>/Constant23'
+   *  UnitDelay: '<S32>/UnitDelay1'
+   */
+  if (rtb_LogicalOperator3) {
+    rtb_Sum1_c = 0;
+  } else {
+    rtb_Sum1_c = rtDW.UnitDelay1_DSTATE;
+  }
+
+  /* End of Switch: '<S32>/Switch1' */
+
+  /* Sum: '<S23>/Sum1' */
+  rtb_Sum1 = (int16_T)(1 + rtb_Sum1_c);
+
+  /* If: '<S2>/If1' incorporates:
+   *  Constant: '<S12>/z_ctrlTypSel1'
+   *  Constant: '<S21>/vec_hallToPos'
+   *  Inport: '<Root>/r_DCLeft'
+   *  Outport: '<Root>/a_elecAngleLeft'
+   *  Selector: '<S21>/Selector'
+   */
+  rtPrevAction = rtDW.If1_ActiveSubsystem;
+  rtAction = -1;
+  if (rtP.z_ctrlTypSel != 0) {
+    rtAction = 0;
+  }
+
+  rtDW.If1_ActiveSubsystem = rtAction;
+  if ((rtPrevAction != rtAction) && (rtPrevAction == 0)) {
+    F02_Electrical_Angle_Ca_Disable(&rtDW.Switch_PhaAdv_a, &rtY.a_elecAngleLeft);
+  }
+
+  if (rtAction == 0) {
+    /* Outputs for IfAction SubSystem: '<S2>/F02_Electrical_Angle_Calculation' incorporates:
+     *  ActionPort: '<S13>/Action Port'
+     */
+    F02_Electrical_Angle_Calculatio(rtU.r_DCLeft, rtConstP.pooled27[rtb_Sum],
+      rtDW.Switch2_e, rtb_Switch, rtb_Sum1, &rtDW.Switch_PhaAdv_a,
+      &rtY.a_elecAngleLeft);
+
+    /* End of Outputs for SubSystem: '<S2>/F02_Electrical_Angle_Calculation' */
+  }
+
+  /* End of If: '<S2>/If1' */
+
+  /* SwitchCase: '<S14>/Switch Case' incorporates:
+   *  Constant: '<S12>/z_ctrlTypSel1'
+   */
+  switch (rtP.z_ctrlTypSel) {
+   case 1:
+    /* Outputs for IfAction SubSystem: '<S14>/F03_01_Pure_Trapezoidal_Method' incorporates:
+     *  ActionPort: '<S43>/Action Port'
+     */
+    F03_01_Pure_Trapezoidal_Method(rtDW.Switch_PhaAdv_a, &rtDW.Merge,
+      &rtDW.Merge1, &rtDW.Merge2);
+
+    /* End of Outputs for SubSystem: '<S14>/F03_01_Pure_Trapezoidal_Method' */
+    break;
+
+   case 2:
+    /* Outputs for IfAction SubSystem: '<S14>/F03_02_Sinusoidal_Method' incorporates:
+     *  ActionPort: '<S45>/Action Port'
+     */
+    F03_02_Sinusoidal_Method(rtDW.Switch_PhaAdv_a, &rtDW.Merge, &rtDW.Merge1,
+      &rtDW.Merge2);
+
+    /* End of Outputs for SubSystem: '<S14>/F03_02_Sinusoidal_Method' */
+    break;
+
+   case 3:
+    /* Outputs for IfAction SubSystem: '<S14>/F03_02_Sinusoidal3rd_Method' incorporates:
+     *  ActionPort: '<S44>/Action Port'
+     */
+    F03_02_Sinusoidal3rd_Method(rtDW.Switch_PhaAdv_a, &rtDW.Merge, &rtDW.Merge1,
+      &rtDW.Merge2);
+
+    /* End of Outputs for SubSystem: '<S14>/F03_02_Sinusoidal3rd_Method' */
+    break;
+  }
+
+  /* End of SwitchCase: '<S14>/Switch Case' */
+
+  /* Abs: '<S15>/Abs1' incorporates:
+   *  Inport: '<Root>/r_DCLeft'
+   */
+  if (rtU.r_DCLeft < 0) {
+    rtb_Switch1_idx_0 = -rtU.r_DCLeft;
+  } else {
+    rtb_Switch1_idx_0 = rtU.r_DCLeft;
+  }
+
+  /* End of Abs: '<S15>/Abs1' */
+
+  /* Switch: '<S15>/Switch1' incorporates:
+   *  Constant: '<S12>/z_ctrlTypSel1'
+   *  Constant: '<S15>/CTRL_COMM'
+   *  Constant: '<S15>/r_commDCDeacv'
+   *  Constant: '<S21>/vec_hallToPos'
+   *  Inport: '<Root>/r_DCLeft'
+   *  Logic: '<S15>/Logical Operator3'
+   *  LookupNDDirect: '<S15>/z_commutMap_M1'
+   *  Product: '<S15>/Divide2'
+   *  Product: '<S15>/Divide4'
+   *  RelationalOperator: '<S15>/Relational Operator1'
+   *  RelationalOperator: '<S15>/Relational Operator2'
+   *  Relay: '<S15>/Relay'
+   *  Selector: '<S21>/Selector'
+   *
+   * About '<S15>/z_commutMap_M1':
+   *  2-dimensional Direct Look-Up returning a Column
+   */
+  if (rtDW.Relay_Mode && (rtb_Switch1_idx_0 > rtP.r_commDCDeacv) &&
+      (rtP.z_ctrlTypSel != 0)) {
+    rtb_Switch1_idx_0 = rtU.r_DCLeft * rtDW.Merge;
+    rtb_Switch1_idx_1 = rtU.r_DCLeft * rtDW.Merge1;
+    rtb_Abs1 = rtU.r_DCLeft * rtDW.Merge2;
+  } else {
+    if (rtConstP.pooled27[rtb_Sum] < 5) {
+      /* LookupNDDirect: '<S15>/z_commutMap_M1' incorporates:
+       *  Constant: '<S21>/vec_hallToPos'
+       *  Selector: '<S21>/Selector'
+       *
+       * About '<S15>/z_commutMap_M1':
+       *  2-dimensional Direct Look-Up returning a Column
+       */
+      tmp = rtConstP.pooled27[rtb_Sum];
+    } else {
+      /* LookupNDDirect: '<S15>/z_commutMap_M1'
+       *
+       * About '<S15>/z_commutMap_M1':
+       *  2-dimensional Direct Look-Up returning a Column
+       */
+      tmp = 5U;
+    }
+
+    /* LookupNDDirect: '<S15>/z_commutMap_M1'
+     *
+     * About '<S15>/z_commutMap_M1':
+     *  2-dimensional Direct Look-Up returning a Column
+     */
+    rtb_Abs1 = tmp * 3;
+    rtb_Switch1_idx_0 = rtU.r_DCLeft * rtConstP.pooled17[rtb_Abs1];
+    rtb_Switch1_idx_1 = rtConstP.pooled17[1 + rtb_Abs1] * rtU.r_DCLeft;
+    rtb_Abs1 = rtConstP.pooled17[2 + rtb_Abs1] * rtU.r_DCLeft;
+  }
+
+  /* End of Switch: '<S15>/Switch1' */
+
+  /* Outport: '<Root>/DC_phaALeft' incorporates:
+   *  Constant: '<S15>/Constant1'
+   *  Product: '<S15>/Divide1'
+   */
+  rtY.DC_phaALeft = rtb_Switch1_idx_0 / 1000;
+
+  /* Outport: '<Root>/DC_phaBLeft' incorporates:
+   *  Constant: '<S15>/Constant1'
+   *  Product: '<S15>/Divide1'
+   */
+  rtY.DC_phaBLeft = rtb_Switch1_idx_1 / 1000;
+
+  /* Outport: '<Root>/DC_phaCLeft' incorporates:
+   *  Constant: '<S15>/Constant1'
+   *  Product: '<S15>/Divide1'
+   */
+  rtY.DC_phaCLeft = rtb_Abs1 / 1000;
+
+  /* Sum: '<S61>/Sum' incorporates:
+   *  Gain: '<S61>/g_Ha'
+   *  Gain: '<S61>/g_Hb'
+   *  Inport: '<Root>/b_hallARight'
+   *  Inport: '<Root>/b_hallBRight'
+   *  Inport: '<Root>/b_hallCRight'
+   */
+  rtb_Sum_a = (uint8_T)((uint32_T)(uint8_T)((uint32_T)(uint8_T)(rtU.b_hallARight
+    << 2) + (uint8_T)(rtU.b_hallBRight << 1)) + rtU.b_hallCRight);
+
+  /* Logic: '<S60>/Logical Operator' incorporates:
+   *  Inport: '<Root>/b_hallARight'
+   *  Inport: '<Root>/b_hallBRight'
+   *  Inport: '<Root>/b_hallCRight'
+   *  UnitDelay: '<S60>/UnitDelay'
+   *  UnitDelay: '<S60>/UnitDelay1'
+   *  UnitDelay: '<S60>/UnitDelay2'
+   */
+  rtb_LogicalOperator = (boolean_T)((rtU.b_hallARight != 0) ^ (rtU.b_hallBRight
+    != 0) ^ (rtU.b_hallCRight != 0) ^ (rtDW.UnitDelay_DSTATE_j != 0) ^
+    (rtDW.UnitDelay1_DSTATE_f != 0)) ^ (rtDW.UnitDelay2_DSTATE_b != 0);
+
+  /* Logic: '<S63>/Logical Operator3' incorporates:
+   *  Constant: '<S63>/z_maxCntRst'
+   *  RelationalOperator: '<S63>/Relational Operator1'
+   *  UnitDelay: '<S63>/z_counterRawPrev'
+   */
+  rtb_LogicalOperator3 = (rtb_LogicalOperator || (rtDW.z_counterRawPrev_DSTATE_p
+    > rtP.z_maxCntRst));
+
+  /* Outputs for Enabled SubSystem: '<S52>/F01_03_Direction_Detection' */
+
+  /* Selector: '<S61>/Selector' incorporates:
+   *  Constant: '<S61>/vec_hallToPos'
+   *  UnitDelay: '<S61>/UnitDelay1'
+   */
+  F01_03_Direction_Detection(rtb_LogicalOperator, rtConstP.pooled27[rtb_Sum_a],
+    rtDW.UnitDelay1_DSTATE_j, &rtDW.Switch2, &rtDW.UnitDelay1,
+    &rtDW.F01_03_Direction_Detection_j);
+
+  /* End of Outputs for SubSystem: '<S52>/F01_03_Direction_Detection' */
+
+  /* Outputs for Enabled SubSystem: '<S63>/Edge_counter' */
+
+  /* Logic: '<S63>/Logical Operator2' incorporates:
+   *  UnitDelay: '<S63>/UnitDelay8'
+   */
+  Edge_counter(!rtDW.UnitDelay8_DSTATE_p, rtb_LogicalOperator, rtDW.Switch2,
+               rtDW.UnitDelay1, &rtDW.Sum2_i, &rtDW.Edge_counter_l);
+
+  /* End of Outputs for SubSystem: '<S63>/Edge_counter' */
+
+  /* Abs: '<S63>/Abs4' incorporates:
+   *  UnitDelay: '<S63>/UnitDelay10'
+   */
+  if (rtDW.rpm_signed < 0) {
+    rtb_Switch1_idx_0 = -rtDW.rpm_signed;
+  } else {
+    rtb_Switch1_idx_0 = rtDW.rpm_signed;
+  }
+
+  /* End of Abs: '<S63>/Abs4' */
+
+  /* RelationalOperator: '<S63>/Relational Operator4' incorporates:
+   *  Constant: '<S63>/n_thresSpdDeacv'
+   */
+  rtDW.RelationalOperator4 = (rtb_Switch1_idx_0 < rtP.n_thresSpdDeacv);
+
+  /* Outputs for Atomic SubSystem: '<S63>/rising_edge' */
+  rising_edge_f();
+
+  /* End of Outputs for SubSystem: '<S63>/rising_edge' */
+
+  /* CombinatorialLogic: '<S70>/Logic' incorporates:
+   *  Constant: '<S63>/z_nrEdgeSpdAcv'
+   *  Memory: '<S70>/Memory'
+   *  RelationalOperator: '<S63>/Relational Operator5'
+   */
+  rowIdx = (int32_T)(((((uint32_T)(rtDW.Sum2_i >= rtP.z_nrEdgeSpdAcv) << 1) +
+                       rtDW.LogicalOperator) << 1) + rtDW.Memory_PreviousInput_i);
+
+  /* Switch: '<S63>/Switch' incorporates:
+   *  CombinatorialLogic: '<S70>/Logic'
+   *  Logic: '<S63>/Logical Operator1'
+   *  UnitDelay: '<S63>/z_counter2'
+   *  UnitDelay: '<S63>/z_counterRawPrev'
+   */
+  if (rtb_LogicalOperator3 && rtConstP.pooled31[(uint32_T)rowIdx]) {
+    rtb_Switch_b = rtDW.z_counterRawPrev_DSTATE_p;
+  } else {
+    rtb_Switch_b = rtDW.z_counter2_DSTATE_h;
+  }
+
+  /* End of Switch: '<S63>/Switch' */
+
+  /* Outputs for Triggered SubSystem: '<S63>/Raw_ Speed_calculation' */
+  Raw_Speed_calculation(rtb_LogicalOperator3, rtb_Switch_b, rtDW.Switch2,
+                        &rtDW.rpm_signed, &rtPrevZCX.Raw_Speed_calculation_k);
+
+  /* End of Outputs for SubSystem: '<S63>/Raw_ Speed_calculation' */
+
+  /* Outputs for Triggered SubSystem: '<S63>/Moving_Average_Filter' */
+
+  /* Outport: '<Root>/n_motRight' */
+  Moving_Average_Filter(rtb_LogicalOperator3, rtDW.rpm_signed, &rtY.n_motRight,
+                        &rtDW.Moving_Average_Filter_n,
+                        &rtPrevZCX.Moving_Average_Filter_n);
+
+  /* End of Outputs for SubSystem: '<S63>/Moving_Average_Filter' */
+
+  /* Abs: '<S55>/Abs5' incorporates:
+   *  Outport: '<Root>/n_motRight'
+   */
+  if (rtY.n_motRight < 0) {
+    rtb_Abs1 = -rtY.n_motRight;
+  } else {
+    rtb_Abs1 = rtY.n_motRight;
+  }
+
+  /* End of Abs: '<S55>/Abs5' */
+
+  /* Relay: '<S55>/Relay' */
+  if (rtb_Abs1 >= rtP.n_commDeacvHi) {
+    rtDW.Relay_Mode_m = true;
+  } else {
+    if (rtb_Abs1 <= rtP.n_commAcvLo) {
+      rtDW.Relay_Mode_m = false;
+    }
+  }
+
+  /* Switch: '<S72>/Switch1' incorporates:
+   *  Constant: '<S72>/Constant23'
+   *  UnitDelay: '<S72>/UnitDelay1'
+   */
+  if (rtb_LogicalOperator3) {
+    rtb_Sum1_c = 0;
+  } else {
+    rtb_Sum1_c = rtDW.UnitDelay1_DSTATE_k;
+  }
+
+  /* End of Switch: '<S72>/Switch1' */
+
+  /* Sum: '<S63>/Sum1' */
+  rtb_Sum1_c++;
+
+  /* If: '<S3>/If1' incorporates:
+   *  Constant: '<S52>/z_ctrlTypSel1'
+   *  Constant: '<S61>/vec_hallToPos'
+   *  Inport: '<Root>/r_DCRight'
+   *  Outport: '<Root>/a_elecAngleRight'
+   *  Selector: '<S61>/Selector'
+   */
+  rtPrevAction = rtDW.If1_ActiveSubsystem_j;
+  rtAction = -1;
+  if (rtP.z_ctrlTypSel != 0) {
+    rtAction = 0;
+  }
+
+  rtDW.If1_ActiveSubsystem_j = rtAction;
+  if ((rtPrevAction != rtAction) && (rtPrevAction == 0)) {
+    F02_Electrical_Angle_Ca_Disable(&rtDW.Switch_PhaAdv, &rtY.a_elecAngleRight);
+  }
+
+  if (rtAction == 0) {
+    /* Outputs for IfAction SubSystem: '<S3>/F02_Electrical_Angle_Calculation' incorporates:
+     *  ActionPort: '<S53>/Action Port'
+     */
+    F02_Electrical_Angle_Calculatio(rtU.r_DCRight, rtConstP.pooled27[rtb_Sum_a],
+      rtDW.Switch2, rtb_Switch_b, rtb_Sum1_c, &rtDW.Switch_PhaAdv,
+      &rtY.a_elecAngleRight);
+
+    /* End of Outputs for SubSystem: '<S3>/F02_Electrical_Angle_Calculation' */
+  }
+
+  /* End of If: '<S3>/If1' */
+
+  /* SwitchCase: '<S54>/Switch Case' incorporates:
+   *  Constant: '<S52>/z_ctrlTypSel1'
+   */
+  switch (rtP.z_ctrlTypSel) {
+   case 1:
+    /* Outputs for IfAction SubSystem: '<S54>/F03_01_Pure_Trapezoidal_Method' incorporates:
+     *  ActionPort: '<S83>/Action Port'
+     */
+    F03_01_Pure_Trapezoidal_Method(rtDW.Switch_PhaAdv, &rtDW.Merge_j,
+      &rtDW.Merge1_m, &rtDW.Merge2_d);
+
+    /* End of Outputs for SubSystem: '<S54>/F03_01_Pure_Trapezoidal_Method' */
+    break;
+
+   case 2:
+    /* Outputs for IfAction SubSystem: '<S54>/F03_02_Sinusoidal_Method' incorporates:
+     *  ActionPort: '<S85>/Action Port'
+     */
+    F03_02_Sinusoidal_Method(rtDW.Switch_PhaAdv, &rtDW.Merge_j, &rtDW.Merge1_m,
+      &rtDW.Merge2_d);
+
+    /* End of Outputs for SubSystem: '<S54>/F03_02_Sinusoidal_Method' */
+    break;
+
+   case 3:
+    /* Outputs for IfAction SubSystem: '<S54>/F03_02_Sinusoidal3rd_Method' incorporates:
+     *  ActionPort: '<S84>/Action Port'
+     */
+    F03_02_Sinusoidal3rd_Method(rtDW.Switch_PhaAdv, &rtDW.Merge_j,
+      &rtDW.Merge1_m, &rtDW.Merge2_d);
+
+    /* End of Outputs for SubSystem: '<S54>/F03_02_Sinusoidal3rd_Method' */
+    break;
+  }
+
+  /* End of SwitchCase: '<S54>/Switch Case' */
+
+  /* Abs: '<S55>/Abs1' incorporates:
+   *  Inport: '<Root>/r_DCRight'
+   */
+  if (rtU.r_DCRight < 0) {
+    rtb_Switch1_idx_0 = -rtU.r_DCRight;
+  } else {
+    rtb_Switch1_idx_0 = rtU.r_DCRight;
+  }
+
+  /* End of Abs: '<S55>/Abs1' */
+
+  /* Switch: '<S55>/Switch1' incorporates:
+   *  Constant: '<S52>/z_ctrlTypSel1'
+   *  Constant: '<S55>/CTRL_COMM'
+   *  Constant: '<S55>/r_commDCDeacv'
+   *  Constant: '<S61>/vec_hallToPos'
+   *  Inport: '<Root>/r_DCRight'
+   *  Logic: '<S55>/Logical Operator3'
+   *  LookupNDDirect: '<S55>/z_commutMap_M1'
+   *  Product: '<S55>/Divide2'
+   *  Product: '<S55>/Divide4'
+   *  RelationalOperator: '<S55>/Relational Operator1'
+   *  RelationalOperator: '<S55>/Relational Operator2'
+   *  Relay: '<S55>/Relay'
+   *  Selector: '<S61>/Selector'
+   *
+   * About '<S55>/z_commutMap_M1':
+   *  2-dimensional Direct Look-Up returning a Column
+   */
+  if (rtDW.Relay_Mode_m && (rtb_Switch1_idx_0 > rtP.r_commDCDeacv) &&
+      (rtP.z_ctrlTypSel != 0)) {
+    rtb_Switch1_idx_0 = rtU.r_DCRight * rtDW.Merge_j;
+    rtb_Switch1_idx_1 = rtU.r_DCRight * rtDW.Merge1_m;
+    rtb_Abs1 = rtU.r_DCRight * rtDW.Merge2_d;
+  } else {
+    if (rtConstP.pooled27[rtb_Sum_a] < 5) {
+      /* LookupNDDirect: '<S55>/z_commutMap_M1' incorporates:
+       *  Constant: '<S61>/vec_hallToPos'
+       *  Selector: '<S61>/Selector'
+       *
+       * About '<S55>/z_commutMap_M1':
+       *  2-dimensional Direct Look-Up returning a Column
+       */
+      tmp = rtConstP.pooled27[rtb_Sum_a];
+    } else {
+      /* LookupNDDirect: '<S55>/z_commutMap_M1'
+       *
+       * About '<S55>/z_commutMap_M1':
+       *  2-dimensional Direct Look-Up returning a Column
+       */
+      tmp = 5U;
+    }
+
+    /* LookupNDDirect: '<S55>/z_commutMap_M1'
+     *
+     * About '<S55>/z_commutMap_M1':
+     *  2-dimensional Direct Look-Up returning a Column
+     */
+    rtb_Abs1 = tmp * 3;
+    rtb_Switch1_idx_0 = rtU.r_DCRight * rtConstP.pooled17[rtb_Abs1];
+    rtb_Switch1_idx_1 = rtConstP.pooled17[1 + rtb_Abs1] * rtU.r_DCRight;
+    rtb_Abs1 = rtConstP.pooled17[2 + rtb_Abs1] * rtU.r_DCRight;
+  }
+
+  /* End of Switch: '<S55>/Switch1' */
+
+  /* Outport: '<Root>/DC_phaARight' incorporates:
+   *  Constant: '<S55>/Constant1'
+   *  Product: '<S55>/Divide1'
+   */
+  rtY.DC_phaARight = rtb_Switch1_idx_0 / 1000;
+
+  /* Outport: '<Root>/DC_phaBRight' incorporates:
+   *  Constant: '<S55>/Constant1'
+   *  Product: '<S55>/Divide1'
+   */
+  rtY.DC_phaBRight = rtb_Switch1_idx_1 / 1000;
+
+  /* Update for UnitDelay: '<S20>/UnitDelay' incorporates:
+   *  Inport: '<Root>/b_hallALeft '
+   */
+  rtDW.UnitDelay_DSTATE = rtU.b_hallALeft;
+
+  /* Update for UnitDelay: '<S20>/UnitDelay1' incorporates:
+   *  Inport: '<Root>/b_hallBLeft'
+   */
+  rtDW.UnitDelay1_DSTATE_p = rtU.b_hallBLeft;
+
+  /* Update for UnitDelay: '<S20>/UnitDelay2' incorporates:
+   *  Inport: '<Root>/b_hallCLeft'
+   */
+  rtDW.UnitDelay2_DSTATE = rtU.b_hallCLeft;
+
+  /* Update for UnitDelay: '<S23>/z_counterRawPrev' */
+  rtDW.z_counterRawPrev_DSTATE = rtb_Sum1;
+
+  /* Update for UnitDelay: '<S21>/UnitDelay1' incorporates:
+   *  Constant: '<S21>/vec_hallToPos'
+   *  Selector: '<S21>/Selector'
+   */
+  rtDW.UnitDelay1_DSTATE_g = rtConstP.pooled27[rtb_Sum];
+
+  /* Update for UnitDelay: '<S23>/UnitDelay8' */
+  rtDW.UnitDelay8_DSTATE = rtb_Logic_idx_0;
+
+  /* Update for Memory: '<S30>/Memory' */
+  rtDW.Memory_PreviousInput = rtb_Logic_idx_0;
+
+  /* Update for UnitDelay: '<S23>/z_counter2' */
+  rtDW.z_counter2_DSTATE = rtb_Switch;
+
+  /* Update for UnitDelay: '<S32>/UnitDelay1' */
+  rtDW.UnitDelay1_DSTATE = rtb_Sum1;
+
+  /* Update for UnitDelay: '<S60>/UnitDelay' incorporates:
+   *  Inport: '<Root>/b_hallARight'
+   */
+  rtDW.UnitDelay_DSTATE_j = rtU.b_hallARight;
+
+  /* Update for UnitDelay: '<S60>/UnitDelay1' incorporates:
+   *  Inport: '<Root>/b_hallBRight'
+   */
+  rtDW.UnitDelay1_DSTATE_f = rtU.b_hallBRight;
+
+  /* Update for UnitDelay: '<S60>/UnitDelay2' incorporates:
+   *  Inport: '<Root>/b_hallCRight'
+   */
+  rtDW.UnitDelay2_DSTATE_b = rtU.b_hallCRight;
+
+  /* Update for UnitDelay: '<S63>/z_counterRawPrev' */
+  rtDW.z_counterRawPrev_DSTATE_p = rtb_Sum1_c;
+
+  /* Update for UnitDelay: '<S61>/UnitDelay1' incorporates:
+   *  Constant: '<S61>/vec_hallToPos'
+   *  Selector: '<S61>/Selector'
+   */
+  rtDW.UnitDelay1_DSTATE_j = rtConstP.pooled27[rtb_Sum_a];
+
+  /* Update for UnitDelay: '<S63>/UnitDelay8' incorporates:
+   *  CombinatorialLogic: '<S70>/Logic'
+   */
+  rtDW.UnitDelay8_DSTATE_p = rtConstP.pooled31[(uint32_T)rowIdx];
+
+  /* Update for Memory: '<S70>/Memory' incorporates:
+   *  CombinatorialLogic: '<S70>/Logic'
+   */
+  rtDW.Memory_PreviousInput_i = rtConstP.pooled31[(uint32_T)rowIdx];
+
+  /* Update for UnitDelay: '<S63>/z_counter2' */
+  rtDW.z_counter2_DSTATE_h = rtb_Switch_b;
+
+  /* Update for UnitDelay: '<S72>/UnitDelay1' */
+  rtDW.UnitDelay1_DSTATE_k = rtb_Sum1_c;
+
+  /* Outport: '<Root>/DC_phaCRight' incorporates:
+   *  Constant: '<S55>/Constant1'
+   *  Product: '<S55>/Divide1'
+   */
+  rtY.DC_phaCRight = rtb_Abs1 / 1000;
+
+  /* End of Outputs for SubSystem: '<Root>/BLDC_controller' */
+}
+
+/* Model initialize function */
+void BLDC_controller_initialize(void)
+{
+  /* Start for Atomic SubSystem: '<Root>/BLDC_controller' */
+  /* Start for If: '<S2>/If1' */
+  rtDW.If1_ActiveSubsystem = -1;
+
+  /* Start for If: '<S3>/If1' */
+  rtDW.If1_ActiveSubsystem_j = -1;
+
+  /* End of Start for SubSystem: '<Root>/BLDC_controller' */
+  rtPrevZCX.Raw_Speed_calculation_k.Raw_Speed_calculation_Trig_ZCE = POS_ZCSIG;
+  rtPrevZCX.Moving_Average_Filter_n.Moving_Average_Filter_Trig_ZCE = POS_ZCSIG;
+  rtPrevZCX.Raw_Speed_calculation_m.Raw_Speed_calculation_Trig_ZCE = POS_ZCSIG;
+  rtPrevZCX.Moving_Average_Filter_l.Moving_Average_Filter_Trig_ZCE = POS_ZCSIG;
+
+  /* SystemInitialize for Atomic SubSystem: '<Root>/BLDC_controller' */
+  /* InitializeConditions for UnitDelay: '<S23>/z_counter2' */
+  rtDW.z_counter2_DSTATE = 5000;
+
+  /* InitializeConditions for UnitDelay: '<S63>/z_counter2' */
+  rtDW.z_counter2_DSTATE_h = 5000;
+
+  /* End of SystemInitialize for SubSystem: '<Root>/BLDC_controller' */
+}
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */
diff --git a/Src/BLDC_controller_data.c b/Src/BLDC_controller_data.c
new file mode 100644
index 0000000..299e57f
--- /dev/null
+++ b/Src/BLDC_controller_data.c
@@ -0,0 +1,212 @@
+/*
+ * Academic License - for use in teaching, academic research, and meeting
+ * course requirements at degree granting institutions only.  Not for
+ * government, commercial, or other organizational use.
+ *
+ * File: BLDC_controller_data.c
+ *
+ * Code generated for Simulink model 'BLDC_controller'.
+ *
+ * Model version                  : 1.800
+ * Simulink Coder version         : 8.13 (R2017b) 24-Jul-2017
+ * C/C++ source code generated on : Sat May 25 21:42:39 2019
+ *
+ * Target selection: ert.tlc
+ * Embedded hardware selection: ARM Compatible->ARM Cortex
+ * Emulation hardware selection:
+ *    Differs from embedded hardware (MATLAB Host)
+ * Code generation objectives:
+ *    1. Execution efficiency
+ *    2. RAM efficiency
+ * Validation result: Not run
+ */
+
+#include "BLDC_controller.h"
+
+/* Block parameters (auto storage) */
+P rtP = {
+  /* Variable: cf_spdCoef
+   * Referenced by:
+   *   '<S29>/cf_spdCoef'
+   *   '<S69>/cf_spdCoef'
+   */
+  66667,
+
+  /* Variable: n_commAcvLo
+   * Referenced by:
+   *   '<S15>/Relay'
+   *   '<S55>/Relay'
+   */
+  100,
+
+  /* Variable: n_commDeacvHi
+   * Referenced by:
+   *   '<S15>/Relay'
+   *   '<S55>/Relay'
+   */
+  180,
+
+  /* Variable: n_thresSpdDeacv
+   * Referenced by:
+   *   '<S23>/n_thresSpdDeacv'
+   *   '<S63>/n_thresSpdDeacv'
+   */
+  5,
+
+  /* Variable: r_commDCDeacv
+   * Referenced by:
+   *   '<S15>/r_commDCDeacv'
+   *   '<S55>/r_commDCDeacv'
+   */
+  70,
+
+  /* Variable: r_phaAdvDC_XA
+   * Referenced by:
+   *   '<S13>/r_phaAdvDC_XA'
+   *   '<S53>/r_phaAdvDC_XA'
+   */
+  { 0, 100, 200, 300, 400, 500, 600, 700, 800, 900, 1000 },
+
+  /* Variable: a_phaAdv_M1
+   * Referenced by:
+   *   '<S13>/a_phaAdv_M2'
+   *   '<S53>/a_phaAdv_M2'
+   */
+  { 0, 0, 7, 2, 2, 2, 4, 5, 9, 16, 25 },
+
+  /* Variable: z_maxCntRst
+   * Referenced by:
+   *   '<S23>/z_maxCntRst'
+   *   '<S63>/z_maxCntRst'
+   *   '<S29>/z_maxCntRst'
+   *   '<S69>/z_maxCntRst'
+   */
+  2000,
+
+  /* Variable: z_ctrlTypSel
+   * Referenced by:
+   *   '<S12>/z_ctrlTypSel1'
+   *   '<S52>/z_ctrlTypSel1'
+   */
+  3U,
+
+  /* Variable: z_nrEdgeSpdAcv
+   * Referenced by:
+   *   '<S23>/z_nrEdgeSpdAcv'
+   *   '<S63>/z_nrEdgeSpdAcv'
+   */
+  5U,
+
+  /* Variable: b_phaAdvEna
+   * Referenced by:
+   *   '<S13>/a_elecPeriod1'
+   *   '<S53>/a_elecPeriod1'
+   */
+  1
+};
+
+/* Constant parameters (auto storage) */
+const ConstP rtConstP = {
+  /* Pooled Parameter (Expression: r_trapPhaA_M1)
+   * Referenced by:
+   *   '<S43>/r_trapPhaA_M1'
+   *   '<S83>/r_trapPhaA_M1'
+   */
+  { 1000, 1000, 1000, -1000, -1000, -1000, 1000 },
+
+  /* Pooled Parameter (Expression: r_trapPhaB_M1)
+   * Referenced by:
+   *   '<S43>/r_trapPhaB_M1'
+   *   '<S83>/r_trapPhaB_M1'
+   */
+  { -1000, -1000, 1000, 1000, 1000, -1000, -1000 },
+
+  /* Pooled Parameter (Expression: r_trapPhaC_M1)
+   * Referenced by:
+   *   '<S43>/r_trapPhaC_M1'
+   *   '<S83>/r_trapPhaC_M1'
+   */
+  { 1000, -1000, -1000, -1000, 1000, 1000, 1000 },
+
+  /* Pooled Parameter (Expression: r_sinPhaA_M1)
+   * Referenced by:
+   *   '<S45>/r_sinPhaA_M1'
+   *   '<S85>/r_sinPhaA_M1'
+   */
+  { 500, 643, 766, 866, 940, 985, 1000, 985, 940, 866, 766, 643, 500, 342, 174,
+    0, -174, -342, -500, -643, -766, -866, -940, -985, -1000, -985, -940, -866,
+    -766, -643, -500, -342, -174, 0, 174, 342, 500 },
+
+  /* Pooled Parameter (Expression: r_sinPhaB_M1)
+   * Referenced by:
+   *   '<S45>/r_sinPhaB_M1'
+   *   '<S85>/r_sinPhaB_M1'
+   */
+  { -1000, -985, -940, -866, -766, -643, -500, -342, -174, 0, 174, 342, 500, 643,
+    766, 866, 940, 985, 1000, 985, 940, 866, 766, 643, 500, 342, 174, 0, -174,
+    -342, -500, -643, -766, -866, -940, -985, -1000 },
+
+  /* Pooled Parameter (Expression: r_sinPhaC_M1)
+   * Referenced by:
+   *   '<S45>/r_sinPhaC_M1'
+   *   '<S85>/r_sinPhaC_M1'
+   */
+  { 500, 342, 174, 0, -174, -342, -500, -643, -766, -866, -940, -985, -1000,
+    -985, -940, -866, -766, -643, -500, -342, -174, 0, 174, 342, 500, 643, 766,
+    866, 940, 985, 1000, 985, 940, 866, 766, 643, 500 },
+
+  /* Pooled Parameter (Expression: r_sin3PhaA_M1)
+   * Referenced by:
+   *   '<S44>/r_sin3PhaA_M1'
+   *   '<S84>/r_sin3PhaA_M1'
+   */
+  { 795, 930, 991, 996, 971, 942, 930, 942, 971, 996, 991, 930, 795, 584, 310, 0,
+    -310, -584, -795, -930, -991, -996, -971, -942, -930, -942, -971, -996, -991,
+    -930, -795, -584, -310, 0, 310, 584, 795 },
+
+  /* Pooled Parameter (Expression: r_sin3PhaB_M1)
+   * Referenced by:
+   *   '<S44>/r_sin3PhaB_M1'
+   *   '<S84>/r_sin3PhaB_M1'
+   */
+  { -930, -942, -971, -996, -991, -930, -795, -584, -310, 0, 310, 584, 795, 930,
+    991, 996, 971, 942, 930, 942, 971, 996, 991, 930, 795, 584, 310, 0, -310,
+    -584, -795, -930, -991, -996, -971, -942, -930 },
+
+  /* Pooled Parameter (Expression: r_sin3PhaC_M1)
+   * Referenced by:
+   *   '<S44>/r_sin3PhaC_M1'
+   *   '<S84>/r_sin3PhaC_M1'
+   */
+  { 795, 584, 310, 0, -310, -584, -795, -930, -991, -996, -971, -942, -930, -942,
+    -971, -996, -991, -930, -795, -584, -310, 0, 310, 584, 795, 930, 991, 996,
+    971, 942, 930, 942, 971, 996, 991, 930, 795 },
+
+  /* Pooled Parameter (Expression: z_commutMap_M1)
+   * Referenced by:
+   *   '<S15>/z_commutMap_M1'
+   *   '<S55>/z_commutMap_M1'
+   */
+  { 1000, -1000, 0, 1000, 0, -1000, 0, 1000, -1000, -1000, 1000, 0, -1000, 0,
+    1000, 0, -1000, 1000 },
+
+  /* Pooled Parameter (Expression: vec_hallToPos)
+   * Referenced by:
+   *   '<S21>/vec_hallToPos'
+   *   '<S61>/vec_hallToPos'
+   */
+  { 0U, 5U, 3U, 4U, 1U, 0U, 2U, 0U },
+
+  /* Pooled Parameter (Expression: [0 1;1 0;0 1;0 1;1 0;1 0;0 0;0 0])
+   * Referenced by:
+   *   '<S30>/Logic'
+   *   '<S70>/Logic'
+   */
+  { 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0 }
+};
+
+/*
+ * File trailer for generated code.
+ *
+ * [EOF]
+ */
diff --git a/Src/bldc.c b/Src/bldc.c
index e5c609c..560aefe 100644
--- a/Src/bldc.c
+++ b/Src/bldc.c
@@ -1,16 +1,38 @@
+/*
+* This file has been re-implemented with 4 new selectable motor control methods.
+* Recommended control method: 3 = Sinusoidal 3rd order. This control method offers superior performanace
+* compared to previous method. The new method features:
+* ► reduced noise and vibrations
+* ► smooth torque output
+* ► improved motor efficiency -> lower energy consumption
+*
+* Copyright (C) 2019 Emanuel FERU <aerdronix@gmail.com>
+*
+* This program is free software: you can redistribute it and/or modify
+* it under the terms of the GNU General Public License as published by
+* the Free Software Foundation, either version 3 of the License, or
+* (at your option) any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
 
 #include "stm32f1xx_hal.h"
 #include "defines.h"
 #include "setup.h"
 #include "config.h"
 
+// Matlab includes
+#include "BLDC_controller.h"           /* Model's header file */
+#include "rtwtypes.h"
 
-volatile int posl = 0;
-volatile int posr = 0;
 volatile int pwml = 0;
 volatile int pwmr = 0;
-volatile int weakl = 0;
-volatile int weakr = 0;
 
 extern volatile int speed;
 
@@ -18,110 +40,13 @@ extern volatile adc_buf_t adc_buffer;
 
 extern volatile uint32_t timeout;
 
-uint32_t buzzerFreq = 0;
-uint32_t buzzerPattern = 0;
+uint32_t buzzerFreq     = 0;
+uint32_t buzzerPattern  = 0;
+uint32_t buzzerTimer    = 0;
 
-uint8_t enable = 0;
+uint8_t enable          = 0;
 
-const int pwm_res = 64000000 / 2 / PWM_FREQ; // = 2000
-
-const uint8_t hall_to_pos[8] = {
-    0,
-    0,
-    2,
-    1,
-    4,
-    5,
-    3,
-    0,
-};
-
-inline void blockPWM(int pwm, int pos, int *u, int *v, int *w) {
-  switch(pos) {
-    case 0:
-      *u = 0;
-      *v = pwm;
-      *w = -pwm;
-      break;
-    case 1:
-      *u = -pwm;
-      *v = pwm;
-      *w = 0;
-      break;
-    case 2:
-      *u = -pwm;
-      *v = 0;
-      *w = pwm;
-      break;
-    case 3:
-      *u = 0;
-      *v = -pwm;
-      *w = pwm;
-      break;
-    case 4:
-      *u = pwm;
-      *v = -pwm;
-      *w = 0;
-      break;
-    case 5:
-      *u = pwm;
-      *v = 0;
-      *w = -pwm;
-      break;
-    default:
-      *u = 0;
-      *v = 0;
-      *w = 0;
-  }
-}
-
-inline void blockPhaseCurrent(int pos, int u, int v, int *q) {
-  switch(pos) {
-    case 0:
-      *q = u - v;
-      // *u = 0;
-      // *v = pwm;
-      // *w = -pwm;
-      break;
-    case 1:
-      *q = u;
-      // *u = -pwm;
-      // *v = pwm;
-      // *w = 0;
-      break;
-    case 2:
-      *q = u;
-      // *u = -pwm;
-      // *v = 0;
-      // *w = pwm;
-      break;
-    case 3:
-      *q = v;
-      // *u = 0;
-      // *v = -pwm;
-      // *w = pwm;
-      break;
-    case 4:
-      *q = v;
-      // *u = pwm;
-      // *v = -pwm;
-      // *w = 0;
-      break;
-    case 5:
-      *q = -(u - v);
-      // *u = pwm;
-      // *v = 0;
-      // *w = -pwm;
-      break;
-    default:
-      *q = 0;
-      // *u = 0;
-      // *v = 0;
-      // *w = 0;
-  }
-}
-
-uint32_t buzzerTimer        = 0;
+const int pwm_res       = 64000000 / 2 / PWM_FREQ; // = 2000
 
 int offsetcount = 0;
 int offsetrl1   = 2000;
@@ -133,20 +58,11 @@ int offsetdcr   = 2000;
 
 float batteryVoltage = BAT_NUMBER_OF_CELLS * 4.0;
 
-int curl = 0;
-// int errorl = 0;
-// int kp = 5;
-// volatile int cmdl = 0;
-
-int last_pos = 0;
-int timer = 0;
-const int max_time = PWM_FREQ / 10;
-volatile int vel = 0;
-
 //scan 8 channels with 2ADCs @ 20 clk cycles per sample
 //meaning ~80 ADC clock cycles @ 8MHz until new DMA interrupt =~ 100KHz
 //=640 cpu cycles
 void DMA1_Channel1_IRQHandler() {
+
   DMA1->IFCR = DMA_IFCR_CTCIF1;
   // HAL_GPIO_WritePin(LED_PORT, LED_PIN, 1);
 
@@ -180,61 +96,6 @@ void DMA1_Channel1_IRQHandler() {
     RIGHT_TIM->BDTR |= TIM_BDTR_MOE;
   }
 
-  int ul, vl, wl;
-  int ur, vr, wr;
-
-  //determine next position based on hall sensors
-  uint8_t hall_ul = !(LEFT_HALL_U_PORT->IDR & LEFT_HALL_U_PIN);
-  uint8_t hall_vl = !(LEFT_HALL_V_PORT->IDR & LEFT_HALL_V_PIN);
-  uint8_t hall_wl = !(LEFT_HALL_W_PORT->IDR & LEFT_HALL_W_PIN);
-
-  uint8_t hall_ur = !(RIGHT_HALL_U_PORT->IDR & RIGHT_HALL_U_PIN);
-  uint8_t hall_vr = !(RIGHT_HALL_V_PORT->IDR & RIGHT_HALL_V_PIN);
-  uint8_t hall_wr = !(RIGHT_HALL_W_PORT->IDR & RIGHT_HALL_W_PIN);
-
-  uint8_t halll = hall_ul * 1 + hall_vl * 2 + hall_wl * 4;
-  posl          = hall_to_pos[halll];
-  posl += 2;
-  posl %= 6;
-
-  uint8_t hallr = hall_ur * 1 + hall_vr * 2 + hall_wr * 4;
-  posr          = hall_to_pos[hallr];
-  posr += 2;
-  posr %= 6;
-
-  blockPhaseCurrent(posl, adc_buffer.rl1 - offsetrl1, adc_buffer.rl2 - offsetrl2, &curl);
-
-  //setScopeChannel(2, (adc_buffer.rl1 - offsetrl1) / 8);
-  //setScopeChannel(3, (adc_buffer.rl2 - offsetrl2) / 8);
-
-
-  // uint8_t buzz(uint16_t *notes, uint32_t len){
-    // static uint32_t counter = 0;
-    // static uint32_t timer = 0;
-    // if(len == 0){
-        // return(0);
-    // }
-    
-    // struct {
-        // uint16_t freq : 4;
-        // uint16_t volume : 4;
-        // uint16_t time : 8;
-    // } note = notes[counter];
-    
-    // if(timer / 500 == note.time){
-        // timer = 0;
-        // counter++;
-    // }
-    
-    // if(counter == len){
-        // counter = 0;
-    // }
-
-    // timer++;
-    // return(note.freq);
-  // }
-
-
   //create square wave for buzzer
   buzzerTimer++;
   if (buzzerFreq != 0 && (buzzerTimer / 5000) % (buzzerPattern + 1) == 0) {
@@ -245,35 +106,64 @@ void DMA1_Channel1_IRQHandler() {
       HAL_GPIO_WritePin(BUZZER_PORT, BUZZER_PIN, 0);
   }
 
-  //update PWM channels based on position
-  blockPWM(pwml, posl, &ul, &vl, &wl);
-  blockPWM(pwmr, posr, &ur, &vr, &wr);
+  // ############################### MOTOR CONTROL ###############################
+  int ul, vl, wl;
+  int ur, vr, wr;
 
-  int weakul, weakvl, weakwl;
-  if (pwml > 0) {
-    blockPWM(weakl, (posl+5) % 6, &weakul, &weakvl, &weakwl);
-  } else {
-    blockPWM(-weakl, (posl+1) % 6, &weakul, &weakvl, &weakwl);
+  // Get hall sensors values
+  uint8_t hall_ul = !(LEFT_HALL_U_PORT->IDR & LEFT_HALL_U_PIN);
+  uint8_t hall_vl = !(LEFT_HALL_V_PORT->IDR & LEFT_HALL_V_PIN);
+  uint8_t hall_wl = !(LEFT_HALL_W_PORT->IDR & LEFT_HALL_W_PIN);
+
+  uint8_t hall_ur = !(RIGHT_HALL_U_PORT->IDR & RIGHT_HALL_U_PIN);
+  uint8_t hall_vr = !(RIGHT_HALL_V_PORT->IDR & RIGHT_HALL_V_PIN);
+  uint8_t hall_wr = !(RIGHT_HALL_W_PORT->IDR & RIGHT_HALL_W_PIN);
+
+  static boolean_T OverrunFlag = false;
+  /* Check for overrun */
+  if (OverrunFlag) {
+    return;
   }
-  ul += weakul;
-  vl += weakvl;
-  wl += weakwl;
+  OverrunFlag = true;
+ 
+    /* Set motor inputs here */
+    rtU.b_hallALeft   = hall_ul;
+    rtU.b_hallBLeft   = hall_vl;
+    rtU.b_hallCLeft   = hall_wl;
+    rtU.r_DCLeft      = pwml;
 
-  int weakur, weakvr, weakwr;
-  if (pwmr > 0) {
-    blockPWM(weakr, (posr+5) % 6, &weakur, &weakvr, &weakwr);
-  } else {
-    blockPWM(-weakr, (posr+1) % 6, &weakur, &weakvr, &weakwr);
-  }
-  ur += weakur;
-  vr += weakvr;
-  wr += weakwr;
+    rtU.b_hallARight  = hall_ur;
+    rtU.b_hallBRight  = hall_vr;
+    rtU.b_hallCRight  = hall_wr;
+    rtU.r_DCRight     = pwmr;
+
+    /* Step the controller */
+    BLDC_controller_step();
+
+    /* Get motor outputs here */
+    ul            = rtY.DC_phaALeft;
+    vl            = rtY.DC_phaBLeft;
+    wl            = rtY.DC_phaCLeft;
+  // motSpeedLeft = rtY.n_motLeft;
+  // motAngleLeft = rtY.a_elecAngleLeft;
+
+    ur            = rtY.DC_phaARight;
+    vr            = rtY.DC_phaBRight;
+    wr            = rtY.DC_phaCRight;
+ // motSpeedRight = rtY.n_motRight;
+ // motAngleRight = rtY.a_elecAngleRight;
+
+  /* Indicate task complete */
+  OverrunFlag = false;
+  // ###############################################################################
+
+  LEFT_TIM->LEFT_TIM_U    = CLAMP(ul + pwm_res / 2, 10, pwm_res-10);
+  LEFT_TIM->LEFT_TIM_V    = CLAMP(vl + pwm_res / 2, 10, pwm_res-10);
+  LEFT_TIM->LEFT_TIM_W    = CLAMP(wl + pwm_res / 2, 10, pwm_res-10);
+
+  RIGHT_TIM->RIGHT_TIM_U  = CLAMP(ur + pwm_res / 2, 10, pwm_res-10);
+  RIGHT_TIM->RIGHT_TIM_V  = CLAMP(vr + pwm_res / 2, 10, pwm_res-10);
+  RIGHT_TIM->RIGHT_TIM_W  = CLAMP(wr + pwm_res / 2, 10, pwm_res-10);
 
-  LEFT_TIM->LEFT_TIM_U = CLAMP(ul + pwm_res / 2, 10, pwm_res-10);
-  LEFT_TIM->LEFT_TIM_V = CLAMP(vl + pwm_res / 2, 10, pwm_res-10);
-  LEFT_TIM->LEFT_TIM_W = CLAMP(wl + pwm_res / 2, 10, pwm_res-10);
 
-  RIGHT_TIM->RIGHT_TIM_U = CLAMP(ur + pwm_res / 2, 10, pwm_res-10);
-  RIGHT_TIM->RIGHT_TIM_V = CLAMP(vr + pwm_res / 2, 10, pwm_res-10);
-  RIGHT_TIM->RIGHT_TIM_W = CLAMP(wr + pwm_res / 2, 10, pwm_res-10);
 }
diff --git a/Src/main.c b/Src/main.c
index b737a77..ddbd350 100644
--- a/Src/main.c
+++ b/Src/main.c
@@ -23,8 +23,13 @@
 #include "defines.h"
 #include "setup.h"
 #include "config.h"
+#include <stdlib.h>
 //#include "hd44780.h"
 
+// Matlab includes - from auto-code generation
+#include "BLDC_controller.h"           /* Model's header file */
+#include "rtwtypes.h"
+
 void SystemClock_Config(void);
 
 extern TIM_HandleTypeDef htim_left;
@@ -38,7 +43,6 @@ extern UART_HandleTypeDef huart2;
 
 int cmd1;  // normalized input values. -1000 to 1000
 int cmd2;
-int cmd3;
 
 typedef struct{
    int16_t steer;
@@ -55,8 +59,6 @@ int speed; // global variable for speed. -1000 to 1000
 
 extern volatile int pwml;  // global variable for pwm left. -1000 to 1000
 extern volatile int pwmr;  // global variable for pwm right. -1000 to 1000
-extern volatile int weakl; // global variable for field weakening left. -1000 to 1000
-extern volatile int weakr; // global variable for field weakening right. -1000 to 1000
 
 extern uint8_t buzzerFreq;    // global variable for the buzzer pitch. can be 1, 2, 3, 4, 5, 6, 7...
 extern uint8_t buzzerPattern; // global variable for the buzzer pattern. can be 1, 2, 3, 4, 5, 6, 7...
@@ -77,7 +79,7 @@ int milli_vel_error_sum = 0;
 
 
 void poweroff() {
-    if (abs(speed) < 20) {
+  //  if (abs(speed) < 20) {  // wait for the speed to drop, then shut down -> this is commented out for SAFETY reasons
         buzzerPattern = 0;
         enable = 0;
         for (int i = 0; i < 8; i++) {
@@ -86,11 +88,12 @@ void poweroff() {
         }
         HAL_GPIO_WritePin(OFF_PORT, OFF_PIN, 0);
         while(1) {}
-    }
+  //  }
 }
 
 
 int main(void) {
+
   HAL_Init();
   __HAL_RCC_AFIO_CLK_ENABLE();
   HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
@@ -127,6 +130,19 @@ int main(void) {
   HAL_ADC_Start(&hadc1);
   HAL_ADC_Start(&hadc2);
 
+//////////////////////////////////////
+  
+  /* Set BLDC controller parameters */
+  rtP.z_ctrlTypSel        = CTRL_TYP_SEL;
+  rtP.b_phaAdvEna         = PHASE_ADV_ENA;
+  rtP.n_commDeacvHi       = COMM_DEACV_HI;
+  rtP.n_commAcvLo         = COMM_ACV_LO;
+
+/* Initialize BLDC controller */
+  BLDC_controller_initialize();
+
+/////////////////////////////////////
+
   for (int i = 8; i >= 0; i--) {
     buzzerFreq = i;
     HAL_Delay(100);
@@ -137,7 +153,6 @@ int main(void) {
 
   int lastSpeedL = 0, lastSpeedR = 0;
   int speedL = 0, speedR = 0;
-  float direction = 1;
 
   #ifdef CONTROL_PPM
     PPM_Init();
@@ -180,6 +195,7 @@ int main(void) {
 
   enable = 1;  // enable motors
 
+
   while(1) {
     HAL_Delay(DELAY_IN_MAIN_LOOP); //delay in ms
 
@@ -201,8 +217,8 @@ int main(void) {
 
     #ifdef CONTROL_ADC
       // ADC values range: 0-4095, see ADC-calibration in config.h
-      cmd1 = CLAMP(adc_buffer.l_tx2 - ADC1_MIN, 0, ADC1_MAX) / (ADC1_MAX / 1000.0f);  // ADC1
-      cmd2 = CLAMP(adc_buffer.l_rx2 - ADC2_MIN, 0, ADC2_MAX) / (ADC2_MAX / 1000.0f);  // ADC2
+       cmd1 = CLAMP(adc_buffer.l_tx2 - ADC1_MIN, 0, ADC1_MAX) / (ADC1_MAX / 1000.0f);  // ADC1
+       cmd2 = CLAMP(adc_buffer.l_rx2 - ADC2_MIN, 0, ADC2_MAX) / (ADC2_MAX / 1000.0f);  // ADC2
 
       // use ADCs as button inputs:
       button1 = (uint8_t)(adc_buffer.l_tx2 > 2000);  // ADC1
@@ -218,7 +234,6 @@ int main(void) {
       timeout = 0;
     #endif
 
-
     // ####### LOW-PASS FILTER #######
     steer = steer * (1.0 - FILTER) + cmd1 * FILTER;
     speed = speed * (1.0 - FILTER) + cmd2 * FILTER;
@@ -234,7 +249,7 @@ int main(void) {
     #endif
 
 
-    // ####### SET OUTPUTS #######
+    // ####### SET OUTPUTS (if the target change less than +/- 50) #######
     if ((speedL < lastSpeedL + 50 && speedL > lastSpeedL - 50) && (speedR < lastSpeedR + 50 && speedR > lastSpeedR - 50) && timeout < TIMEOUT) {
     #ifdef INVERT_R_DIRECTION
       pwmr = speedR;
@@ -256,24 +271,27 @@ int main(void) {
       // ####### CALC BOARD TEMPERATURE #######
       board_temp_adc_filtered = board_temp_adc_filtered * 0.99 + (float)adc_buffer.temp * 0.01;
       board_temp_deg_c = ((float)TEMP_CAL_HIGH_DEG_C - (float)TEMP_CAL_LOW_DEG_C) / ((float)TEMP_CAL_HIGH_ADC - (float)TEMP_CAL_LOW_ADC) * (board_temp_adc_filtered - (float)TEMP_CAL_LOW_ADC) + (float)TEMP_CAL_LOW_DEG_C;
-      
+
       // ####### DEBUG SERIAL OUT #######
       #ifdef CONTROL_ADC
-        setScopeChannel(0, (int)adc_buffer.l_tx2);  // 1: ADC1
-        setScopeChannel(1, (int)adc_buffer.l_rx2);  // 2: ADC2
+        // setScopeChannel(0, (int)adc_buffer.l_tx2);        // 1: ADC1
+        // setScopeChannel(1, (int)adc_buffer.l_rx2);        // 2: ADC2
       #endif
-      setScopeChannel(2, (int)speedR);  // 3: output speed: 0-1000
-      setScopeChannel(3, (int)speedL);  // 4: output speed: 0-1000
-      setScopeChannel(4, (int)adc_buffer.batt1);  // 5: for battery voltage calibration
-      setScopeChannel(5, (int)(batteryVoltage * 100.0f));  // 6: for verifying battery voltage calibration
-      setScopeChannel(6, (int)board_temp_adc_filtered);  // 7: for board temperature calibration
-      setScopeChannel(7, (int)board_temp_deg_c);  // 8: for verifying board temperature calibration
+      setScopeChannel(0, (int)speedR);                    // 1: output command: [-1000, 1000]
+      setScopeChannel(1, (int)speedL);                    // 2: output command: [-1000, 1000]
+      setScopeChannel(2, (int)rtY.n_motRight);            // 3: Real motor speed [rpm]
+      setScopeChannel(3, (int)rtY.n_motLeft);             // 4: Real motor speed [rpm]
+      setScopeChannel(4, (int)adc_buffer.batt1);          // 5: for battery voltage calibration
+      setScopeChannel(5, (int)(batteryVoltage * 100.0f)); // 6: for verifying battery voltage calibration
+      setScopeChannel(6, (int)board_temp_adc_filtered);   // 7: for board temperature calibration
+      setScopeChannel(7, (int)board_temp_deg_c);          // 8: for verifying board temperature calibration
+
       consoleScope();
     }
 
 
     // ####### POWEROFF BY POWER-BUTTON #######
-    if (HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN) && weakr == 0 && weakl == 0) {
+    if (HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN)) {
       enable = 0;
       while (HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN)) {}
       poweroff();
diff --git a/build/hover.hex b/build/hover.hex
deleted file mode 100644
index 20d6a41..0000000
--- a/build/hover.hex
+++ /dev/null
@@ -1,1153 +0,0 @@
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-:1000000000C00020913D0008753D0008773D0008C4
-:10001000793D00087B3D00087D3D000800000000A0
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diff --git a/platformio.ini b/platformio.ini
new file mode 100644
index 0000000..b68b3e0
--- /dev/null
+++ b/platformio.ini
@@ -0,0 +1,22 @@
+; PlatformIO Project Configuration File2
+; http://docs.platformio.org/page/projectconf.html
+
+[platformio]
+include_dir = Inc
+
+[env:genericSTM32F103RC]
+platform        = ststm32
+framework       = stm32cube
+board           = genericSTM32F103RC
+debug_tool      = stlink
+upload_protocol = stlink
+
+build_flags =
+    -I${PROJECT_DIR}/inc/
+    -DUSE_HAL_DRIVER
+    -DSTM32F103xE
+    -Wl,-T./STM32F103RCTx_FLASH.ld
+    -Wl,-lc
+    -Wl,-lm
+    -g -ggdb        ; to generate correctly the 'firmware.elf' for STM STUDIO vizualization
+#    -Wl,-lnosys