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merge changes from CORE3 branch to fix compile issues for H2/P4 (#887)

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Michael Miller
2025-04-29 08:19:52 -07:00
committed by GitHub
parent 44d9572d5c
commit 0c397853a5
1 changed files with 8 additions and 7 deletions
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9
src/internal/methods/NeoEspBitBangMethod.cpp
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@@ -36,7 +36,7 @@ static inline uint32_t getCycleCount(void)
{ {
uint32_t ccount; uint32_t ccount;
#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) #if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
__asm__ __volatile__("csrr %0,0x7e2":"=r" (ccount)); __asm__ __volatile__("csrr %0,0x7e2":"=r" (ccount));
//ccount = esp_cpu_get_ccount(); //ccount = esp_cpu_get_ccount();
#else #else
@@ -46,7 +46,8 @@ static inline uint32_t getCycleCount(void)
} }
// Interrupt lock class, used for RAII interrupt disabling // Interrupt lock class, used for RAII interrupt disabling
class InterruptLock { class InterruptLock
{
#if defined(ARDUINO_ARCH_ESP32) #if defined(ARDUINO_ARCH_ESP32)
portMUX_TYPE updateMux; portMUX_TYPE updateMux;
#endif #endif
@@ -114,13 +115,13 @@ bool IRAM_ATTR neoEspBitBangWriteSpacingPixels(const uint8_t* pixels,
volatile uint32_t* setRegister; volatile uint32_t* setRegister;
volatile uint32_t* clearRegister; volatile uint32_t* clearRegister;
#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) #if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
if (pin < 32) if (pin < 32)
{ {
setRegister = &GPIO.out_w1ts.val; setRegister = &GPIO.out_w1ts.val;
clearRegister = &GPIO.out_w1tc.val; clearRegister = &GPIO.out_w1tc.val;
} }
#if !defined(CONFIG_IDF_TARGET_ESP32C3) #if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32H2)
else else
{ {
setRegister = &GPIO.out1_w1ts.val; setRegister = &GPIO.out1_w1ts.val;