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docs/DSP: fix some bit pattern inconsistencies

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Thanks to @Oaisus who reported this.
This commit is contained in:
Tillmann Karras
2025-07-27 14:14:59 +01:00
parent a6642d5f79
commit 288da38dc3
1 changed files with 6 additions and 5 deletions
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11
docs/DSP/GameCube_DSP_Users_Manual/GameCube_DSP_Users_Manual.tex
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@@ -46,7 +46,7 @@
% Document front page material % Document front page material
\title{\textbf{\Huge GameCube DSP User's Manual}} \title{\textbf{\Huge GameCube DSP User's Manual}}
\author{Reverse-engineered and documented by Duddie \\ \href{mailto:duddie@walla.com}{duddie@walla.com}} \author{Reverse-engineered and documented by Duddie \\ \href{mailto:duddie@walla.com}{duddie@walla.com}}
\date{\today\\v0.1.7} \date{\today\\v0.1.8}
% Title formatting commands % Title formatting commands
\newcommand{\OpcodeTitle}[1]{\subsection{#1}\label{instruction:#1}} \newcommand{\OpcodeTitle}[1]{\subsection{#1}\label{instruction:#1}}
@@ -265,6 +265,7 @@ The purpose of this documentation is purely academic and it aims at understandin
0.1.5 & 2022.09.29 & vpelletier & Fixed \texttt{BLOOP} and \texttt{BLOOPI} suboperation order \\ \hline 0.1.5 & 2022.09.29 & vpelletier & Fixed \texttt{BLOOP} and \texttt{BLOOPI} suboperation order \\ \hline
0.1.6 & 2022.06.20 & xperia64 & Accelerator documentation updates, fix register typo in ANDC and ORC descriptions \\ \hline 0.1.6 & 2022.06.20 & xperia64 & Accelerator documentation updates, fix register typo in ANDC and ORC descriptions \\ \hline
0.1.7 & 2025.04.21 & Tilka & Fixed typos and complained about GFDL \\ \hline 0.1.7 & 2025.04.21 & Tilka & Fixed typos and complained about GFDL \\ \hline
0.1.8 & 2025.07.27 & Tilka & Fixed some bit pattern inconsistencies in the 'LDAX* opcodes \\ \hline
\end{tabular} \end{tabular}
\end{table} \end{table}
@@ -4615,7 +4616,7 @@ When the main and extension opcodes write to the same register, the register is
\begin{DSPOpcode}{'LDAXM} \begin{DSPOpcode}{'LDAXM}
\begin{DSPOpcodeBytefield}{16} \begin{DSPOpcodeBytefield}{16}
\monobitbox{4}{xxxx} & \monobitbox{4}{xxxx} & \monobitbox{4}{11sr} & \monobitbox{4}{0011} \monobitbox{4}{xxxx} & \monobitbox{4}{xxxx} & \monobitbox{4}{11sr} & \monobitbox{4}{1011}
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
@@ -4642,7 +4643,7 @@ When the main and extension opcodes write to the same register, the register is
\begin{DSPOpcode}{'LDAXNM} \begin{DSPOpcode}{'LDAXNM}
\begin{DSPOpcodeBytefield}{16} \begin{DSPOpcodeBytefield}{16}
\monobitbox{4}{xxxx} & \monobitbox{4}{xxxx} & \monobitbox{4}{11sr} & \monobitbox{4}{0011} \monobitbox{4}{xxxx} & \monobitbox{4}{xxxx} & \monobitbox{4}{11sr} & \monobitbox{4}{1111}
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
@@ -4670,7 +4671,7 @@ When the main and extension opcodes write to the same register, the register is
\begin{DSPOpcode}{'LDAXN} \begin{DSPOpcode}{'LDAXN}
\begin{DSPOpcodeBytefield}{16} \begin{DSPOpcodeBytefield}{16}
\monobitbox{4}{xxxx} & \monobitbox{4}{xxxx} & \monobitbox{4}{11sr} & \monobitbox{4}{0011} \monobitbox{4}{xxxx} & \monobitbox{4}{xxxx} & \monobitbox{4}{11sr} & \monobitbox{4}{0111}
\end{DSPOpcodeBytefield} \end{DSPOpcodeBytefield}
\begin{DSPOpcodeFormat} \begin{DSPOpcodeFormat}
@@ -5214,7 +5215,7 @@ Instruction & Opcode & Page \\ \hline
\OpcodeRow{xxxx xxxx 11dr 10ss}{'LDM} \OpcodeRow{xxxx xxxx 11dr 10ss}{'LDM}
\OpcodeRow{xxxx xxxx 11sr 1011}{'LDAXM} \OpcodeRow{xxxx xxxx 11sr 1011}{'LDAXM}
\OpcodeRow{xxxx xxxx 11dr 11ss}{'LDNM} \OpcodeRow{xxxx xxxx 11dr 11ss}{'LDNM}
\OpcodeRow{xxxx xxxx 11dr 1111}{'LDAXNM} \OpcodeRow{xxxx xxxx 11sr 1111}{'LDAXNM}
\end{longtable} \end{longtable}
\end{center} \end{center}