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											2017-05-06 20:29:12 +03:00
										 |  |  | // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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							|  |  |  | //
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							|  |  |  | // Licensed under the Apache License, Version 2.0 (the "License");
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							|  |  |  | // you may not use this file except in compliance with the License.
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							|  |  |  | // You may obtain a copy of the License at
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							|  |  |  | //     http://www.apache.org/licenses/LICENSE-2.0
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							|  |  |  | //
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							|  |  |  | // Unless required by applicable law or agreed to in writing, software
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							|  |  |  | // distributed under the License is distributed on an "AS IS" BASIS,
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							|  |  |  | // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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							|  |  |  | // See the License for the specific language governing permissions and
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							|  |  |  | // limitations under the License.
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							|  |  |  | #pragma once
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							|  |  |  | #ifdef __cplusplus
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							|  |  |  | extern "C" { | 
					
						
							|  |  |  | #endif
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							|  |  |  | #include "esp_eth.h"
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										 |  |  | /** Common PHY-management functions.
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							|  |  |  |    These are not enough to drive any particular Ethernet PHY, but they provide a common configuration structure and | 
					
						
							|  |  |  |    management functions. | 
					
						
							|  |  |  | */ | 
					
						
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										 |  |  | /** Configure fixed pins for RMII data interface.
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							|  |  |  |    This configures GPIOs 0, 19, 22, 25, 26, 27 for use with RMII | 
					
						
							|  |  |  |    data interface. These pins cannot be changed, and must be wired to | 
					
						
							|  |  |  |    ethernet functions. | 
					
						
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							|  |  |  |    This is not sufficient to fully configure the Ethernet PHY, | 
					
						
							|  |  |  |    MDIO configuration interface pins (such as SMI MDC, MDO, MDI) | 
					
						
							|  |  |  |    must also be configured correctly in the GPIO matrix. | 
					
						
							|  |  |  | */ | 
					
						
							|  |  |  | void phy_rmii_configure_data_interface_pins(void); | 
					
						
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										 |  |  | /** Configure variable pins for SMI (MDIO) ethernet functions.
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							|  |  |  |    Calling this function along with mii_configure_default_pins() will | 
					
						
							|  |  |  |    fully configure the GPIOs for the ethernet PHY. | 
					
						
							|  |  |  |  */ | 
					
						
							|  |  |  | void phy_rmii_smi_configure_pins(uint8_t mdc_gpio, uint8_t mdio_gpio); | 
					
						
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										 |  |  | /** Enable flow control in standard PHY MII register.
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										 |  |  |  */ | 
					
						
							|  |  |  | void phy_mii_enable_flow_ctrl(void); | 
					
						
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							|  |  |  | bool phy_mii_check_link_status(void); | 
					
						
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							|  |  |  | bool phy_mii_get_partner_pause_enable(void); | 
					
						
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							|  |  |  | #ifdef __cplusplus
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							|  |  |  | } | 
					
						
							|  |  |  | #endif
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