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arduino-esp32/tools/sdk/esp32/lib/libwear_levelling.a

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Initial Commit
2020-05-09 19:11:30 +03:00
!<arch>
Add camera support first automated cmake build
2020-10-12 23:56:00 +03:00
/ 1602535650 0 0 0 2334 `
Initial Commit
2020-05-09 19:11:30 +03:00
S












Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
<00>@<00>@<00>@<00>@<00>@<00>@<00>@<00>@<00>@<00>@<00>@<00>@<00>@ <0C> <0C> <0C> <0C> <0C> <0C> <0C> <0C> <0C> <0C> <0C> <0C> <0C><01><><01><><01><><01><><01><><01><><01><><01><><01><><01><><01><>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>`<60>Z<>l@l@l@l@l@l@l@_ZN12Flash_Access5flushEv_ZN9Partition9chip_sizeEv_ZN9Partition12erase_sectorEj_ZN9Partition11sector_sizeEv_ZN9PartitionD2Ev_ZN9PartitionD1Ev_ZN9Partition11erase_rangeEjj_ZN9Partition5writeEjPKvj_ZN9Partition4readEjPvj_ZN9PartitionD0Ev_ZTV9Partition_ZN9PartitionC2EPK15esp_partition_t_ZN9PartitionC1EPK15esp_partition_t_ZN12Flash_Access5flushEv_ZN9SPI_Flash11sector_sizeEv_ZN9SPI_FlashD2Ev_ZN9SPI_FlashD1Ev_ZN9SPI_Flash9chip_sizeEv_ZN9SPI_Flash12erase_sectorEj_ZN9SPI_Flash11erase_rangeEjj_ZN9SPI_Flash5writeEjPKvj_ZN9SPI_Flash4readEjPvj_ZN9SPI_FlashD0Ev_ZTV9SPI_Flash_ZN9SPI_FlashC2Ev_ZN9SPI_FlashC1Ev_ZN11WL_Ext_Perf11sector_sizeEv_ZN11WL_Ext_Perf12erase_sectorEj_ZTV11WL_Ext_Perf_ZN11WL_Ext_PerfD2Ev_ZN11WL_Ext_PerfD1Ev_ZN11WL_Ext_PerfD0Ev_ZN11WL_Ext_PerfC2Ev_ZN11WL_Ext_PerfC1Ev_ZN11WL_Ext_Perf6configEP11WL_Config_sP12Flash_Access_ZN11WL_Ext_Perf4initEv_ZN11WL_Ext_Perf9chip_sizeEv_ZN11WL_Ext_Perf16erase_sector_fitEjj_ZN11WL_Ext_Perf11erase_rangeEjj_ZTV11WL_Ext_Safe_ZN11WL_Ext_SafeD2Ev_ZN11WL_Ext_SafeD1Ev_ZN11WL_Ext_SafeD0Ev_ZN11WL_Ext_SafeC2Ev_ZN11WL_Ext_SafeC1Ev_ZN11WL_Ext_Safe9chip_sizeEv_ZN11WL_Ext_Safe6configEP11WL_Config_sP12Flash_Access_ZN11WL_Ext_Safe16erase_sector_fitEjj_ZN11WL_Ext_Safe7recoverEv_ZN11WL_Ext_Safe4initEv_ZN8WL_Flash9chip_sizeEv_ZN8WL_Flash11sector_sizeEv_ZN8WL_FlashD2Ev_ZN8WL_FlashD1Ev_ZN8WL_FlashD0Ev_ZN8WL_Flash11erase_rangeEjj_ZN8WL_Flash5writeEjPKvj_ZN8WL_Flash4readEjPvj_ZN8WL_Flash6configEP11WL_Config_sP12Flash_Access_ZTV8WL_Flash_ZN8WL_FlashC2Ev_ZN8WL_FlashC1Ev_ZN8WL_Flash12initSectionsEv_ZN8WL_Flash10fillOkBuffEi_ZN8WL_Flash11updateV1_V2Ev_ZN8WL_Flash13updateVersionEv_ZN8WL_Flash5flushEv_ZN8WL_Flash12erase_sectorEj_ZN8WL_Flash9OkBuffSetEi_ZN8WL_Flash10recoverPosEv_ZN8WL_Flash4initEv_ZN8WL_Flash8updateWLEv_ZN8WL_Flash8calcAddrEj_ZN8WL_Flash7get_drvEv_ZN8WL_Flash7get_cfgEv_ZN5crc328crc32_leEjPKhjwl_unmountwl_erase_rangewl_writewl_readwl_sizewl_sector_sizewl_mount// 122 `
Initial Commit
2020-05-09 19:11:30 +03:00
Partition.cpp.obj/
SPI_Flash.cpp.obj/
WL_Ext_Perf.cpp.obj/
WL_Ext_Safe.cpp.obj/
WL_Flash.cpp.obj/
wear_levelling.cpp.obj/
Add camera support first automated cmake build
2020-10-12 23:56:00 +03:00
/0 1602535650 501 20 100644 34540 `
Try with speed optimization as opposed to debug. Coremark 240 -> 430
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ELF^t|4(CB<=$%>?6A <1D>6A<00>(H<1D>6A<00><02>@<40><11>(<28><00>-
Initial Commit
2020-05-09 19:11:30 +03:00
<1D>6A!<1D>6A<1D>wl_partitionE (%d) %s: erase_range - start_address=0x%08x, size=0x%08x, result=0x%08x
Try with speed optimization as opposed to debug. Coremark 240 -> 430
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Initial Commit
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
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2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
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2020-08-24 19:10:52 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Update IDF, tools and toolchains
2020-08-24 19:10:52 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
Update IDF, tools and toolchains
2020-08-24 19:10:52 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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2020-08-24 19:10:52 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
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2020-05-09 19:11:30 +03:00
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2020-05-09 19:11:30 +03:00
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esp_log.h esp_err.h spi_flash_types.h esp_flash.hesp_spi_flash.hesp_partition.hPartition.h<built-in>#               I ~      <     <03>  h    #  1         !  .   !     5         <03>   h       6{  6~    getenvatofop_lock_miscrandpoll_cmd_done_lock_t_on_exit_argssystem_writeregion_protected_wctomb_statemosi_data_ZSt3divll_r48ESP_PARTITION_TYPE_DATAESP_PARTITION_SUBTYPE_APP_OTA_10ESP_PARTITION_SUBTYPE_APP_OTA_11ESP_PARTITION_SUBTYPE_APP_OTA_12ESP_PARTITION_SUBTYPE_APP_OTA_13ESP_PARTITION_SUBTYPE_APP_OTA_14ESP_PARTITION_SUBTYPE_APP_OTA_15read_status_signal_bufmblenunsigned int__gnu_cxxSPI_FLASH_QOUT_lbfsize_flags_ZN9Partition5writeEjPKvj__int32_t_errnowchar_tesp_log_timestampESP_LOG_DEBUG_ZN9__gnu_cxx3divExxSPI_FLASH_DIO__sf_fake_stdout_LOCK_RECURSIVE_T_ZN9Partition11sector_sizeEvstrtoull_readESP_PARTITION_SUBTYPE_ANY_mbrlen_stateis_safe_write_address__vtbl_ptr_type_ZN12Flash_AccessC4ERKS__stdout23spi_flash_guard_funcs_t_fpos_thost_idle_fns_cookie_ZN12Flash_AccessD4Evstart_address_ZSt3absd_ZSt3abse_ZSt3absf__tm_wday_ZSt3abslstrtold_result_ZN9PartitionC4ERKS_strtolluint32_t_ZSt3absx__tm_hour23esp_partition_subtype_tmbtowcESP_PARTITION_SUBTYPE_APP_FACTORYcommon_command__countfloat__tm_minesp_partition_type_t/Users/ficeto/Desktop/ESP32/ESP32S2/esp32-arduino-lib-builder/build__sf_ZN9PartitionC2EPK15esp_partition_tsector_size_rand48resultspi_flash_guard_end_func_t_result_klong long unsigned int_asctime_buf__sFILE_wdshost_ZN12Flash_Access5writeEjPKvjwctomb__FILE_offsetesp_partition_readSPI_FLASH_QIOlldivatollESP_PARTITION_SUBTYPE_APP_OTA_7flush_cache_emergencyencryptedrelease_temp_bufferchip_idESP_PARTITION_SUBTYPE_APP_TESTread_data_slicersize_tstrtodsrandESP_PARTITION_SUBTYPE_APP_OTA_MINPartitionESP_PARTITION_SUBTYPE_DATA_PHY__tm_secsuboptarg__tm_yday_inc_indbsearchesp_flash_t_next_mbsrtowcs_stateread_idESP_LOG_NONEconfigure_host_io_modespi_flash_is_safe_write_address_t__valuemosi_len15esp_log_level_t_p5s21spi_flash_host_inst_t_ZN9Partition9chip_sizeEv10_mbstate_tesp_flash_io_mode_tspi_flash_host_driver_s_wcsrtombs_state_mblen_state17spi_flash_trans_tcharESP_PARTITION_TYPE_APP__tm_mday_sig_func_mbrtowc_state5div_terase_sectorerase_range_ZN12Flash_AccessC4EvFlash_Access_flock_tsectorESP_PARTITION_SUBTYPE_DATA_NVS__wch_iobsuint8_tos_func_on_exit_args_ptrg_flash_guard_default_opsquotget_temp_bufferdriver_close__sdidinit__sFILE_fake7lldiv_t19esp_flash_io_mode_tmbstowcs_ZN12Flash_Access9chip_sizeEv_stdin_gamma_signgam__in_chrg~Partitionlong long intyieldwritewrite_data_slicer_ZN12Flash_Access4readEjPvj_baseos_func_data_freelist_multread_mode__ULongesp_log_level_tESP_PARTITION_SUBTYPE_DATA_EFUSE_EM_ZdlPv_wcrtomb_state24esp_flash_os_functions_t_fileesp_flash_os_functions_t__cxx11exc_cause_tablechip_sizesupports_direct_readldiv__cleanup_mbstate_t_mprec__compar_fn_tsupports_direct_writesizespi_flash_guard_start_func_tcommand__tm_isdstset_write_protectESP_LOG_INFOspi_flash_op_unlock_func_t_ZN9PartitionD4Evstart_ZN12Flash_AccessC2EvSPI_FLASH_DOUTESP_PARTITION_SUBTYPE_DATA_ESPHTTPD_ZN9Partition11erase_rangeEjjoperator delete__tm_mon_ZN12Flash_Access5flushEv_ZN12Flash_Access11sector_sizeEvlong doublespi_flash_op_lock_func_tESP_PARTITION_SUBTYPE_DATA_FATpartitionSPI_FLASH_SLOWR
Initial Commit
2020-05-09 19:11:30 +03:00
ABI=0
Update IDF, tools and toolchains
2020-08-24 19:10:52 +03:00
(  ((((88":((((((<00><> "$&(*,-/135   678:<>") Ca~<00><00>:<00><00><00><00>(@S el,!${"<00>"Partition.cpp_ZN12Flash_Access5flushEv_ZN9Partition9chip_sizeEv_ZN9Partition12erase_sectorEj_ZN9Partition11sector_sizeEv_ZN9PartitionD2Ev_ZN9PartitionD1Ev_ZN9Partition11erase_rangeEjjesp_partition_erase_rangeesp_log_timestampesp_log_write_ZN9Partition5writeEjPKvjesp_partition_write_ZN9Partition4readEjPvjesp_partition_read_ZN9PartitionD0Ev_ZdlPv_ZTV9Partition_ZN9PartitionC2EPK15esp_partition_t_ZN9PartitionC1EPK15esp_partition_t
Initial Commit
2020-05-09 19:11:30 +03:00

Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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Add camera support first automated cmake build
2020-10-12 23:56:00 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
<1D>spi_flashE (%d) %s: erase_sector - sector=0x%08x, result=0x%08x
Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00

Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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2020-08-24 19:10:52 +03:00
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2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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2020-08-24 19:10:52 +03:00
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2020-05-09 19:11:30 +03:00
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2020-08-24 19:10:52 +03:00
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2020-05-09 19:11:30 +03:00
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2020-08-24 19:10:52 +03:00
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2020-05-09 19:11:30 +03:00
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2020-08-24 19:10:52 +03:00
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2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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2020-08-24 19:10:52 +03:00
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2020-10-11 19:51:11 +03:00
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2020-08-24 19:10:52 +03:00
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2020-10-11 19:51:11 +03:00
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2020-08-24 19:10:52 +03:00
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2020-05-09 19:11:30 +03:00
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2020-08-24 19:10:52 +03:00
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2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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esp_log.h esp_err.h esp_spi_flash.h SPI_Flash.h<built-in>#      <03>     <03>  Z  (    #      .           '  ' - '~  
   -         !  4  '         !  ?  &         !  <03>   Z  (     }   getenvatofop_lock_miscrand_lock_t_on_exit_argssystem_write_wctomb_state_ZSt3divll_r48_ZN9SPI_Flash11erase_rangeEjj_signal_bufmblenunsigned int__gnu_cxx_ZN12Flash_AccessC2Ev_lbfsize_flags__int32_t_errnowchar_tesp_log_timestamp_ZN9SPI_Flash9chip_sizeEvESP_LOG_DEBUG_ZN9__gnu_cxx3divExx__sf_fake_stdout_LOCK_RECURSIVE_Tstrtoull_read_mbrlen_stateis_safe_write_address__vtbl_ptr_type_ZN12Flash_AccessC4ERKS__stdout23spi_flash_guard_funcs_t_fpos_t_fns_cookiestart_address_ZSt3absd_ZSt3abse_ZSt3absf__tm_wday_ZSt3abslstrtold_resultstrtoll_ZSt3absx__tm_hourmbtowcSPI_Flash__countfloat__tm_min/Users/ficeto/Desktop/ESP32/ESP32S2/esp32-arduino-lib-builder/build__sfsector_size_rand48resultspi_flash_guard_end_func_t_result_klong long unsigned int_asctime_buf__sFILE_wdsspi_flash_get_chip_size_ZN12Flash_Access5writeEjPKvjwctomb~SPI_Flash__FILE_offset_ZN9SPI_FlashC2Evlldivatoll_ZN9SPI_FlashD0Ev_emergencysize_tstrtodsrand__tm_secsuboptarg__tm_yday_inc_indbsearch_next_mbsrtowcs_stateESP_LOG_NONE_ZN9SPI_FlashC4ERKS_spi_flash_is_safe_write_address_t__value15esp_log_level_t_p5s10_mbstate_t_wcsrtombs_state_mblen_statechar__tm_mday_sig_func_mbrtowc_state5div_terase_sectorerase_rangeFlash_Access_flock_tsector__wch_iobs_ZN12Flash_AccessD4Ev_on_exit_args_ptrg_flash_guard_default_opsquot_close__sdidinit__sFILE_fake7lldiv_tmbstowcs_ZN12Flash_Access9chip_sizeEv_stdin_gamma_signgamlong long intyieldwrite_ZN9SPI_FlashD4Ev_ZN12Flash_Access4readEjPvj_base_freelist_mult__ULongesp_log_level_t_ZdlPv_wcrtomb_state_ZN9SPI_Flash11sector_sizeEv_file__cxx11exc_cause_tablechip_sizeldiv__cleanup_mbstate_t_mprec__compar_fn_tsizespi_flash_guard_start_func_t__tm_isdstESP_LOG_INFOspi_flash_op_unlock_func_tspi_flash_writestartesp_log_writeoperator delete__tm_mon_ZN9SPI_FlashD2Ev_ZN12Flash_Access5flushEv_ZN12Flash_Access11sector_sizeEvlong doublespi_flash_op_lock_func_t_ZN9SPI_Flash12erase_sectorEj_atexit0this_rand_next_atexit_mbstate_ZN12Flash_AccessD2Ev_ZN12Flash_Access11erase_rangeEjjatexitshort int_Bigintlong int_signspi_flash_erase_sector_data__wchb_global_impure_ptr__tm_yearspi_flash_read_misc_reentESP_LOG_ERRORspi_flash_guard_funcs_tldiv_tspi_flash_erase_range_localtime_buf_cvtlen_maxwds_l64a_buf__in_chrgflush_blksize__tm_lockstrtoullong unsigned intESP_LOG_VERBOSE_niobswint_tint32_t_dso_handle_ZN9SPI_Flash5writeEjPKvj/Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/wear_levelling/SPI_Flash.cpp_ZN12Flash_Access12erase_sectorEj_cvtbufunsigned charESP_LOG_WARN_ZN9SPI_FlashC4Ev_getdate_err_ZN9SPI_Flash4readEjPvjdecltype(nullptr)strtof_addwcstombsstrtol_ZN12Flash_AccessD0Ev__sbufdiv_t_ZN12Flash_AccessC4Ev6ldiv_t_glue_vptr$Flash_Access__sglueop_unlock_strtok_last_mbtowc_stateesp_err_tGNU C++11 8.2.0 -mlongcalls -mfix-esp32-psram-cache-issue -mfix-esp32-psram-cache-strategy=memw -ggdb -O2 -std=gnu++11 -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -fstack-protector -fexceptions -fno-rtti_locale~Flash_Access_fnargssigned char_reentshort unsigned intlldiv_tg_flash_guard_no_os_opsatoiatol_fntypessrc_addr_sizedoublespi_flash_os_yield_t_off_t_nbufdest_addrbool_unspecified_locale_info__sf_fake_stderr_flags2_is_cxa_seed__locale_tdestread_seek_stderr_ubuf__sf_fake_stdinqsortGCC: (crosstool-NG esp-2020r2) 8.2.0 Xtensa_InfoUSE_ABSOLUTE_LITERALS=0
Initial Commit
2020-05-09 19:11:30 +03:00
ABI=0
Update IDF, tools and toolchains
2020-08-24 19:10:52 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Add camera support first automated cmake build
2020-10-12 23:56:00 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Update IDF, tools and toolchains
2020-08-24 19:10:52 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
WL_Ext_Cfg.h
ets_sys.h esp_log.h WL_Ext_Perf.h
WL_Flash.h
Flash_Access.h
Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
ABI=0
Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00

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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Add camera support first automated cmake build
2020-10-12 23:56:00 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
ets_sys.h esp_log.h WL_Ext_Safe.h
WL_Ext_Perf.h
Flash_Access.h
Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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  getenvatofstate_addrdump_addr_miscrand_ZN11WL_Ext_SafeD4Ev_lock_t_ZN11WL_Ext_Perf4initEverase_sector_fit_on_exit_argssystem_writestart_addr__FUNCTION___wctomb_state_ZSt3divll_r48_signal_bufmblenunsigned intversion__gnu_cxx_ZN11WL_Ext_Safe9chip_sizeEv_lbfsize_flags__int32_t_errnowchar_tesp_log_timestamppre_check_startESP_LOG_DEBUG_ZN9__gnu_cxx3divExx__sf_fake_stdout_LOCK_RECURSIVE_Tstrtoull_readWL_Config_s_mbrlen_state__vtbl_ptr_type_ZN12Flash_AccessC4ERKS__ZN11WL_Ext_Safe16erase_sector_fitEjj_stdout_fpos_t_fns_cookie_Bigint_ZSt3abse_ZSt3absf__tm_wday_ZSt3abslstrtold_ZN11WL_Ext_SafeD0Ev_resultstrtolluint32_t_ZSt3absx__tm_hourmbtowcfull_mem_size__count_ZN11WL_Ext_Perf6configEP11WL_Config_sP12Flash_Accessfloat__tm_min/Users/ficeto/Desktop/ESP32/ESP32S2/esp32-arduino-lib-builder/build__sfsector_size_rand48result_result_klong long unsigned int_asctime_bufrecover__sFILE_wds_ZN11WL_Ext_Safe7recoverEv_ZN12Flash_Access5writeEjPKvjwctomb__FILE_offsetlldivatollWL_Ext_Safe_emergencysize_tstrtodsrand__tm_seclocal_addr_basesuboptarg__tm_yday_inc_indbsearchlocal_addr_shift_next_mbsrtowcs_stateESP_LOG_NONE__value15esp_log_level_t_p5scount10_mbstate_t_wcsrtombs_state_mblen_statechar__tm_mday_sig_func_mbrtowc_state5div_terase_sector/Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/wear_levelling/WL_Ext_Safe.cpperase_rangeFlash_Access_flock_tupdaterate_ZN11WL_Ext_SafeC4Ev__wch_iobs_ZN12Flash_AccessD4Ev_on_exit_args_ptrquotstart_sector_close_ZN11WL_Ext_SafeC4ERKS___sdidinit__sFILE_fake7lldiv_tmbstowcs_ZN12Flash_Access9chip_sizeEv_stdin_gamma_signgamlong long intwrite_ZN11WL_Ext_Safe4initEv_ZN12Flash_Access4readEjPvj_base_freelist_mult__ULongesp_log_level_t_ZdlPv_wcrtomb_state_file__cxx11exc_cause_table_ZN11WL_Ext_Safe6configEP11WL_Config_sP12Flash_Accessldiv__cleanup_mbstate_t_mprecchip_size__compar_fn_t__tm_isdstESP_LOG_INFOesp_log_writeoperator delete__tm_mon_ZN12Flash_Access5flushEv_ZN12Flash_Access11sector_sizeEvlong double_atexit0this_atexit_mbstate_ZN11WL_Ext_SafeC2Evconfig__func___ZN12Flash_Access11erase_rangeEjjatexitshort intWL_Ext_Safe_Statelong int_sign_data__wchb_global_impure_ptr__tm_year_misc_reentESP_LOG_ERRORldiv_t_localtime_buf_cvtlen_maxwds_l64a_buf__in_chrgflush_blksize__tminit_lockstrtoullong unsigned interase_begin_ZN11WL_Ext_SafeD2EvESP_LOG_VERBOSE_niobswint_t_ZSt3absdint32_ttemp_buff_size_dso_handlestate_ZN12Flash_Access12erase_sectorEj_cvtbufunsigned charESP_LOG_WARN__uint32_t_getdate_errdecltype(nullptr)strtof_addwr_sizewcstombsstrtol__sbufdiv_t_ZN12Flash_AccessC4Ev6ldiv_t_glue_vptr$Flash_Access~WL_Ext_Safe__sglue_strtok_last_mbtowc_stateesp_err_tGNU C++11 8.2.0 -mlongcalls -mfix-esp32-psram-cache-issue -mfix-esp32-psram-cache-strategy=memw -ggdb -O2 -std=gnu++11 -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -fstack-protector -fexceptions -fno-rtti_locale~Flash_Access_fnargssigned char_reentshort unsigned intlldiv_tatoiatol_fntypesWL_Ext_Perf_sizedouble_off_t_nbufpage_size_unspecified_locale_info__sf_fake_stderr_flags2_is_cxa_seed_rand_next__locale_tread_seek_stderr_ubufflash_drv__sf_fake_stdinqsortGCC: (crosstool-NG esp-2020r2) 8.2.0 Xtensa_InfoUSE_ABSOLUTE_LITERALS=0
Initial Commit
2020-05-09 19:11:30 +03:00
ABI=0
Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
 (h< (h<(((((??B?<00>(666">("ff1"<00><00>"<00><00>1<00><00>E"Y"qqE"<00><00>;"<00><00>$"%"BB1"st"|}/<00>"<00>(??AK<00><00>8"<00><00> <00>"<00>)"("00"J(;;< "H(((((<00><>) W&"<00>'$<00>(&'()*,.023579;
 <=>@B<00>8!*<00>1FMbw<00><00><00><00><00>.@Nj<00> <00><00><00>J"<00><00>H$-Ef<00><00>WL_Ext_Safe.cpp_ZZN11WL_Ext_Safe6configEP11WL_Config_sP12Flash_AccessE12__FUNCTION___ZZN11WL_Ext_Safe16erase_sector_fitEjjE12__FUNCTION___ZZN11WL_Ext_Safe7recoverEvE12__FUNCTION___ZZN11WL_Ext_Safe4initEvE12__FUNCTION___ZTV11WL_Ext_Safe_ZN11WL_Ext_SafeD2Ev_ZN11WL_Ext_PerfD2Ev_ZN11WL_Ext_SafeD1Ev_ZN11WL_Ext_SafeD0Ev_ZdlPv_ZN11WL_Ext_SafeC2Ev_ZN11WL_Ext_PerfC2Ev_ZN11WL_Ext_SafeC1Ev_ZN11WL_Ext_Safe9chip_sizeEv_ZN8WL_Flash9chip_sizeEv_ZN11WL_Ext_Safe6configEP11WL_Config_sP12Flash_Access_ZN11WL_Ext_Perf6configEP11WL_Config_sP12Flash_Accessesp_log_timestampesp_log_write_ZN8WL_Flash11sector_sizeEv_ZN11WL_Ext_Safe16erase_sector_fitEjj_ZN8WL_Flash12erase_sectorEj_ZN8WL_Flash5writeEjPKvj_ZN11WL_Ext_Safe7recoverEv_ZN8WL_Flash4readEjPvj_ZN8WL_Flash11erase_rangeEjj_ZN11WL_Ext_Safe4initEv_ZN11WL_Ext_Perf4initEv_ZN11WL_Ext_Perf12erase_sectorEj_ZN11WL_Ext_Perf11erase_rangeEjj_ZN11WL_Ext_Perf11sector_sizeEv_ZN8WL_Flash5flushEv.0.03.58  :;<8= 8$=  ?;<; <$@(;,<0?4;8<<@@;D<H?L;P<T?X;\<`;d<  B;<; <$?(;,<0;4<8C  E;<A   0!! 0! 3 "" 5# 8$'$*$<
Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
, 8 D P \ h t <00> <00> <00> <00> <00> <00> <00> <00> <00> <00> <00>    ( 4 @ L X d p | <00> <00> <00> <00><00><00><00><00><00><00> $0<HT`lx<00><00><00><00><00><00>.symtab.strtab.shstrtab.rela.literal._ZN11WL_Ext_SafeD2Ev.rela.literal._ZN11WL_Ext_SafeD0Ev.rela.literal._ZN11WL_Ext_SafeC2Ev.rela.literal._ZN11WL_Ext_Safe9chip_sizeEv.rela.literal._ZN11WL_Ext_Safe6configEP11WL_Config_sP12Flash_Access.rela.literal._ZN11WL_Ext_Safe16erase_sector_fitEjj.rela.literal._ZN11WL_Ext_Safe7recoverEv.rela.literal._ZN11WL_Ext_Safe4initEv.text.data.bss.rela.text._ZN11WL_Ext_SafeD2Ev.rela.text._ZN11WL_Ext_SafeD0Ev.rela.text._ZN11WL_Ext_SafeC2Ev.rela.text._ZN11WL_Ext_Safe9chip_sizeEv.rodata._ZN11WL_Ext_Safe6configEP11WL_Config_sP12Flash_Access.str1.4.rela.text._ZN11WL_Ext_Safe6configEP11WL_Config_sP12Flash_Access.rela.text._ZN11WL_Ext_Safe16erase_sector_fitEjj.rela.text._ZN11WL_Ext_Safe7recoverEv.rela.text._ZN11WL_Ext_Safe4initEv.rodata._ZZN11WL_Ext_Safe16erase_sector_fitEjjE12__FUNCTION__.rodata._ZZN11WL_Ext_Safe7recoverEvE12__FUNCTION__.rodata._ZZN11WL_Ext_Safe4initEvE12__FUNCTION__.rodata._ZZN11WL_Ext_Safe6configEP11WL_Config_sP12Flash_AccessE12__FUNCTION__.rela.rodata._ZTV11WL_Ext_Safe.rela.debug_frame.rela.eh_frame.rela.debug_info.debug_abbrev.rela.debug_loc.rela.debug_aranges.rela.debug_ranges.rela.debug_line.debug_str.comment.xtensa.info.rela.xt.lit.rela.xt.prop.rela.xt.prop._ZTV11WL_Ext_Safe.group4D. H@_D CP >@(_$D f\a@L_D <00>d<00>@d_ D <00>h(<00>@p_xD
Add camera support first automated cmake build
2020-10-12 23:56:00 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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<1D>E (%d) %s: %s - erase wl dummy sector result= 0x%08x
Initial Commit
2020-05-09 19:11:30 +03:00
E (%d) %s: %s - not possible to read buffer, will try next time, result= 0x%08x
E (%d) %s: %s - not possible to write buffer, will try next time, result= 0x%08x
E (%d) %s: %s - update position 1 result= 0x%08x
E (%d) %s: %s - update position 2 result= 0x%08x
Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
ABI=0
Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
|
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00

!
Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
4
Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
8 < @DHLPTX\`dhlptx|<00><00><00><00><00>!<00>!<00>"<00>"<00>$<00>$<00>&<00>&<00>'<00>'<00>(<00>(<00>)<00>)
Initial Commit
2020-05-09 19:11:30 +03:00



Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00


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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Add camera support first automated cmake build
2020-10-12 23:56:00 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Update IDF, tools and toolchains
2020-08-24 19:10:52 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
: ; 9 I<17>B : ; 9 I <0C><>1 <0A><><18>B.?<n: ; 9 R<00>R<><00><01> /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/wear_levelling/Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/esp_rom/include/esp32/romcrc32.cppcrc32.hcrc.h      /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/wear_levelling/crc32.cpp/Users/ficeto/Desktop/ESP32/ESP32S2/esp32-arduino-lib-builder/buildunsigned char_ZN5crc328crc32_leEjPKhjshort unsigned intunsigned intlong long unsigned intlong long intshort intGNU C++11 8.2.0 -mlongcalls -mfix-esp32-psram-cache-issue -mfix-esp32-psram-cache-strategy=memw -ggdb -O2 -std=gnu++11 -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -fstack-protector -fexceptions -fno-rtticrc32signed charcrc32_leGCC: (crosstool-NG esp-2020r2) 8.2.0 Xtensa_InfoUSE_ABSOLUTE_LITERALS=0
Initial Commit
2020-05-09 19:11:30 +03:00
ABI=0
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Add camera support first automated cmake build
2020-10-12 23:56:00 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
ELF^<00><>4(HG0`,T<00><00>wear_levellingE (%d) %s: %s: invalid handle
Initial Commit
2020-05-09 19:11:30 +03:00
E (%d) %s: %s: instance[0x%08x] out of range
E (%d) %s: %s: instance[0x%08x] not initialized
Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
E (%d) %s: %s: can't allocate WL_Flash
E (%d) %s: %s: config instance=0x%08x, result=0x%x
E (%d) %s: %s: init instance=0x%08x, result=0x%x
Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
E (%d) %s: MAX_WL_HANDLES=%d instances already allocated
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Initial Commit
2020-05-09 19:11:30 +03:00
Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Update IDF, tools and toolchains
2020-08-24 19:10:52 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00

Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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2020-08-24 19:10:52 +03:00
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2020-10-11 19:51:11 +03:00
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2020-08-24 19:10:52 +03:00
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2020-10-11 19:51:11 +03:00
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2020-08-24 19:10:52 +03:00
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2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
ABI=0
Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
,(<00>,(<00>(&&(*"RT8"<00>(}}(@@"D(BB"F(BB"F(>>"B(>>"B(__`bee}}F"<00><00>B" 6"?@!"aauu#<00><00>T<00>(((((((((<00><>@.%<00>;-Q +k*<00> )<00>(<00>'!<00>&#$<00> ,&'()*+,-./13568:<>   ?@AC!},:QVbpDF<00>F<00>B<00>B!<00><00>$<00><00><00><00>wear_levelling.cpp_ZL11s_instances_ZL12check_handleiPKc_ZL16s_instances_lock_ZZ10wl_unmountE8__func___ZZ14wl_erase_rangeE8__func___ZZ8wl_writeE8__func___ZZ7wl_readE8__func___ZZ7wl_sizeE8__func___ZZ14wl_sector_sizeE8__func___ZZ8wl_mountE8__func__esp_log_timestampesp_log_writewl_unmount_lock_acquire_ZN8WL_Flash7get_drvEvfree_lock_close_lock_releasewl_erase_rangewl_writewl_readwl_sizewl_sector_sizewl_mountmalloc_ZN9PartitionC1EPK15esp_partition_t_ZN8WL_FlashC1Ev_ZN8WL_Flash6configEP11WL_Config_sP12Flash_Access_lock_init !787 8$7(8 ! :;<< =$>! :>! :>! :>! :>! :> !  $(:,E074F8E<7@8D>HGLHP7T8X7\8`Id>h<l>p<t7x8|> ++#<00>1+=+O<00>T+ i+v+(+ 7+ 8(T+++ 7F+ F 8`<00>c+$c 7+( 8,,,,  :,  q6,6 ;G,G <Z,Z <k, k =s,$s >---
Initial Commit
2020-05-09 19:11:30 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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