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<z<z<z<z__cxa_guard_acquire__cxa_guard_release__cxa_guard_abort__cxa_guard_dummy// 50 `
cxx_exception_stubs.cpp.obj/
cxx_guards.cpp.obj/
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Update IDF and Tools
2020-10-13 16:52:16 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
Update IDF and Tools
2020-10-13 16:52:16 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Update IDF and Tools
2020-10-13 16:52:16 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Update IDF and Tools
2020-10-13 16:52:16 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Update IDF and Tools
2020-10-13 16:52:16 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
<12>
Update IDF and Tools
2020-10-13 16:52:16 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
O0<14>
Update IDF and Tools
2020-10-13 16:52:16 +03:00
<EFBFBD>M<14>0*0<04>&f&<10> 0<04>E<>> 8 <0B>F:<18>0<04>0<04>G<04>H<04>G<04>00=<3D><17>?-j.8=<3D><17><0E>=$<17><0E>=<3D><17><0E>=<3D><17><0E>=,<17>?=h<17>?-?_.8O=<3D> <17>_=g<17>_=<3D><17>?=<3D><17>?-<2D> <00>.8<0F>=<3D><17><1B>=f<17>?=<3D><17>}=<3D><17>}=r<17>?=<3D><17>?=<3D><17>}=P<17>}=q<17>}=<3D>
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Initial Commit
2020-05-09 19:11:30 +03:00
J-o(.8
Update IDF and Tools
2020-10-13 16:52:16 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Update IDF and Tools
2020-10-13 16:52:16 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Update IDF and Tools
2020-10-13 16:52:16 +03:00
R!r<01>!&R<&r<00><00><00><00><00><00><00>GYd}&r<00><00><00><00><01> /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/cxx/Users/ficeto/.espressif/tools/xtensa-esp32s2-elf/esp-2020r3-8.4.0/xtensa-esp32s2-elf/xtensa-esp32s2-elf/include/c++/8.4.0/bits/Users/ficeto/.espressif/tools/xtensa-esp32s2-elf/esp-2020r3-8.4.0/xtensa-esp32s2-elf/xtensa-esp32s2-elf/include/c++/8.4.0/Users/ficeto/.espressif/tools/xtensa-esp32s2-elf/esp-2020r3-8.4.0/xtensa-esp32s2-elf/xtensa-esp32s2-elf/include/c++/8.4.0/debug/Users/ficeto/.espressif/tools/xtensa-esp32s2-elf/esp-2020r3-8.4.0/xtensa-esp32s2-elf/xtensa-esp32s2-elf/include/c++/8.4.0/xtensa-esp32s2-elf/no-rtti/bits/Users/ficeto/.espressif/tools/xtensa-esp32s2-elf/esp-2020r3-8.4.0/xtensa-esp32s2-elf/xtensa-esp32s2-elf/include/c++/8.4.0/ext/Users/ficeto/.espressif/tools/xtensa-esp32s2-elf/esp-2020r3-8.4.0/xtensa-esp32s2-elf/lib/gcc/xtensa-esp32s2-elf/8.4.0/include/Users/ficeto/.espressif/tools/xtensa-esp32s2-elf/esp-2020r3-8.4.0/xtensa-esp32s2-elf/xtensa-esp32s2-elf/sys-include/machine/Users/ficeto/.espressif/tools/xtensa-esp32s2-elf/esp-2020r3-8.4.0/xtensa-esp32s2-elf/xtensa-esp32s2-elf/sys-include/sys/Users/ficeto/.espressif/tools/xtensa-esp32s2-elf/esp-2020r3-8.4.0/xtensa-esp32s2-elf/xtensa-esp32s2-elf/sys-include/Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/xtensa/include/xtensa/Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/xtensa/esp32s2/include/xtensa/config/Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/esp_rom/include/esp32s2/rom/Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/soc/include/soc/Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/freertos/xtensa/include/freertos/Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/freertos/include/freertoscxx_guards.cppstl_algobase.hcstdlibstd_abs.htype_traitsstl_pair.hdebug.hc++config.halgorithmfwd.hexception_ptr.hnewpredefined_ops.hnumeric_traits.hstddef.h_default_types.hlock.h _types.h reent.h stdlib.h
Initial Commit
2020-05-09 19:11:30 +03:00
stdlib.hcxxabi_tweaks.h_stdint.h hal.h core.h ets_sys.h soc_memory_layout.hspinlock.hportmacro.hqueue.hsemphr.hassert.h
task.h<built-in>cxxabi.h<03> 
Update IDF and Tools
2020-10-13 16:52:16 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00
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Update IDF and Tools
2020-10-13 16:52:16 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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Update IDF and Tools
2020-10-13 16:52:16 +03:00
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2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00
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2020-10-11 19:51:11 +03:00
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2020-05-09 19:11:30 +03:00

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2020-10-11 19:51:11 +03:00
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
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Try with speed optimization as opposed to debug. Coremark 240 -> 430
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Update IDF and Tools
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ht<00><00><00><00><00><00><00><00><00><00><00>(4@LXdp|<00><00><00><00><00>.symtab.strtab.shstrtab.rela.literal._ZL20signal_waiting_tasksv.rela.literal.__cxa_guard_acquire.rela.literal.__cxa_guard_release.rela.literal.__cxa_guard_abort.text.data.bss.rela.text._ZL20signal_waiting_tasksv.rodata.__cxa_guard_acquire.str1.4.rela.text.__cxa_guard_acquire.rodata.__cxa_guard_release.str1.4.rela.text.__cxa_guard_release.rodata.__cxa_guard_abort.str1.4.rela.text.__cxa_guard_abort.text.__cxa_guard_dummy.rodata._ZZ17__cxa_guard_abortE19__PRETTY_FUNCTION__.rodata._ZZ19__cxa_guard_releaseE19__PRETTY_FUNCTION__.rodata._ZZL18wait_for_guard_objP7guard_tE19__PRETTY_FUNCTION__.rodata._ZZ19__cxa_guard_acquireE19__PRETTY_FUNCTION__.bss._ZL31s_static_init_max_waiting_count.bss._ZL27s_static_init_waiting_count.data._ZL15s_init_spinlock.bss._ZL22s_static_init_wait_sem.bss._ZL19s_static_init_mutex.rela.debug_frame.rela.eh_frame.rela.debug_info.debug_abbrev.rela.debug_loc.rela.debug_aranges.rela.debug_ranges.rela.debug_line.debug_str.comment.xtensa.info.rela.xt.lit.rela.xt.prop 4 @m$7 I@hD@(m,7 k<00>0f@Tn<00>7 <00><00>8<00>@<00>n<00>7 <00><00><00><00>&<00>@<00>oH7  <00>28Y<00>r@<00>ox7 !2?IH<00>D@Ls<00>7 c2<00>w<00>\<00><00>@<00>t<00>7 <00><00><00><00>-<00>,/%\"e<00>.<00><00><00><00><00><00><00>(<00>K<00><00>F@<00>v87! ]@pX@<00>w<00>7# l<00><00>&g@\x<00>7% x<00>-T<00><00>3<00>@<14>87( <00>7@<00>@L<><00>7* <00>H7h<00>@К<00>7, <00><00>7<00><00>@<00><><00>7. <00>0<00>F<00><00>0tc&<00><00>c8<00><00>c <00>@l<>073 <00>c<00><00>@<00><><00>75 <00>f<00>81 <00>jk`<60>
Try with speed optimization as opposed to debug. Coremark 240 -> 430
2020-10-11 19:51:11 +03:00

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