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arduino-esp32/tools/sdk/esp32s2/lib/libphy.a

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Initial Commit
2020-05-09 19:11:30 +03:00
!<arch>
/ 1586940082 0 0 0 4010 `
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8RFChannelSelphy_change_channelphy_rx_rifs_enram_get_i2c_read_maskrfpll_initi2c_bbtop_initbb_bss_cbw40_anai2c_sar2_init_codephy_i2c_initopen_i2c_xpddac_rate_setphy_dis_hw_set_freqphy_en_hw_set_freqpll_cap_print_enpll_vol_calpll_track_timerpll_cap_track_enwifi_track_pll_capchan_to_freqphy_get_fetx_delayphy_set_freqget_rf_freq_caprfpll_offset_deltaphy_freq_wifi_onlycorrect_rfpll_offsetwrite_freq_mem_allget_rf_freq_inittsens_read_inittsens_code_readtsens_index_to_dactsens_index_to_offsetphy_temp_dac_indexphy_temp_numtsens_dac_calphy_temp_codetsens_temp_readfreq_i2c_addrbt_wifi_chan_datawrite_wifi_chan_dataset_chan_freq_hw_initrf_initget_pll_ref_codephy_sw_set_chan_enphy_force_wifi_chan_enset_chan_freq_sw_startset_channel_rfpll_freqphy_freq_offsettx_fbw_enablechip_v7_set_chanchip_v7_set_chan_offsetchip_v7_set_chan_anaphy_set_wifi_mode_onlyphy_temp_code_initram_enable_agcdisable_wifi_agcenable_wifi_agcchip7_sleep_paramsset_tx_gain_tablephy_meas_noise_floorsw_scan_modenoise_check_loopram_tx_paon_seti2cmst_reg_initiq_corr_enablefe_reg_initagc_reg_initbb_reg_initforce_txonphy_reg_initset_pbus_regrf_close_flagphy_close_rfset_rx_gain_cal_iqset_rx_gain_cal_dcwr_rx_gain_memphy_rxbb_dcphy_rxrf_dcphy_chan_dcset_rx_gain_paramchip7_phy_init_ctrlspur_coef_cfgset_chanfreqbb_bss_cbw40set_chan_regphy_wakeup_initset_ccacorr_cca_thrset_rx_senseram_set_noise_floortx_rf_ana_gainphy_get_txpwr_paramnoise_arraynoise_timeout_flagnoise_inittarget_power_backoff_qdbtarget_power_backoffre_entryphy_init_flagphy_rx_gain_genchip_v7_set_chan_miscwifi_rx_gain_swp_stepset_rx_gain_tabletxiq_cal_initbb_initbt_rx_gain_swp_stepregister_chipv7_phy_init_paramphy_get_romfunc_addrrf_cal_data_recoveryrf_cal_data_backupphy_get_rf_cal_versionphy_rfcal_data_checkget_rxcal_param_addrphy_in_most_powerregister_chipv7_phyphy_set_most_tpw_disbgset_most_tpwset_most_pwr_regphy_set_most_tpw_indexphy_set_most_tpw_flagphy_set_most_tpwphy_get_most_tpwesp_tx_state_outchan14_mic_most_powerphy_in_most_power_bkchan14_mic_cfgchan14_mic_enchan14_mic_flagchan14_mic_enableadc_ana_conf_orgphy_get_adc_randwifi_filtbw_setrxmax_ext_levelram_read_sar_doutsar_dc_codesar_ref_codeget_sar_sig_refget_target_power_offsetwrite_txrate_power_offsetget_rate_fcc_indexphy_chan_target_powerget_rate_target_powerphy_chan_gain_tablewrite_wifi_dig_gainpkdet_vol_startread_sar2_codeget_sar2_volget_pll_volpocket_sar_powerphy_tx_power_outphy_tx_pwr_errortx_pwctrl_calpwdet_sar2_initen_pwdettxcal_debuge_modesar_delay_uspwdet_tone_startget_tone_sar_doutram_get_fm_sar_doutram_txiq_coverrxdc_est_minpbus_rx_dco_cal_1stepram_rxiq_set_regram_rxiq_cover_mg_mpram_get_rfcal_rxiq_datarc_calram_set_txcap_regget_power_attenrfcal_txiqpwdet_code_calrfcal_bb_atten_inittx_cap_initcal_rf_ana_gaintx_pwctrl_init_caltx_pwctrl_initget_bias_ref_codephy_get_vdd33txpwr_offsettx_pwctrl_bg_initget_phy_target_powerphy_in_vdd33_offsetset_chan_dig_gainphy_dis_pwdet_onephy_pwdet_always_enphy_pwdet_onetime_flagphy_pwdet_onetime_entx_pwctrl_track_numtx_pwctrl_backgroundtest_rx_gain_calrfrx_dcap_calrfpll_ref_volbias_ref_code// 78 `
phy_chip_v7_ana.o/
phy_chip_v7_cal.o/
phy_fpga_v7_cal.o/
phy_fpga_v7_init.o/
phy.o/ 1586940082 1000 1000 100644 1696 `
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2?4NRFChannelSelchip_v7_set_chanphy_change_channelset_chanfreqphy_rx_rifs_enrom_wifi_rifs_mode_en

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