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arduino-esp32/tools/sdk/esp32/lib/libesp_timer.a

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Initial Commit
2020-05-09 19:11:30 +03:00
!<arch>
Pull latest IDF and enable TinyUSB
2020-05-30 03:58:15 +03:00
/ 1590799774 0 0 0 934 `
update idf libs, disable WDT on S2, use malloc for PSRAM
2020-05-19 01:18:55 +03:00
&XXXXXXXXX<00>p<00>p<00>p<00>p<00>p<00>p<00>p<00>p<00>p<00>p<00>p<00>po<>o<>o<>o<>o<>o<>o<>o<>o<>o<>o<>o<>o<>o<>o<>o<>o<>esp_timer_createesp_timer_start_onceesp_timer_start_periodicesp_timer_stopesp_timer_deleteesp_timer_initesp_timer_deinitesp_timer_dumpesp_timer_get_next_alarmets_timer_setfnos_timer_setfnets_timer_arm_usos_timer_arm_usets_timer_armos_timer_armets_timer_doneos_timer_doneets_timer_disarmos_timer_disarmets_timer_initets_timer_deinits_time_update_lockesp_timer_impl_lockesp_timer_private_lockesp_timer_impl_unlockesp_timer_private_unlockesp_timer_impl_get_counter_regesp_timer_impl_get_timeesp_timer_get_timeesp_timer_impl_set_alarmesp_timer_impl_update_apb_freqesp_timer_private_update_apb_freqesp_timer_impl_advanceesp_timer_private_advanceesp_timer_impl_initesp_timer_impl_deinitesp_timer_impl_get_min_period_usesp_timer_impl_get_alarm_reg// 50 `
Initial Commit
2020-05-09 19:11:30 +03:00
ets_timer_legacy.c.obj/
esp_timer_impl_lac.c.obj/
Pull latest IDF and enable TinyUSB
2020-05-30 03:58:15 +03:00
esp_timer.c.obj/1590799772 501 20 100644 62172 `
update idf libs, disable WDT on S2, use malloc for PSRAM
2020-05-19 01:18:55 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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2020-05-19 01:18:55 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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2020-05-19 01:18:55 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
update idf libs, disable WDT on S2, use malloc for PSRAM
2020-05-19 01:18:55 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
update idf libs, disable WDT on S2, use malloc for PSRAM
2020-05-19 01:18:55 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
update idf libs, disable WDT on S2, use malloc for PSRAM
2020-05-19 01:18:55 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
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update idf libs, disable WDT on S2, use malloc for PSRAM
2020-05-19 01:18:55 +03:00
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esp_timer.h esp_log.h soc_memory_layout.h spinlock.h FreeRTOS.htask.hqueue.hsemphr.hesp_timer_impl.hassert.h<built-in><03>    
Initial Commit
2020-05-09 19:11:30 +03:00
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update idf libs, disable WDT on S2, use malloc for PSRAM
2020-05-19 01:18:55 +03:00
     u     <03>                                       [  %   <03> 
Initial Commit
2020-05-09 19:11:30 +03:00
   
            i    <03>      ~        +                     
update idf libs, disable WDT on S2, use malloc for PSRAM
2020-05-19 01:18:55 +03:00
    l   <03>           |     Xthal_cp_id_FPUXthal_cp_id_XCHAL_CP5_IDENTXthal_all_extra_sizeesp_timer_create_args_tsize_tXthal_itlb_arf_ways__locale_t__value__sfXthal_all_extra_alignXthal_have_booleansowner_readtimer_removeXthal_excm_level_writeXthal_rev_noint32_t_asctime_buf_cvtlenXthal_have_exceptionsESP_TIMER_TASKXthal_instrom_vaddrsoc_memory_type_desc_tXthal_cp_id_XCHAL_CP6_IDENT__func____tm_wcsrtombs_state_nbuf__tm_secs_timersXthal_have_sextBaseType_t_l64a_bufneed_yieldprint_bufXthal_tram_syncucDummy6timer_task_lockXthal_have_fpesp_timer_deinittype_multXthal_have_clampsXthal_dataram_paddrXthal_num_ibreakesp_timer_impl_initXthal_cpregs_restore_fnXthal_cp_id_XCHAL_CP7_IDENTXthal_have_ccountcallbackXthal_cp_numXthal_cpregs_save_nw_fn__wchXthal_xlmi_size__uint8_txSTATIC_LIST_fileresult_on_exit_argsXthal_dtlb_way_bitsiram_addressXthal_have_loopsXthal_icache_line_lockableXthal_num_instram_mbrlen_statelong inttimer_alarm_handler_result_k_size__builtin_memsetXthal_hw_configid0Xthal_hw_configid1pvDummy1Xthal_cp_names_localtime_bufXthal_dataram_vaddrtimer_insertesp_timer_createesp_timer_dispatch_t__tm_monXthal_dtlb_arf_ways_misc_reentXthal_dcache_sizes_timer_lockQueueHandle_tsigned charuint8_t__sf_fake_stdinaliased_iramXthal_intlevelperiod_usXthal_have_highlevel_interruptsXthal_xea_versionunsigned charXthal_itlb_wayssoc_memory_regionsxTaskCreatePinnedToCore_unspecified_locale_infoESP_LOG_WARN_reent_global_impure_ptrXthal_hw_release_minorTaskHandle_tXthal_have_tlbs_BoolXthal_cp_maxesp_timer_initXthal_release_minorcharmemsetvQueueDelete_fnsesp_timer_dumpXthal_num_writebuffer_entries_closeXthal_num_dbreakStaticList_tXthal_cpregs_save_fnSemaphoreHandle_t_frxt_setup_switchxQueueCreateCountingSemaphoreStaticXthal_mpu_bgmaptimer_stdinvTaskDeleteXthal_num_dataromtimer_list_unlockXthal_mmu_ringsstartup_stackESP_LOG_ERRORstreamXthal_datarom_paddrXthal_dcache_setwidthXthal_datarom_sizeXthal_mmu_asid_kernelfirstuxDummy2capsmuxDummydst_sizeXthal_tram_enabledXthal_release_internal_cookie__sFILE_fake_wdsxDummy1_sig_funcXthal_icache_linesizeXthal_have_minmax_offset_cvtbuf__assert_funcXthal_have_speculationXthal_datarom_vaddrXthal_hw_release_majorspinlockXthal_tram_pendingXthal_mmu_min_pte_page_sizefree__uint64_t_p5slong unsigned intXthal_release_majorXthal_mmu_ring_bitsbuf_sizeXthal_icache_size__sFILE__sdidinit_flags2Xthal_instram_paddr_LOCK_RECURSIVE_Talarm__sf_fake_stderruxDummy1_errnouxDummy4Xthal_cpregs_size_signal_bufStaticQueue_t/Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/esp_timer/src/esp_timer.c_Bigint_maxwdsargsXthal_have_cacheattr__cleanup_atexit0__intptr_tXthal_cp_mask_XCHAL_CP1_IDENTesp_timer_cb_tXthal_dtlb_wayss_timer_semaphore__uint32_t_emergency_lock_tXthal_instram_vaddrlong long intxPortInIsrContext_on_exit_args_ptrxSTATIC_MINI_LIST_ITEM_niobs__sglueXthal_hw_release_name_gamma_signgamesp_err_tXthal_have_xlt_cacheattrxQueueGiveFromISRXthal_cp_mask_XCHAL_CP2_IDENTtimer_list_lock_freelist_iobsXthal_intlevel_andbelow_mask_glue_signXthal_have_nmicountnext_alarmXthal_cp_id_XCHAL_CP4_IDENT__sf_fake_stdoutunsigned intXthal_debug_configuredintptr_tXthal_num_ccompareXthal_have_densityvPortExitCriticalesp_timer_impl_set_alarmXthal_have_interruptsXthal_cp_mask_XCHAL_CP3_IDENTXthal_dcache_ways_wcrtomb_stateXthal_build_unique_id__tm_mday/Users/ficeto/Desktop/ESP32/ESP32S2/esp32-arduino-lib-builder/buildXthal_instrom_size_ubufvPortExitCriticalSafeXthal_num_aregs_stderrout_handle_wctomb_state_mbstate_rand_next_flagsXthal_num_instrom_atexitsoc_memory_region_count__countxthal_MPU_entryXthal_dcache_is_writebackXthal_cp_mask_XCHAL_CP4_IDENTesp_timer_get_next_alarmGNU C99 8.2.0 -mlongcalls -mfix-esp32-psram-cache-issue -mfix-esp32-psram-cache-str
Initial Commit
2020-05-09 19:11:30 +03:00
ABI=0
update idf libs, disable WDT on S2, use malloc for PSRAM
2020-05-19 01:18:55 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
L
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update idf libs, disable WDT on S2, use malloc for PSRAM
2020-05-19 01:18:55 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
<00>
update idf libs, disable WDT on S2, use malloc for PSRAM
2020-05-19 01:18:55 +03:00
<00>/<00><00><00><00><00><00><00><00><00><00><00><00>%)04;?^bjnuy<00><00><00><00><00><00><00><00><00><00><00>&<00>&<00>&<00>&<00>&<00>&<00>&<00>&&& &&1%5%<%@%J%N%U%Y%c%g%n%r%|%<00>%<00>%<00>%<00>$<00>$<00>$<00>$<00>$<00>$<00>$<00>$<00>$<00>$<00>$<00>$<00>$<00>$$$!$%$1$5$A$E$Q$U$k$o$<00>#<00>#<00>#<00>#<00>#<00>#<00>#<00>#<00>#<00>#<00>#<00>#<00>#<00>#<00>#<00>#####"#&#2#6#L#P#w"{"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>""""$"("5 
Initial Commit
2020-05-09 19:11:30 +03:00
$
update idf libs, disable WDT on S2, use malloc for PSRAM
2020-05-19 01:18:55 +03:00
(,048<@DHLPTX \ `"d"h#l#p$t$x%|%<00>&<00>&<00>(<00>(<00>*<00>*<00>+<00>+<00>,<00>, 
Initial Commit
2020-05-09 19:11:30 +03:00

update idf libs, disable WDT on S2, use malloc for PSRAM
2020-05-19 01:18:55 +03:00
 $(,048<@DH L P"T"X#\#`$d$h%l%p&t&x(|(<00>*<00>*<00>+<00>+<00>,<00>,<00>K
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Initial Commit
2020-05-09 19:11:30 +03:00
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update idf libs, disable WDT on S2, use malloc for PSRAM
2020-05-19 01:18:55 +03:00
\ht<00><00><00><00><00><00><00><00><00><00><00>(4@LXdp|<00><00><00><00><00><00><00><00><00><00> $0<HT`l x <00> <00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>"<00>""" ",#8#D#P#\#h#t#<00>#<00>#<00>#<00>$<00>$<00>$<00>$<00>$<00>$<00>$<00>$$$$(%4%@%L%X%d%p%|%<00>%<00>&<00>&<00>&<00>&<00>&<00>&<00>&<00>(<00>(( (($(0(<(H(T(`*l*x*<00>*<00>*<00>*<00>*<00>+<00>+<00>+<00>+<00>+<00>+<00>+++ ,,,8,D,P,\-h.t/<00>0<00>1<00>2<00>3.symtab.strtab.shstrtab.rela.iram1.33.literal.rela.iram1.30.literal.rela.iram1.27.literal.rela.iram1.31.literal.rela.iram1.28.literal.rela.iram1.32.literal.rela.literal.timer_process_alarm.rela.literal.timer_task.rela.literal.print_timer_info.rela.literal.esp_timer_create.rela.iram1.24.literal.rela.iram1.25.literal.rela.iram1.26.literal.rela.literal.esp_timer_delete.rela.literal.esp_timer_init.rela.literal.esp_timer_deinit.rela.literal.esp_timer_dump.rela.iram1.34.literal.text.data.bss.iram1.29.rela.iram1.33.rela.iram1.30.rodata.str1.4.rela.iram1.27.rela.iram1.31.rela.iram1.28.rela.iram1.32.rela.text.timer_process_alarm.rodata.timer_task.str1.4.rela.text.timer_task.rodata.print_timer_info.str1.4.rela.text.print_timer_info.rela.text.esp_timer_create.rela.iram1.24.rela.iram1.25.rela.iram1.26.rela.text.esp_timer_delete.rodata.esp_timer_init.str1.4.rela.text.esp_timer_init.rela.text.esp_timer_deinit.rela.text.esp_timer_dump.rela.iram1.34.rodata.__func__$5306.rodata.__func__$5278.data.s_timer_lock.bss.s_timer_semaphore_memory.bss.s_timer_semaphore.bss.s_timer_task.bss.s_timers.rela.debug_frame.rela.debug_info.debug_abbrev.rela.debug_loc.rela.debug_aranges.rela.debug_ranges.rela.debug_line.debug_str.comment.xtensa.info.rela.xt.lit.rela.xt.prop 4@\{ l 782@h{0l NHI@<00>{Hl e``@<00>{0l |pw@|l  <00><00> <00>@(|$l  <00><00>4<00>@L|xl  <00><00><00>@<00>|Tl <00><00><00>@}l <00><00>@0}l #<00> @H}Hl :  5@<00>}`l Q, L@<00>}$l h8 c@~<l
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Pull latest IDF and enable TinyUSB
2020-05-30 03:58:15 +03:00
l] <00>]8<00><00>@<00><><00>l_ <00> 9<00><00>@<00><><00>la <00><00>9<00><00>@|<7C>Tlc <00>0<00>O<00><00>0yh&<00>h8<00>h<00>@<00><><00>lh #gi<00>@<00><><00>lj qmR (x3X<>,/0 1590799772 501 20 100644 30768 `
Initial Commit
2020-05-09 19:11:30 +03:00
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soc_memory_layout.h assert.h<built-in>1    ,   6  
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Pull latest IDF and enable TinyUSB
2020-05-30 03:58:15 +03:00
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Initial Commit
2020-05-09 19:11:30 +03:00
ELF^ 34(PO<00><><EFBFBD>?x<><78>?p<><70>?<3F><><EFBFBD>?|<7C><>?p<><70>?<3F><><EFBFBD>?<3F><><EFBFBD>?<3F><><EFBFBD>?4<00>p<><70>?<3F><00><00><><00><><EFBFBD>?<3F><><EFBFBD>?<3F><><EFBFBD>?p<><70>?<3F><><EFBFBD>?<3F><><EFBFBD>?<3F><><EFBFBD>?<3F><><EFBFBD>?<3F><><EFBFBD>?<3F><><EFBFBD>? <00><><EFBFBD>?<3F><>C<00>t<EFBFBD><74>?<4p<><70>?<3F><><EFBFBD>?2<00><><EFBFBD>?<3F><><EFBFBD>?6A<00> <0C><> <00><08><00><08><02> <00><1D>6A<00><00><00><1D>6A<00><00><00><1D>6A!<00> <00>!<00> <00><02><><EFBFBD>! <13> 9<02> F<00>!<00> <00><02><> )V<><56><00>!<00> 8!<00> ('<27><><1D>6A<00><00>+<01><>A<EFBFBD>" <20>1A<1D>6A<00><00><00><><EFBFBD><00><00>F<00><00><00><00><00>KZ <14>5B<> <20><05>308 <20><><11>$<24>72'<27><06><>]- C <04><00> <00><08><><EFBFBD><EFBFBD><EFBFBD><10> <00><08><00> Y <09><00> ) <09> <00><08><><00><> <20> <00><08> <00><00><00><><EFBFBD> <19>5<02><><00>"<22><><EFBFBD><EFBFBD>-<08>8V<00>(!<00> (7<>(<28><>`K<><4B>_1<5F><31> 78 ZDJ"M=<08>X <12>5 <02><><EFBFBD>"<06><><EFBFBD><00><00><><EFBFBD><00><00><00><00><00><1D>apb_ticks_per_us >= 3 && "divider value too low"/Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/esp_timer/src/esp_timer_impl_lac.capb_ticks_per_us % TICKS_PER_US == 0 && "APB frequency (in MHz) should be divisible by TICK_PER_US"6A<00><00><00><00>2<11><00><00><><EFBFBD><EFBFBD><00><00>b<11><00><00><><EFBFBD><EFBFBD><00><00><00><00> <00> <09><00><> !A0"<11><00>" ( <20> ) <09><00> <00><00><1D>6A<00><00><00><00><00><00><><EFBFBD><EFBFBD>': <08><><EFBFBD><EFBFBD><EFBFBD>/<05><><11><> <20><>!<00> <00>!<00> <00>! <13> 9<02><00> <00><00><1D>esp_timer_implE (%d) %s: esp_intr_alloc failed (0x%0x)
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