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https://github.com/0xFEEDC0DE64/arduino-esp32.git
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117 lines
5.3 KiB
C
117 lines
5.3 KiB
C
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/* Definitions for the xt_debug TIE package */
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/*
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* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
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* These coded instructions, statements, and computer programs are the
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* copyrighted works and confidential proprietary information of Tensilica Inc.
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* They may not be modified, copied, reproduced, distributed, or disclosed to
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* third parties in any manner, medium, or form, in whole or in part, without
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* the prior written consent of Tensilica Inc.
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*/
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/* Do not modify. This is automatically generated.*/
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#ifndef _XTENSA_xt_debug_HEADER
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#define _XTENSA_xt_debug_HEADER
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#ifdef __XTENSA__
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#ifdef __XCC__
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#include <xtensa/tie/xt_core.h>
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/*
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* The following prototypes describe intrinsic functions
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* corresponding to TIE instructions. Some TIE instructions
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* may produce multiple results (designated as "out" operands
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* in the iclass section) or may have operands used as both
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* inputs and outputs (designated as "inout"). However, the C
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* and C++ languages do not provide syntax that can express
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* the in/out/inout constraints of TIE intrinsics.
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* Nevertheless, the compiler understands these constraints
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* and will check that the intrinsic functions are used
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* correctly. To improve the readability of these prototypes,
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* the "out" and "inout" parameters are marked accordingly
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* with comments.
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*/
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extern void _TIE_xt_debug_BREAK(immediate imms, immediate immt);
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extern void _TIE_xt_debug_BREAK_N(immediate imms);
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extern unsigned _TIE_xt_debug_RSR_DBREAKA0(void);
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extern void _TIE_xt_debug_WSR_DBREAKA0(unsigned art);
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extern void _TIE_xt_debug_XSR_DBREAKA0(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_DBREAKC0(void);
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extern void _TIE_xt_debug_WSR_DBREAKC0(unsigned art);
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extern void _TIE_xt_debug_XSR_DBREAKC0(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_DBREAKA1(void);
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extern void _TIE_xt_debug_WSR_DBREAKA1(unsigned art);
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extern void _TIE_xt_debug_XSR_DBREAKA1(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_DBREAKC1(void);
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extern void _TIE_xt_debug_WSR_DBREAKC1(unsigned art);
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extern void _TIE_xt_debug_XSR_DBREAKC1(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_IBREAKA0(void);
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extern void _TIE_xt_debug_WSR_IBREAKA0(unsigned art);
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extern void _TIE_xt_debug_XSR_IBREAKA0(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_IBREAKA1(void);
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extern void _TIE_xt_debug_WSR_IBREAKA1(unsigned art);
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extern void _TIE_xt_debug_XSR_IBREAKA1(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_IBREAKENABLE(void);
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extern void _TIE_xt_debug_WSR_IBREAKENABLE(unsigned art);
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extern void _TIE_xt_debug_XSR_IBREAKENABLE(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_DEBUGCAUSE(void);
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extern void _TIE_xt_debug_WSR_DEBUGCAUSE(unsigned art);
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extern void _TIE_xt_debug_XSR_DEBUGCAUSE(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_ICOUNT(void);
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extern void _TIE_xt_debug_WSR_ICOUNT(unsigned art);
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extern void _TIE_xt_debug_XSR_ICOUNT(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_ICOUNTLEVEL(void);
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extern void _TIE_xt_debug_WSR_ICOUNTLEVEL(unsigned art);
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extern void _TIE_xt_debug_XSR_ICOUNTLEVEL(unsigned art /*inout*/);
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extern unsigned _TIE_xt_debug_RSR_DDR(void);
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extern void _TIE_xt_debug_WSR_DDR(unsigned art);
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extern void _TIE_xt_debug_XSR_DDR(unsigned art /*inout*/);
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extern void _TIE_xt_debug_LDDR32_P(const void * ars /*inout*/);
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extern void _TIE_xt_debug_SDDR32_P(void * ars /*inout*/);
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#define XT_BREAK _TIE_xt_debug_BREAK
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#define XT_BREAK_N _TIE_xt_debug_BREAK_N
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#define XT_RSR_DBREAKA0 _TIE_xt_debug_RSR_DBREAKA0
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#define XT_WSR_DBREAKA0 _TIE_xt_debug_WSR_DBREAKA0
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#define XT_XSR_DBREAKA0 _TIE_xt_debug_XSR_DBREAKA0
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#define XT_RSR_DBREAKC0 _TIE_xt_debug_RSR_DBREAKC0
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#define XT_WSR_DBREAKC0 _TIE_xt_debug_WSR_DBREAKC0
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#define XT_XSR_DBREAKC0 _TIE_xt_debug_XSR_DBREAKC0
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#define XT_RSR_DBREAKA1 _TIE_xt_debug_RSR_DBREAKA1
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#define XT_WSR_DBREAKA1 _TIE_xt_debug_WSR_DBREAKA1
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#define XT_XSR_DBREAKA1 _TIE_xt_debug_XSR_DBREAKA1
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#define XT_RSR_DBREAKC1 _TIE_xt_debug_RSR_DBREAKC1
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#define XT_WSR_DBREAKC1 _TIE_xt_debug_WSR_DBREAKC1
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#define XT_XSR_DBREAKC1 _TIE_xt_debug_XSR_DBREAKC1
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#define XT_RSR_IBREAKA0 _TIE_xt_debug_RSR_IBREAKA0
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#define XT_WSR_IBREAKA0 _TIE_xt_debug_WSR_IBREAKA0
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#define XT_XSR_IBREAKA0 _TIE_xt_debug_XSR_IBREAKA0
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#define XT_RSR_IBREAKA1 _TIE_xt_debug_RSR_IBREAKA1
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#define XT_WSR_IBREAKA1 _TIE_xt_debug_WSR_IBREAKA1
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#define XT_XSR_IBREAKA1 _TIE_xt_debug_XSR_IBREAKA1
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#define XT_RSR_IBREAKENABLE _TIE_xt_debug_RSR_IBREAKENABLE
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#define XT_WSR_IBREAKENABLE _TIE_xt_debug_WSR_IBREAKENABLE
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#define XT_XSR_IBREAKENABLE _TIE_xt_debug_XSR_IBREAKENABLE
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#define XT_RSR_DEBUGCAUSE _TIE_xt_debug_RSR_DEBUGCAUSE
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#define XT_WSR_DEBUGCAUSE _TIE_xt_debug_WSR_DEBUGCAUSE
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#define XT_XSR_DEBUGCAUSE _TIE_xt_debug_XSR_DEBUGCAUSE
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#define XT_RSR_ICOUNT _TIE_xt_debug_RSR_ICOUNT
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#define XT_WSR_ICOUNT _TIE_xt_debug_WSR_ICOUNT
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#define XT_XSR_ICOUNT _TIE_xt_debug_XSR_ICOUNT
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#define XT_RSR_ICOUNTLEVEL _TIE_xt_debug_RSR_ICOUNTLEVEL
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#define XT_WSR_ICOUNTLEVEL _TIE_xt_debug_WSR_ICOUNTLEVEL
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#define XT_XSR_ICOUNTLEVEL _TIE_xt_debug_XSR_ICOUNTLEVEL
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#define XT_RSR_DDR _TIE_xt_debug_RSR_DDR
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#define XT_WSR_DDR _TIE_xt_debug_WSR_DDR
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#define XT_XSR_DDR _TIE_xt_debug_XSR_DDR
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#define XT_LDDR32_P _TIE_xt_debug_LDDR32_P
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#define XT_SDDR32_P _TIE_xt_debug_SDDR32_P
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#endif /* __XCC__ */
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#endif /* __XTENSA__ */
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#endif /* !_XTENSA_xt_debug_HEADER */
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