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70 lines
2.5 KiB
C
70 lines
2.5 KiB
C
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/*******************************************************************************
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Copyright (c) 2006-2013 by Tensilica Inc. ALL RIGHTS RESERVED.
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These coded instructions, statements, and computer programs are the
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copyrighted works and confidential proprietary information of Tensilica Inc.
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They may not be modified, copied, reproduced, distributed, or disclosed to
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third parties in any manner, medium, or form, in whole or in part, without
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the prior written consent of Tensilica Inc.
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--------------------------------------------------------------------------------
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uart-16550-board.h Board-specific UART info on these boards:
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Avnet AV60 (XT-AV60)
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Avnet AV110 (XT-AV110)
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Avnet AV200 (XT-AV200)
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Xilinx ML605 (XT-ML605)
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Xilinx KC705 (XT-KC705)
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Interface between board-independent driver and board-specific header.
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This is used by a board-independent 16550 UART driver to obtain board-specific
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information about 1 instance of the 16550 UART on the board, such as the device
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register base address and spacing (a function of how the address lines are
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connected on the board) and the frequency of the UART clock. The driver does
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not refer directly to the board-specific header, which therefore is not
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constrained to use macro names consistent with other boards.
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!! Must not contain any board-specific macro names (only UART specific). !!
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Included at compile-time via an include path specific to the board.
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These boards contain a single 16550 UART implemented on the FPGA.
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Their clock frequency comes from the board's core clock (not its own crystal)
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which depends on the core config so is not a constant. Obtained via the BSP.
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*******************************************************************************/
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#ifndef _UART_16550_BOARD_H
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#define _UART_16550_BOARD_H
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#include <xtensa/xtbsp.h> /* BSP API */
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#include <xtensa/board.h> /* Board info */
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/* Base address of UART's registers. */
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#ifdef UART16550_VADDR
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#define UART_16550_REGBASE UART16550_VADDR
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#endif
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/*
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The UART's registers are connected at word addresses on these boards.
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Each byte-wide register appears as the least-significant-byte (LSB) of the
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word regardless of the endianness of the processor.
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*/
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#define UART_16550_REGSPACING 4
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typedef unsigned uart16550_reg_t;
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/* UART Clock Frequency in Hz */
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#define UART_16550_XTAL_FREQ xtbsp_clock_freq_hz()
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/* UART Interrupt Number */
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#ifdef UART16550_INTNUM
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#define UART_16550_INTNUM UART16550_INTNUM
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#endif
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/* Include generic information shared by all boards that use this device. */
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#include <xtensa/uart-16550.h>
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#endif /* _UART_16550_BOARD_H */
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