mirror of
https://github.com/0xFEEDC0DE64/arduino-esp32.git
synced 2025-07-29 02:07:15 +02:00
IDF master 3e370c4296
* Fix build compilation due to changes in the HW_TIMER's structs * Fix compilation warnings and errors with USB * Update USBCDC.cpp * Update CMakeLists.txt * Update HWCDC.cpp
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@ -260,7 +260,7 @@ esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *
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esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status);
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/**
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* @brief Write status to Falsh status register.
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* @brief Write status to Flash status register.
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* Please do not call this function in SDK.
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*
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* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
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@ -1,50 +0,0 @@
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include <sys/lock.h>
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#include <sys/reent.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Global variables used by newlib in ROM
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Note that any of these symbols which are used by both ROM & IDF will have duplicate copies
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in each "side" of the memory. However they're all pointers, and the pointers will be to the same
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thing, so it's not a big memory waste and functionality is the same.
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Some variables which look like they should be here, but aren't:
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- __sf_fake_stdin, __sf_fake_stdout, __sf_fake_stderr - These are defined in ROM because ROM includes findfp.c,
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but only used if _REENT_INIT or _REENT_INIT_PTR are ever called and ROM doesn't use these macros anywhere unless
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printf() or similar is called without initializing reent first. ESP-IDF sets up its own minimal reent structures.
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- __lock___sinit_recursive_mutex, etc. - these are combined into common_recursive_mutex & common_mutex to save space
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*/
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typedef struct {
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_LOCK_T common_recursive_mutex;
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_LOCK_T common_mutex;
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struct _reent *global_reent;
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} esp_rom_newlib_global_data_t;
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/* Called from IDF newlib component setup
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to initialize common data shared between ROM and IDF
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*/
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void esp_rom_newlib_init_global_data(const esp_rom_newlib_global_data_t *data);
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#ifdef __cplusplus
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}
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#endif
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@ -85,8 +85,7 @@ typedef enum {
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NO_MEAN = 0,
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POWERON_RESET = 1, /**<1, Vbat power on reset*/
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RTC_SW_SYS_RESET = 3, /**<3, Software reset digital core*/
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DEEPSLEEP_RESET = 5, /**<3, Deep Sleep reset digital core*/
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SDIO_RESET = 6, /**<6, Reset by SLC module, reset digital core*/
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DEEPSLEEP_RESET = 5, /**<5, Deep Sleep reset digital core*/
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TG0WDT_SYS_RESET = 7, /**<7, Timer Group0 Watch dog reset digital core*/
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TG1WDT_SYS_RESET = 8, /**<8, Timer Group1 Watch dog reset digital core*/
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RTCWDT_SYS_RESET = 9, /**<9, RTC Watch dog Reset digital core*/
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@ -96,8 +95,13 @@ typedef enum {
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RTCWDT_CPU_RESET = 13, /**<13, RTC Watch dog Reset CPU*/
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RTCWDT_BROWN_OUT_RESET = 15, /**<15, Reset when the vdd voltage is not stable*/
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RTCWDT_RTC_RESET = 16, /**<16, RTC Watch dog reset digital core and rtc module*/
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TG1WDT_CPU_RESET = 17, /**<11, Time Group1 reset CPU*/
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SUPER_WDT_RESET = 18, /**<11, super watchdog reset digital core and rtc module*/
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TG1WDT_CPU_RESET = 17, /**<17, Time Group1 reset CPU*/
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SUPER_WDT_RESET = 18, /**<18, super watchdog reset digital core and rtc module*/
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GLITCH_RTC_RESET = 19, /**<19, glitch reset digital core and rtc module*/
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EFUSE_RESET = 20, /**<20, efuse reset digital core*/
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USB_UART_CHIP_RESET = 21, /**<21, usb uart reset digital core */
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USB_JTAG_CHIP_RESET = 22, /**<22, usb jtag reset digital core */
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POWER_GLITCH_RESET = 23, /**<23, power glitch reset digital core and rtc module*/
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} RESET_REASON;
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// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
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@ -112,7 +116,13 @@ _Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RT
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_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
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_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
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_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
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_Static_assert((soc_reset_reason_t)TG1WDT_CPU_RESET == RESET_REASON_CPU0_MWDT1, "TG1WDT_CPU_RESET != RESET_REASON_CPU0_MWDT1");
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_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
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_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
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_Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "EFUSE_RESET != RESET_REASON_CORE_EFUSE_CRC");
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_Static_assert((soc_reset_reason_t)USB_UART_CHIP_RESET == RESET_REASON_CORE_USB_UART, "USB_UART_CHIP_RESET != RESET_REASON_CORE_USB_UART");
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_Static_assert((soc_reset_reason_t)USB_JTAG_CHIP_RESET == RESET_REASON_CORE_USB_JTAG, "USB_JTAG_CHIP_RESET != RESET_REASON_CORE_USB_JTAG");
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_Static_assert((soc_reset_reason_t)POWER_GLITCH_RESET == RESET_REASON_CORE_PWR_GLITCH, "POWER_GLITCH_RESET != RESET_REASON_CORE_PWR_GLITCH");
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typedef enum {
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NO_SLEEP = 0,
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@ -1,50 +0,0 @@
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include <sys/lock.h>
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#include <sys/reent.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Global variables used by newlib in ROM
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Note that any of these symbols which are used by both ROM & IDF will have duplicate copies
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in each "side" of the memory. However they're all pointers, and the pointers will be to the same
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thing, so it's not a big memory waste and functionality is the same.
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Some variables which look like they should be here, but aren't:
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- __sf_fake_stdin, __sf_fake_stdout, __sf_fake_stderr - These are defined in ROM because ROM includes findfp.c,
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but only used if _REENT_INIT or _REENT_INIT_PTR are ever called and ROM doesn't use these macros anywhere unless
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printf() or similar is called without initializing reent first. ESP-IDF sets up its own minimal reent structures.
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- __lock___sinit_recursive_mutex, etc. - these are combined into common_recursive_mutex & common_mutex to save space
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*/
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typedef struct {
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_LOCK_T common_recursive_mutex;
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_LOCK_T common_mutex;
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struct _reent *global_reent;
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} esp_rom_newlib_global_data_t;
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/* Called from IDF newlib component setup
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to initialize common data shared between ROM and IDF
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*/
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void esp_rom_newlib_init_global_data(const esp_rom_newlib_global_data_t *data);
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#ifdef __cplusplus
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}
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#endif
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@ -85,8 +85,7 @@ typedef enum {
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NO_MEAN = 0,
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POWERON_RESET = 1, /**<1, Vbat power on reset*/
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RTC_SW_SYS_RESET = 3, /**<3, Software reset digital core*/
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DEEPSLEEP_RESET = 5, /**<3, Deep Sleep reset digital core*/
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SDIO_RESET = 6, /**<6, Reset by SLC module, reset digital core*/
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DEEPSLEEP_RESET = 5, /**<5, Deep Sleep reset digital core*/
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TG0WDT_SYS_RESET = 7, /**<7, Timer Group0 Watch dog reset digital core*/
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TG1WDT_SYS_RESET = 8, /**<8, Timer Group1 Watch dog reset digital core*/
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RTCWDT_SYS_RESET = 9, /**<9, RTC Watch dog Reset digital core*/
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@ -96,8 +95,14 @@ typedef enum {
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RTCWDT_CPU_RESET = 13, /**<13, RTC Watch dog Reset CPU*/
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RTCWDT_BROWN_OUT_RESET = 15, /**<15, Reset when the vdd voltage is not stable*/
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RTCWDT_RTC_RESET = 16, /**<16, RTC Watch dog reset digital core and rtc module*/
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TG1WDT_CPU_RESET = 17, /**<11, Time Group1 reset CPU*/
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SUPER_WDT_RESET = 18, /**<11, super watchdog reset digital core and rtc module*/
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TG1WDT_CPU_RESET = 17, /**<17, Time Group1 reset CPU*/
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SUPER_WDT_RESET = 18, /**<18, super watchdog reset digital core and rtc module*/
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GLITCH_RTC_RESET = 19, /**<19, glitch reset digital core and rtc module*/
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EFUSE_RESET = 20, /**<20, efuse reset digital core*/
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USB_UART_CHIP_RESET = 21, /**<21, usb uart reset digital core */
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USB_JTAG_CHIP_RESET = 22, /**<22, usb jtag reset digital core */
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POWER_GLITCH_RESET = 23, /**<23, power glitch reset digital core and rtc module*/
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JTAG_RESET = 24, /**<24, jtag reset CPU*/
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} RESET_REASON;
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// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
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@ -112,7 +117,14 @@ _Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RT
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_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
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_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
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_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
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_Static_assert((soc_reset_reason_t)TG1WDT_CPU_RESET == RESET_REASON_CPU0_MWDT1, "TG1WDT_CPU_RESET != RESET_REASON_CPU0_MWDT1");
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_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
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_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
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_Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "EFUSE_RESET != RESET_REASON_CORE_EFUSE_CRC");
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_Static_assert((soc_reset_reason_t)USB_UART_CHIP_RESET == RESET_REASON_CORE_USB_UART, "USB_UART_CHIP_RESET != RESET_REASON_CORE_USB_UART");
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_Static_assert((soc_reset_reason_t)USB_JTAG_CHIP_RESET == RESET_REASON_CORE_USB_JTAG, "USB_JTAG_CHIP_RESET != RESET_REASON_CORE_USB_JTAG");
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_Static_assert((soc_reset_reason_t)POWER_GLITCH_RESET == RESET_REASON_CORE_PWR_GLITCH, "POWER_GLITCH_RESET != RESET_REASON_CORE_PWR_GLITCH");
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_Static_assert((soc_reset_reason_t)JTAG_RESET == RESET_REASON_CPU_JTAG, "JTAG_RESET != RESET_REASON_CPU_JTAG");
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typedef enum {
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NO_SLEEP = 0,
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@ -40,7 +40,6 @@ typedef struct {
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#define ESP_ROM_SPIFLASH_BP2 BIT4
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#define ESP_ROM_SPIFLASH_WR_PROTECT (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
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#define ESP_ROM_SPIFLASH_QE BIT9
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#define ESP_ROM_SPIFLASH_BP_MASK_ISSI (BIT7 | BIT5 | BIT4 | BIT3 | BIT2)
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#define FLASH_OP_MODE_RDCMD_DOUT 0x3B
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#define ESP_ROM_FLASH_SECTOR_SIZE 0x1000
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@ -119,7 +119,6 @@ extern "C" {
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#define ESP_ROM_SPIFLASH_BP2 BIT4
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#define ESP_ROM_SPIFLASH_WR_PROTECT (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
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#define ESP_ROM_SPIFLASH_QE BIT9
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#define ESP_ROM_SPIFLASH_BP_MASK_ISSI (BIT7 | BIT5 | BIT4 | BIT3 | BIT2)
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#define FLASH_ID_GD25LQ32C 0xC86016
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@ -79,7 +79,7 @@ typedef enum {
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* The initial time with reason=CPIO_RSN_FILE_INITIAL, when more data is available with
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* CPIO_RSN_FILE_MORE and finally with CPIO_RSN_FILE_END. For these calls, fileinfo
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* will again contain file information. buff will be the information contained in the
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* file at offset buff_offset, and the lenght of this buffer will be in buff_len.
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* file at offset buff_offset, and the length of this buffer will be in buff_len.
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*
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* The library guarantees to feed all file data to the callback consequitively, so
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* within the same file, the buff_offset from a call will always be (buff_offset+buff_len)
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@ -0,0 +1,17 @@
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/*
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* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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void ets_apb_backup_init_lock_func(void(* _apb_backup_lock)(void), void(* _apb_backup_unlock)(void));
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#ifdef __cplusplus
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}
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#endif
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@ -103,6 +103,11 @@ typedef enum {
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CACHE_AUTOLOAD_NEGATIVE = 1, /*!< cache autoload step is negative */
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} cache_autoload_order_t;
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typedef enum {
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CACHE_AUTOLOAD_REGION0 = 0, /*!< cache autoload region0 */
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CACHE_AUTOLOAD_REGION1 = 1, /*!< cache autoload region1 */
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} cache_autoload_region_t;
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#define CACHE_AUTOLOAD_STEP(i) ((i) - 1)
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typedef enum {
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@ -144,14 +149,17 @@ struct dcache_tag_item {
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};
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struct autoload_config {
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uint8_t ena; /*!< autoload enable */
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uint8_t order; /*!< autoload step is positive or negative */
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uint8_t trigger; /*!< autoload trigger */
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uint8_t ena0; /*!< autoload region0 enable */
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uint8_t ena1; /*!< autoload region1 enable */
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uint32_t addr0; /*!< autoload region0 start address */
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uint32_t size0; /*!< autoload region0 size */
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uint32_t addr1; /*!< autoload region1 start address */
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uint32_t size1; /*!< autoload region1 size */
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uint8_t size; /*!< autoload size */
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};
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struct autoload_region_config {
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uint8_t region; /*!< autoload region*/
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uint8_t ena; /*!< autoload region enable */
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uint32_t addr; /*!< autoload region start address */
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uint32_t size; /*!< autoload region size */
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};
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struct tag_group_info {
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@ -160,6 +168,7 @@ struct tag_group_info {
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uint32_t vaddr_offset; /*!< virtual address offset of the cache ways */
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uint32_t tag_addr[MAX_CACHE_WAYS]; /*!< tag memory address, only [0~mode.ways-1] is valid to use */
|
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uint32_t cache_memory_offset[MAX_CACHE_WAYS]; /*!< cache memory address, only [0~mode.ways-1] is valid to use */
|
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uint8_t use_legacy; /*!< 1 for using legacy tag api, 0 for using 2rd tag api */
|
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};
|
||||
|
||||
struct lock_config {
|
||||
@ -168,6 +177,39 @@ struct lock_config {
|
||||
uint16_t group; /*!< manual lock group, 0 or 1*/
|
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};
|
||||
|
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struct cache_internal_stub_table {
|
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uint32_t (* icache_line_size)(void);
|
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uint32_t (* dcache_line_size)(void);
|
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uint32_t (* icache_addr)(uint32_t addr);
|
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uint32_t (* dcache_addr)(uint32_t addr);
|
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void (* invalidate_icache_items)(uint32_t addr, uint32_t items);
|
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void (* invalidate_dcache_items)(uint32_t addr, uint32_t items);
|
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void (* clean_items)(uint32_t addr, uint32_t items);
|
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void (* writeback_items)(uint32_t addr, uint32_t items);
|
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void (* lock_icache_items)(uint32_t addr, uint32_t items);
|
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void (* lock_dcache_items)(uint32_t addr, uint32_t items);
|
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void (* unlock_icache_items)(uint32_t addr, uint32_t items);
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void (* unlock_dcache_items)(uint32_t addr, uint32_t items);
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void (* occupy_items)(uint32_t addr, uint32_t items);
|
||||
uint32_t (* suspend_icache_autoload)(void);
|
||||
void (* resume_icache_autoload)(uint32_t autoload);
|
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uint32_t (* suspend_dcache_autoload)(void);
|
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void (* resume_dcache_autoload)(uint32_t autoload);
|
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void (* freeze_icache_enable)(cache_freeze_mode_t mode);
|
||||
void (* freeze_icache_disable)(void);
|
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void (* freeze_dcache_enable)(cache_freeze_mode_t mode);
|
||||
void (* freeze_dcache_disable)(void);
|
||||
int (* op_addr)(uint32_t op_icache, uint32_t start_addr, uint32_t size, uint32_t cache_line_size, uint32_t max_sync_num, void(* cache_Iop)(uint32_t, uint32_t), void(* cache_Dop)(uint32_t, uint32_t));
|
||||
};
|
||||
|
||||
typedef void (* cache_op_start)(void);
|
||||
typedef void (* cache_op_end)(void);
|
||||
|
||||
typedef struct {
|
||||
cache_op_start start;
|
||||
cache_op_end end;
|
||||
} cache_op_cb_t;
|
||||
|
||||
#define ESP_ROM_ERR_INVALID_ARG 1
|
||||
#define MMU_SET_ADDR_ALIGNED_ERROR 2
|
||||
#define MMU_SET_PASE_SIZE_ERROR 3
|
||||
@ -190,7 +232,7 @@ void Cache_MMU_Init(void);
|
||||
* @brief Set ICache mmu mapping.
|
||||
* Please do not call this function in your SDK application.
|
||||
*
|
||||
* @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_ACCESS_SPIRAM for spiram, DPORT_MMU_INVALID for invalid.
|
||||
* @param uint32_t ext_ram : MMU_ACCESS_FLASH for flash, MMU_ACCESS_SPIRAM for spiram, MMU_INVALID for invalid.
|
||||
*
|
||||
* @param uint32_t vaddr : virtual address in CPU address space.
|
||||
* Can be Iram0,Iram1,Irom0,Drom0 and AHB buses address.
|
||||
@ -217,7 +259,7 @@ int Cache_Ibus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr, uint32
|
||||
* @brief Set DCache mmu mapping.
|
||||
* Please do not call this function in your SDK application.
|
||||
*
|
||||
* @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_ACCESS_SPIRAM for spiram, DPORT_MMU_INVALID for invalid.
|
||||
* @param uint32_t ext_ram : MMU_ACCESS_FLASH for flash, MMU_ACCESS_SPIRAM for spiram, MMU_INVALID for invalid.
|
||||
*
|
||||
* @param uint32_t vaddr : virtual address in CPU address space.
|
||||
* Can be DRam0, DRam1, DRom0, DPort and AHB buses address.
|
||||
@ -272,9 +314,9 @@ uint32_t Cache_Flash_To_SPIRAM_Copy(uint32_t bus, uint32_t bus_start_addr, uint3
|
||||
* @brief allocate memory to used by ICache.
|
||||
* Please do not call this function in your SDK application.
|
||||
*
|
||||
* @param cache_array_t icache_low : the data array bank used by icache low part, can be CACHE_MEMORY_INVALID, CACHE_MEMORY_IBANK0, CACHE_MEMORY_IBANK1
|
||||
* @param cache_array_t icache_low : the data array bank used by icache low part. Due to timing constraint, can only be CACHE_MEMORY_INVALID, CACHE_MEMORY_IBANK0
|
||||
*
|
||||
* @param cache_array_t icache_high : the data array bank used by icache high part, can be CACHE_MEMORY_INVALID, CACHE_MEMORY_IBANK0, CACHE_MEMORY_IBANK1 only if icache_low and icache_high is not CACHE_MEMORY_INVALID
|
||||
* @param cache_array_t icache_high : the data array bank used by icache high part. Due to timing constraint, can only be CACHE_MEMORY_INVALID, or CACHE_MEMORY_IBANK1 only if icache_low and icache_high is CACHE_MEMORY_IBANK0
|
||||
*
|
||||
* return none
|
||||
*/
|
||||
@ -284,9 +326,9 @@ void Cache_Occupy_ICache_MEMORY(cache_array_t icache_low, cache_array_t icache_h
|
||||
* @brief allocate memory to used by DCache.
|
||||
* Please do not call this function in your SDK application.
|
||||
*
|
||||
* @param cache_array_t dcache_low : the data array bank used by dcache low part, can be CACHE_MEMORY_INVALID, CACHE_MEMORY_DBANK0, CACHE_MEMORY_DBANK1
|
||||
* @param cache_array_t dcache_low : the data array bank used by dcache low part. Due to timing constraint, can only be CACHE_MEMORY_INVALID, CACHE_MEMORY_DBANK1
|
||||
*
|
||||
* @param cache_array_t dcache1_high : the data array bank used by dcache high part, can be CACHE_MEMORY_INVALID, CACHE_MEMORY_DBANK0, CACHE_MEMORY_DBANK1 only if dcache_low0 and dcache_low1 is not CACHE_MEMORY_INVALID
|
||||
* @param cache_array_t dcache1_high : the data array bank used by dcache high part. Due to timing constraint, can only be CACHE_MEMORY_INVALID, or CACHE_MEMORY_DBANK0 only if dcache_low0 and dcache_low1 is CACHE_MEMORY_DBANK1
|
||||
*
|
||||
* return none
|
||||
*/
|
||||
@ -310,7 +352,7 @@ void Cache_Get_Mode(struct cache_mode *mode);
|
||||
*
|
||||
* @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC
|
||||
*
|
||||
* @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B and CACHE_LINE_SIZE_64B
|
||||
* @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B and CACHE_LINE_SIZE_32B
|
||||
*
|
||||
* return none
|
||||
*/
|
||||
@ -320,9 +362,9 @@ void Cache_Set_ICache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_lin
|
||||
* @brief set DCache modes: cache size, associate ways and cache line size.
|
||||
* Please do not call this function in your SDK application.
|
||||
*
|
||||
* @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_8KB and CACHE_SIZE_16KB
|
||||
* @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_HALF and CACHE_SIZE_FULL
|
||||
*
|
||||
* @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC
|
||||
* @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC, only CACHE_4WAYS_ASSOC works
|
||||
*
|
||||
* @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B and CACHE_LINE_SIZE_64B
|
||||
*
|
||||
@ -351,7 +393,7 @@ uint32_t Cache_Address_Through_ICache(uint32_t addr);
|
||||
uint32_t Cache_Address_Through_DCache(uint32_t addr);
|
||||
|
||||
/**
|
||||
* @brief Init mmu owner register to make i/d cache use half mmu entries.
|
||||
* @brief Init Cache for ROM boot, including resetting the Dcache, initializing Owner, MMU, setting DCache mode, Enabling DCache, unmasking bus.
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
@ -636,6 +678,16 @@ void Cache_End_DCache_Preload(uint32_t autoload);
|
||||
*/
|
||||
void Cache_Config_ICache_Autoload(const struct autoload_config *config);
|
||||
|
||||
/**
|
||||
* @brief Config region autoload parameters of ICache.
|
||||
* Please do not call this function in your SDK application.
|
||||
*
|
||||
* @param struct autoload_region_config * config : region autoload parameters.
|
||||
*
|
||||
* @return ESP_ROM_ERR_INVALID_ARG : invalid param, 0 : success
|
||||
*/
|
||||
int Cache_Config_ICache_Region_Autoload(const struct autoload_region_config *config);
|
||||
|
||||
/**
|
||||
* @brief Enable auto preload for ICache.
|
||||
* Please do not call this function in your SDK application.
|
||||
@ -666,6 +718,16 @@ void Cache_Disable_ICache_Autoload(void);
|
||||
*/
|
||||
void Cache_Config_DCache_Autoload(const struct autoload_config *config);
|
||||
|
||||
/**
|
||||
* @brief Config region autoload parameters of DCache.
|
||||
* Please do not call this function in your SDK application.
|
||||
*
|
||||
* @param struct autoload_region_config * config : region autoload parameters.
|
||||
*
|
||||
* @return ESP_ROM_ERR_INVALID_ARG : invalid param, 0 : success
|
||||
*/
|
||||
int Cache_Config_DCache_Region_Autoload(const struct autoload_region_config *config);
|
||||
|
||||
/**
|
||||
* @brief Enable auto preload for DCache.
|
||||
* Please do not call this function in your SDK application.
|
||||
@ -1008,7 +1070,24 @@ void Cache_Freeze_DCache_Disable(void);
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void Cache_Travel_Tag_Memory(struct cache_mode *mode, uint32_t filter_addr, void (* process)(struct tag_group_info *));
|
||||
void Cache_Travel_Tag_Memory(struct cache_mode * mode, uint32_t filter_addr, void (* process)(struct tag_group_info *));
|
||||
|
||||
/**
|
||||
* @brief Travel tag memory to run a call back function, using 2nd tag registers.
|
||||
* ICache and DCache are suspend when doing this.
|
||||
* The callback will get the parameter tag_group_info, which will include a group of tag memory addresses and cache memory addresses.
|
||||
* Please do not call this function in your SDK application.
|
||||
*
|
||||
* @param struct cache_mode * mode : the cache to check and the cache mode.
|
||||
*
|
||||
* @param uint32_t filter_addr : only the cache lines which may include the filter_address will be returned to the call back function.
|
||||
* 0 for do not filter, all cache lines will be returned.
|
||||
*
|
||||
* @param void (* process)(struct tag_group_info *) : call back function, which may be called many times, a group(the addresses in the group are in the same position in the cache ways) a time.
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void Cache_Travel_Tag_Memory2(struct cache_mode * mode, uint32_t filter_addr, void (* process)(struct tag_group_info *));
|
||||
|
||||
/**
|
||||
* @brief Get the virtual address from cache mode, cache tag and the virtual address offset of cache ways.
|
||||
@ -1092,6 +1171,8 @@ int flash2spiram_rodata_offset(void);
|
||||
uint32_t flash_instr_rodata_start_page(uint32_t bus);
|
||||
uint32_t flash_instr_rodata_end_page(uint32_t bus);
|
||||
|
||||
extern struct cache_internal_stub_table* rom_cache_internal_table_ptr;
|
||||
extern cache_op_cb_t rom_cache_op_cb;
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -32,7 +32,7 @@ typedef struct {
|
||||
uint32_t mdash;
|
||||
} ets_rsa_pubkey_t;
|
||||
|
||||
bool ets_rsa_pss_verify(const ets_rsa_pubkey_t *key, const uint8_t *sig, const uint8_t *digest);
|
||||
bool ets_rsa_pss_verify(const ets_rsa_pubkey_t *key, const uint8_t *sig, const uint8_t *digest, uint8_t *verified_digest);
|
||||
|
||||
void ets_mgf1_sha256(const uint8_t *mgfSeed, size_t seedLen, size_t maskLen, uint8_t *mask);
|
||||
|
||||
|
||||
@ -92,6 +92,9 @@ typedef enum {
|
||||
SUPER_WDT_RESET = 18, /**<18, super watchdog reset digital core and rtc module*/
|
||||
GLITCH_RTC_RESET = 19, /**<19, glitch reset digital core and rtc module*/
|
||||
EFUSE_RESET = 20, /**<20, efuse reset digital core*/
|
||||
USB_UART_CHIP_RESET = 21, /**<21, usb uart reset digital core */
|
||||
USB_JTAG_CHIP_RESET = 22, /**<22, usb jtag reset digital core */
|
||||
POWER_GLITCH_RESET = 23, /**<23, power glitch reset digital core and rtc module*/
|
||||
} RESET_REASON;
|
||||
|
||||
// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
|
||||
@ -106,9 +109,13 @@ _Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RT
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
|
||||
_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
|
||||
_Static_assert((soc_reset_reason_t)TG1WDT_CPU_RESET == RESET_REASON_CPU0_MWDT1, "TG1WDT_CPU_RESET != RESET_REASON_CPU0_MWDT1");
|
||||
_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
|
||||
_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
|
||||
_Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "EFUSE_RESET != RESET_REASON_CORE_EFUSE_CRC");
|
||||
_Static_assert((soc_reset_reason_t)USB_UART_CHIP_RESET == RESET_REASON_CORE_USB_UART, "USB_UART_CHIP_RESET != RESET_REASON_CORE_USB_UART");
|
||||
_Static_assert((soc_reset_reason_t)USB_JTAG_CHIP_RESET == RESET_REASON_CORE_USB_JTAG, "USB_JTAG_CHIP_RESET != RESET_REASON_CORE_USB_JTAG");
|
||||
_Static_assert((soc_reset_reason_t)POWER_GLITCH_RESET == RESET_REASON_CORE_PWR_GLITCH, "POWER_GLITCH_RESET != RESET_REASON_CORE_PWR_GLITCH");
|
||||
|
||||
typedef enum {
|
||||
NO_SLEEP = 0,
|
||||
|
||||
@ -111,7 +111,6 @@ extern "C" {
|
||||
#define ESP_ROM_SPIFLASH_BP2 BIT4
|
||||
#define ESP_ROM_SPIFLASH_WR_PROTECT (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
|
||||
#define ESP_ROM_SPIFLASH_QE BIT9
|
||||
#define ESP_ROM_SPIFLASH_BP_MASK_ISSI (BIT7 | BIT5 | BIT4 | BIT3 | BIT2)
|
||||
|
||||
#define FLASH_ID_GD25LQ32C 0xC86016
|
||||
|
||||
|
||||
@ -79,7 +79,7 @@ typedef enum {
|
||||
* The initial time with reason=CPIO_RSN_FILE_INITIAL, when more data is available with
|
||||
* CPIO_RSN_FILE_MORE and finally with CPIO_RSN_FILE_END. For these calls, fileinfo
|
||||
* will again contain file information. buff will be the information contained in the
|
||||
* file at offset buff_offset, and the lenght of this buffer will be in buff_len.
|
||||
* file at offset buff_offset, and the length of this buffer will be in buff_len.
|
||||
*
|
||||
* The library guarantees to feed all file data to the callback consequitively, so
|
||||
* within the same file, the buff_offset from a call will always be (buff_offset+buff_len)
|
||||
|
||||
@ -13,7 +13,7 @@
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "sdkconfig.h"
|
||||
#include <stdint.h>
|
||||
#include "soc/reset_reasons.h"
|
||||
|
||||
|
||||
152
tools/sdk/esp32/include/esp_rom/include/esp_rom_tjpgd.h
Normal file
152
tools/sdk/esp32/include/esp_rom/include/esp_rom_tjpgd.h
Normal file
@ -0,0 +1,152 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------------/
|
||||
/ TJpgDec - Tiny JPEG Decompressor R0.01b (C)ChaN, 2012
|
||||
/-----------------------------------------------------------------------------/
|
||||
/ The TJpgDec is a generic JPEG decompressor module for tiny embedded systems.
|
||||
/ This is a free software that opened for education, research and commercial
|
||||
/ developments under license policy of following terms.
|
||||
/
|
||||
/ Copyright (C) 2012, ChaN, all right reserved.
|
||||
/
|
||||
/ * The TJpgDec module is a free software and there is NO WARRANTY.
|
||||
/ * No restriction on use. You can use, modify and redistribute it for
|
||||
/ personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
|
||||
/ * Redistributions of source code must retain the above copyright notice.
|
||||
/
|
||||
/-----------------------------------------------------------------------------*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Error code */
|
||||
typedef enum {
|
||||
JDR_OK = 0, /* 0: Succeeded */
|
||||
JDR_INTR, /* 1: Interrupted by output function */
|
||||
JDR_INP, /* 2: Device error or wrong termination of input stream */
|
||||
JDR_MEM1, /* 3: Insufficient memory pool for the image */
|
||||
JDR_MEM2, /* 4: Insufficient stream input buffer */
|
||||
JDR_PAR, /* 5: Parameter error */
|
||||
JDR_FMT1, /* 6: Data format error (may be damaged data) */
|
||||
JDR_FMT2, /* 7: Right format but not supported */
|
||||
JDR_FMT3 /* 8: Not supported JPEG standard */
|
||||
} esp_rom_tjpgd_result_t;
|
||||
|
||||
/* Rectangular structure */
|
||||
typedef struct {
|
||||
uint16_t left; /* Left end */
|
||||
uint16_t right; /* Right end */
|
||||
uint16_t top; /* Top end */
|
||||
uint16_t bottom;/* Bottom end */
|
||||
} esp_rom_tjpgd_rect_t;
|
||||
|
||||
typedef struct JDEC_s esp_rom_tjpgd_dec_t;
|
||||
|
||||
/**
|
||||
* @brief Type of user defined input function to read data from input stream
|
||||
* @param dec Specifies the decompression object of the decompression session
|
||||
* @param buffer Specifies the pointer to the read buffer to store the read data. A NULL specifies to remove the data from input stream
|
||||
* @param ndata Specifies number of bytes to read/remove from the input stream
|
||||
*
|
||||
* @return number of bytes read/removed. When a zero is returned, the esp_rom_tjpgd_prepare and esp_rom_tjpgd_decomp function aborts with JDR_INP
|
||||
*/
|
||||
typedef uint32_t (*esp_rom_tjpgd_input_function_t)(esp_rom_tjpgd_dec_t *dec, uint8_t *buffer, uint32_t ndata);
|
||||
|
||||
/**
|
||||
* @brief User defined output function to write decompressed pixels to the output device
|
||||
*
|
||||
* This function is the data output interface of the TJpgDec module.
|
||||
* The corresponding decompression session can be identified by the pointer to the device identifier jdec->device passed to the 5th argument of jd_prepare function.
|
||||
* The bitmap is sent to the frame buffer or display device in this function.
|
||||
* The first pixel in the bitmap is the left-top of the rectangular, the second one is next right and last pixel is the bottom-right of the rectangular.
|
||||
* The size of rectangular varies from 1x1 to 16x16 depends on clipping, scaling and sampling factor of the image.
|
||||
* If the rectangular is out of the frame buffer, it should be clipped in this function.
|
||||
*
|
||||
* The pixel format is currently configured to RGB888
|
||||
*
|
||||
* @param dec Specifies the decompression object of the decompression session
|
||||
* @param bitmap Specifies the RGB bitmap to be output
|
||||
* @param rect Specifies rectangular region in the image to output the RGB bitmap
|
||||
*
|
||||
* @return Normally returns 1. It lets TJpgDec to continue the decompressing process.
|
||||
* When a 0 is returned, the esp_rom_tjpgd_decomp function aborts with JDR_INTR.
|
||||
* This is useful to interrupt the decompression process
|
||||
*/
|
||||
typedef uint32_t (*esp_rom_tjpgd_output_function_t)(esp_rom_tjpgd_dec_t *dec, void *bitmap, esp_rom_tjpgd_rect_t *rect);
|
||||
|
||||
struct JDEC_s {
|
||||
uint32_t dctr; /* Number of bytes available in the input buffer */
|
||||
uint8_t *dptr; /* Current data read ptr */
|
||||
uint8_t *inbuf; /* Bit stream input buffer */
|
||||
uint8_t dmsk; /* Current bit in the current read byte */
|
||||
uint8_t scale; /* Output scaling ratio */
|
||||
uint8_t msx, msy; /* MCU size in unit of block (width, height) */
|
||||
uint8_t qtid[3]; /* Quantization table ID of each component */
|
||||
int16_t dcv[3]; /* Previous DC element of each component */
|
||||
uint16_t nrst; /* Restart inverval */
|
||||
uint32_t width, height; /* Size of the input image (pixel) */
|
||||
uint8_t *huffbits[2][2]; /* Huffman bit distribution tables [id][dcac] */
|
||||
uint16_t *huffcode[2][2]; /* Huffman code word tables [id][dcac] */
|
||||
uint8_t *huffdata[2][2]; /* Huffman decoded data tables [id][dcac] */
|
||||
int32_t *qttbl[4]; /* Dequaitizer tables [id] */
|
||||
void *workbuf; /* Working buffer for IDCT and RGB output */
|
||||
uint8_t *mcubuf; /* Working buffer for the MCU */
|
||||
void *pool; /* Pointer to available memory pool */
|
||||
uint32_t sz_pool; /* Size of momory pool (bytes available) */
|
||||
esp_rom_tjpgd_input_function_t infunc; /* Pointer to jpeg stream input function */
|
||||
void *device; /* Pointer to I/O device identifiler for the session */
|
||||
};
|
||||
|
||||
/* TJpgDec API functions */
|
||||
|
||||
/**
|
||||
* @brief Analyzes the JPEG data and create a decompression object for subsequent decompression process.
|
||||
* @param dec Specifies the decompression object to be initialized. The decompression object is used for subsequent decompression process.
|
||||
* @param infunc Specifies the user defined data input function.
|
||||
* @param work Specifies pointer to the work area for this session. It should be aligned to word boundary or it can result an exception.
|
||||
* @param sz_work Specifies size of the work area in unit of byte.
|
||||
* TJpgDec requires upto 3092 bytes of work area depends on the built-in parameter tables of the JPEG image.
|
||||
* Thus 3092 bytes of work area is sufficient for most case.
|
||||
* @param dev Specifies pointer to the user defined device identifier for this session.
|
||||
* It is stored to the member device in the decompression object. It can be referred by I/O functions to identify the current session.
|
||||
* When I/O device is fixed in the project or this feature is not needed, set NULL and do not care about this.
|
||||
*
|
||||
* @return
|
||||
* - JDR_OK Function succeeded and decompression object is valid.
|
||||
* - JDR_INP An error occurred in input function due to hard error or wrong stream termination.
|
||||
* - JDR_MEM1 Insufficient work area for this JPEG image.
|
||||
* - JDR_MEM2 Insufficient input buffer for this JPEG image. JD_SZBUF may be too small.
|
||||
* - JDR_PAR Parameter error. Given pointer to the work area is NULL.
|
||||
* - JDR_FMT1 Data format error. The JPEG data can be collapsed.
|
||||
* - JDR_FMT2 Right format but not supported. May be a grayscale image.
|
||||
* - JDR_FMT3 Not supported JPEG standard. May be a progressive JPEG image.
|
||||
*/
|
||||
esp_rom_tjpgd_result_t esp_rom_tjpgd_prepare(esp_rom_tjpgd_dec_t *dec, esp_rom_tjpgd_input_function_t infunc, void *work, uint32_t sz_work, void *dev);
|
||||
|
||||
/**
|
||||
* @brief Decompress the JPEG image and output it as RGB data.
|
||||
* @param dec Specifies the valid decompressor object.
|
||||
* @param outfunc Specifies the user defined data output function. The esp_rom_tjpgd_decomp function calls this function to output the decompressed JPEG image in RGB form.
|
||||
* @param scale Specifies scaling factor N for output. The output image is descaled to 1 / 2 ^ N (N = 0 to 3).
|
||||
*
|
||||
* @return
|
||||
* - JDR_OK Function succeeded.
|
||||
* - JDR_INTR The decompression process is interrupted by output function.
|
||||
* - JDR_INP An error occured in input function due to hard error or wrong stream termination.
|
||||
* - JDR_PAR Parameter error. Given scale factor is invalid.
|
||||
* - JDR_FMT1 Data format error. The JPEG data can be collapted.
|
||||
*/
|
||||
esp_rom_tjpgd_result_t esp_rom_tjpgd_decomp(esp_rom_tjpgd_dec_t *dec, esp_rom_tjpgd_output_function_t outfunc, uint8_t scale);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@ -0,0 +1,31 @@
|
||||
// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Dummy to satisfy the requirement for this type on Linux targets.
|
||||
* Look at other reset_reasons.h files in IDF.
|
||||
*/
|
||||
typedef enum {
|
||||
RESET_REASON_CHIP_POWER_ON = 0x01, // Power on reset
|
||||
} soc_reset_reason_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
Reference in New Issue
Block a user