mirror of
https://github.com/0xFEEDC0DE64/arduino-esp32.git
synced 2025-07-02 21:41:01 +02:00
IDF master 3e370c4296
* Fix build compilation due to changes in the HW_TIMER's structs * Fix compilation warnings and errors with USB * Update USBCDC.cpp * Update CMakeLists.txt * Update HWCDC.cpp
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@ -87,6 +87,7 @@ typedef enum {
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ESP_PARTITION_SUBTYPE_DATA_COREDUMP = 0x03, //!< COREDUMP partition
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ESP_PARTITION_SUBTYPE_DATA_NVS_KEYS = 0x04, //!< Partition for NVS keys
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ESP_PARTITION_SUBTYPE_DATA_EFUSE_EM = 0x05, //!< Partition for emulate eFuse bits
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ESP_PARTITION_SUBTYPE_DATA_UNDEFINED = 0x06, //!< Undefined (or unspecified) data partition
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ESP_PARTITION_SUBTYPE_DATA_ESPHTTPD = 0x80, //!< ESPHTTPD partition
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ESP_PARTITION_SUBTYPE_DATA_FAT = 0x81, //!< FAT partition
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@ -68,3 +68,7 @@
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#define SPI_FLASH_FASTRD_DUMMY_BITLEN 8
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#define SPI_FLASH_SLOWRD_ADDR_BITLEN 24
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#define SPI_FLASH_SLOWRD_DUMMY_BITLEN 0
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#define SPI_FLASH_OPISTR_ADDR_BITLEN 32
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#define SPI_FLASH_OPISTR_DUMMY_BITLEN 20
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#define SPI_FLASH_OPIDTR_ADDR_BITLEN 32
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#define SPI_FLASH_OPIDTR_DUMMY_BITLEN 40
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@ -206,6 +206,11 @@ struct spi_flash_chip_t {
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* Get the capabilities of the flash chip. See SPI_FLASH_CHIP_CAP_* macros as reference.
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*/
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spi_flash_caps_t (*get_chip_caps)(esp_flash_t *chip);
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/**
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* Configure the host registers to use the specified read mode set in the ``chip->read_mode``.
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*/
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esp_err_t (*config_host_io_mode)(esp_flash_t *chip, uint32_t flags);
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};
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/* Pointer to an array of pointers to all known drivers for flash chips. This array is used
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@ -370,14 +370,15 @@ esp_err_t spi_flash_common_set_io_mode(esp_flash_t *chip, esp_flash_wrsr_func_t
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* transactions. Also prepare the command to be sent in read functions.
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*
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* @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
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* @param addr_32bit Whether 32 bit commands will be used (Currently only W25Q256 and GD25Q256 are supported)
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* @param flags Special rules to configure io mode, (i.e. Whether 32 bit commands will be used (Currently only W25Q256 and GD25Q256 are supported))
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*
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* @return
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* - ESP_OK if success
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* - ESP_ERR_FLASH_NOT_INITIALISED if chip not initialized properly
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* - or other error passed from the ``configure_host_mode`` function of host driver
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*/
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esp_err_t spi_flash_chip_generic_config_host_io_mode(esp_flash_t *chip, bool addr_32bit);
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esp_err_t spi_flash_chip_generic_config_host_io_mode(esp_flash_t *chip, uint32_t flags);
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#define SPI_FLASH_CONFIG_IO_MODE_32B_ADDR BIT(0)
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/**
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* @brief Handle explicit yield requests
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@ -396,5 +397,15 @@ esp_err_t spi_flash_chip_generic_yield(esp_flash_t* chip, uint32_t wip);
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*/
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esp_err_t spi_flash_chip_generic_suspend_cmd_conf(esp_flash_t *chip);
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/**
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*
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* @brief Read the chip unique ID unsupported function.
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*
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* @param chip Pointer to SPI flash chip to use.
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* @param flash_unique_id Pointer to store output unique id (Although this function is an unsupported function, but the parameter should be kept for the consistence of the function pointer).
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* @return Always ESP_ERR_NOT_SUPPORTED.
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*/
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esp_err_t spi_flash_chip_generic_read_unique_id_none(esp_flash_t *chip, uint64_t* flash_unique_id);
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/// Default timeout configuration used by most chips
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const flash_chip_op_timeout_t spi_flash_chip_generic_timeout;
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extern const flash_chip_op_timeout_t spi_flash_chip_generic_timeout;
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@ -25,3 +25,10 @@
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* is not found.
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*/
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extern const spi_flash_chip_t esp_flash_chip_mxic;
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/**
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* MXIC OPI flash chip_drv, uses all the above functions for its operations. In
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* default autodetection, this is used as a catchall if a more specific chip_drv
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* is not found.
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*/
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extern const spi_flash_chip_t esp_flash_chip_mxic_opi;
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@ -26,6 +26,8 @@
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#elif CONFIG_IDF_TARGET_ESP32S3
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#include "esp32s3/rom/spi_flash.h"
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#endif
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#include "esp_flash.h"
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#include "hal/spi_flash_hal.h"
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#ifdef __cplusplus
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extern "C" {
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@ -38,13 +40,15 @@ esp_err_t esp_opiflash_init(void);
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/**
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* @brief Make MSPI work under 20Mhz
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* @param control_spi1 Select whether to control SPI1. For tuning, we need to use SPI1. After tuning (during startup stage), let the flash driver to control SPI1
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*/
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void spi_timing_enter_mspi_low_speed_mode(void);
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void spi_timing_enter_mspi_low_speed_mode(bool control_spi1);
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/**
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* @brief Make MSPI work under the frequency as users set
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* @param control_spi1 Select whether to control SPI1. For tuning, we need to use SPI1. After tuning (during startup stage), let the flash driver to control SPI1
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*/
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void spi_timing_enter_mspi_high_speed_mode(void);
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void spi_timing_enter_mspi_high_speed_mode(bool control_spi1);
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/**
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* @brief Tune MSPI flash timing to make it work under high frequency
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@ -56,12 +60,34 @@ void spi_timing_flash_tuning(void);
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*/
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void spi_timing_psram_tuning(void);
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/**
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* @brief To initislize the MSPI pins
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*/
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void esp_mspi_pin_init(void);
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/**
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* @brief Set SPI1 registers to make ROM functions work
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* @note This function is used for setting SPI1 registers to the state that ROM SPI functions work
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*/
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void spi_flash_set_rom_required_regs(void);
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/**
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* @brief Initialize main flash
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* @param chip Pointer to main SPI flash(SPI1 CS0) chip to use..
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*/
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esp_err_t esp_flash_init_main(esp_flash_t *chip);
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/**
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* @brief Should be only used by SPI1 Flash driver to know the necessary timing registers
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* @param out_timing_config Pointer to timing_tuning parameters.
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*/
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void spi_timing_get_flash_timing_param(spi_flash_hal_timing_config_t *out_timing_config);
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/**
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* @brief Judge if the flash in tuned
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*/
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bool spi_timine_config_flash_is_tuned(void);
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#ifdef __cplusplus
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}
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#endif
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