mirror of
https://github.com/0xFEEDC0DE64/arduino-esp32.git
synced 2025-07-30 18:57:14 +02:00
IDF master 3e370c4296
* Fix build compilation due to changes in the HW_TIMER's structs * Fix compilation warnings and errors with USB * Update USBCDC.cpp * Update CMakeLists.txt * Update HWCDC.cpp
This commit is contained in:
@ -24,6 +24,7 @@
|
||||
#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
|
||||
#define CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP 1
|
||||
#define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x10
|
||||
#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
|
||||
#define CONFIG_SECURE_BOOT_SUPPORTS_RSA 1
|
||||
#define CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE 1
|
||||
#define CONFIG_BOOT_ROM_LOG_ALWAYS_ON 1
|
||||
@ -95,35 +96,6 @@
|
||||
#define CONFIG_COMPILER_WARN_WRITE_STRINGS 1
|
||||
#define CONFIG_APPTRACE_DEST_NONE 1
|
||||
#define CONFIG_APPTRACE_LOCK_ENABLE 1
|
||||
#define CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_EFF 0
|
||||
#define CONFIG_BTDM_CTRL_PCM_ROLE_EFF 0
|
||||
#define CONFIG_BTDM_CTRL_PCM_POLAR_EFF 0
|
||||
#define CONFIG_BTDM_CTRL_BLE_MAX_CONN_EFF 0
|
||||
#define CONFIG_BTDM_CTRL_BR_EDR_MAX_ACL_CONN_EFF 0
|
||||
#define CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF 0
|
||||
#define CONFIG_BTDM_CTRL_PINNED_TO_CORE 0
|
||||
#define CONFIG_BTDM_BLE_SLEEP_CLOCK_ACCURACY_INDEX_EFF 1
|
||||
#define CONFIG_BT_CTRL_MODE_EFF 1
|
||||
#define CONFIG_BT_CTRL_BLE_MAX_ACT 10
|
||||
#define CONFIG_BT_CTRL_BLE_MAX_ACT_EFF 10
|
||||
#define CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB 0
|
||||
#define CONFIG_BT_CTRL_PINNED_TO_CORE 0
|
||||
#define CONFIG_BT_CTRL_HCI_TL 1
|
||||
#define CONFIG_BT_CTRL_ADV_DUP_FILT_MAX 30
|
||||
#define CONFIG_BT_CTRL_HW_CCA_EFF 0
|
||||
#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF 0
|
||||
#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP 1
|
||||
#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM 100
|
||||
#define CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD 20
|
||||
#define CONFIG_BT_CTRL_BLE_SCAN_DUPL 1
|
||||
#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE 0
|
||||
#define CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE 100
|
||||
#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF 0
|
||||
#define CONFIG_BT_CTRL_SLEEP_MODE_EFF 0
|
||||
#define CONFIG_BT_CTRL_SLEEP_CLOCK_EFF 0
|
||||
#define CONFIG_BT_CTRL_HCI_TL_EFF 1
|
||||
#define CONFIG_BT_RESERVE_DRAM 0x0
|
||||
#define CONFIG_BT_NIMBLE_USE_ESP_TIMER 1
|
||||
#define CONFIG_COAP_MBEDTLS_PSK 1
|
||||
#define CONFIG_COAP_LOG_DEFAULT_LEVEL 0
|
||||
#define CONFIG_ADC_DISABLE_DAC 1
|
||||
@ -178,6 +150,9 @@
|
||||
#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP 1
|
||||
#define CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO 1
|
||||
#define CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES 2
|
||||
#define CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND 1
|
||||
#define CONFIG_ESP_IPC_TASK_STACK_SIZE 1024
|
||||
#define CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE 32
|
||||
#define CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL 120
|
||||
#define CONFIG_ESP_NETIF_TCPIP_LWIP 1
|
||||
#define CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER 1
|
||||
@ -188,8 +163,11 @@
|
||||
#define CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE 1
|
||||
#define CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK 1
|
||||
#define CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP 1
|
||||
#define CONFIG_ESP_SYSTEM_MEMPROT_DEPCHECK 1
|
||||
#define CONFIG_ESP_SYSTEM_MEMPROT_FEATURE 1
|
||||
#define CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK 1
|
||||
#define CONFIG_ESP_SYSTEM_MEMPROT_CPU_PREFETCH_PAD_SIZE 16
|
||||
#define CONFIG_ESP_SYSTEM_MEMPROT_MEM_ALIGN_SIZE 4
|
||||
#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
|
||||
#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2048
|
||||
#define CONFIG_ESP_MAIN_TASK_STACK_SIZE 4096
|
||||
@ -206,7 +184,7 @@
|
||||
#define CONFIG_ESP_TASK_WDT 1
|
||||
#define CONFIG_ESP_TASK_WDT_PANIC 1
|
||||
#define CONFIG_ESP_TASK_WDT_TIMEOUT_S 5
|
||||
#define CONFIG_ESP_IPC_TASK_STACK_SIZE 1024
|
||||
#define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1
|
||||
#define CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER 1
|
||||
#define CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER 1
|
||||
#define CONFIG_ESP_TIMER_TASK_STACK_SIZE 4096
|
||||
@ -262,9 +240,13 @@
|
||||
#define CONFIG_FMB_TIMER_PORT_ENABLED 1
|
||||
#define CONFIG_FMB_TIMER_GROUP 0
|
||||
#define CONFIG_FMB_TIMER_INDEX 0
|
||||
#define CONFIG_FMB_MASTER_TIMER_GROUP 0
|
||||
#define CONFIG_FMB_MASTER_TIMER_INDEX 0
|
||||
#define CONFIG_FREERTOS_UNICORE 1
|
||||
#define CONFIG_FREERTOS_NO_AFFINITY 0x7FFFFFFF
|
||||
#define CONFIG_FREERTOS_TICK_SUPPORT_CORETIMER 1
|
||||
#define CONFIG_FREERTOS_CORETIMER_0 1
|
||||
#define CONFIG_FREERTOS_SYSTICK_USES_CCOUNT 1
|
||||
#define CONFIG_FREERTOS_OPTIMIZED_SCHEDULER 1
|
||||
#define CONFIG_FREERTOS_HZ 1000
|
||||
#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY 1
|
||||
@ -282,6 +264,7 @@
|
||||
#define CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE 0
|
||||
#define CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER 1
|
||||
#define CONFIG_FREERTOS_DEBUG_OCDAWARE 1
|
||||
#define CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT 1
|
||||
#define CONFIG_HAL_ASSERTION_EQUALS_SYSTEM 1
|
||||
#define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
|
||||
#define CONFIG_HEAP_POISONING_LIGHT 1
|
||||
@ -311,7 +294,6 @@
|
||||
#define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
|
||||
#define CONFIG_LWIP_IPV6 1
|
||||
#define CONFIG_LWIP_IPV6_NUM_ADDRESSES 3
|
||||
#define CONFIG_LWIP_IPV6_RDNSS_MAX_DNS_SERVERS 0
|
||||
#define CONFIG_LWIP_NETIF_LOOPBACK 1
|
||||
#define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
|
||||
#define CONFIG_LWIP_MAX_ACTIVE_TCP 16
|
||||
@ -344,7 +326,7 @@
|
||||
#define CONFIG_LWIP_PPP_MPPE_SUPPORT 1
|
||||
#define CONFIG_LWIP_ICMP 1
|
||||
#define CONFIG_LWIP_MAX_RAW_PCBS 16
|
||||
#define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
|
||||
#define CONFIG_LWIP_SNTP_MAX_SERVERS 1
|
||||
#define CONFIG_LWIP_SNTP_UPDATE_DELAY 3600000
|
||||
#define CONFIG_LWIP_ESP_LWIP_ASSERT 1
|
||||
#define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
|
||||
@ -460,6 +442,9 @@
|
||||
#define CONFIG_UNITY_ENABLE_FLOAT 1
|
||||
#define CONFIG_UNITY_ENABLE_DOUBLE 1
|
||||
#define CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER 1
|
||||
#define CONFIG_USB_OTG_SUPPORTED 1
|
||||
#define CONFIG_USB_HOST_CONTROL_TRANSFER_MAX_SIZE 256
|
||||
#define CONFIG_USB_HOST_HW_BUFFER_BIAS_BALANCED 1
|
||||
#define CONFIG_VFS_SUPPORT_IO 1
|
||||
#define CONFIG_VFS_SUPPORT_DIR 1
|
||||
#define CONFIG_VFS_SUPPORT_SELECT 1
|
||||
@ -476,11 +461,6 @@
|
||||
#define CONFIG_DSP_OPTIMIZATION 0
|
||||
#define CONFIG_DSP_MAX_FFT_SIZE_4096 1
|
||||
#define CONFIG_DSP_MAX_FFT_SIZE 4096
|
||||
#define CONFIG_C_IMPL 1
|
||||
#define CONFIG_MTMN_LITE_QUANT 1
|
||||
#define CONFIG_MFN56_1X 1
|
||||
#define CONFIG_HD_NANO1 1
|
||||
#define CONFIG_HP_NANO1 1
|
||||
#define CONFIG_OV7670_SUPPORT 1
|
||||
#define CONFIG_OV7725_SUPPORT 1
|
||||
#define CONFIG_NT99141_SUPPORT 1
|
||||
@ -585,6 +565,15 @@
|
||||
#define CONFIG_TIMER_TASK_STACK_SIZE CONFIG_ESP_TIMER_TASK_STACK_SIZE
|
||||
#define CONFIG_TOOLPREFIX CONFIG_SDK_TOOLPREFIX
|
||||
#define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
|
||||
#define CONFIG_USB_CDC_ENABLED CONFIG_TINYUSB_CDC_ENABLED
|
||||
#define CONFIG_USB_CDC_RX_BUFSIZE CONFIG_TINYUSB_CDC_RX_BUFSIZE
|
||||
#define CONFIG_USB_CDC_TX_BUFSIZE CONFIG_TINYUSB_CDC_TX_BUFSIZE
|
||||
#define CONFIG_USB_DEBUG_LEVEL CONFIG_TINYUSB_DEBUG_LEVEL
|
||||
#define CONFIG_USB_DESC_CDC_STRING CONFIG_TINYUSB_DESC_CDC_STRING
|
||||
#define CONFIG_USB_DESC_HID_STRING CONFIG_TINYUSB_DESC_HID_STRING
|
||||
#define CONFIG_USB_DESC_MSC_STRING CONFIG_TINYUSB_DESC_MSC_STRING
|
||||
#define CONFIG_USB_MSC_BUFSIZE CONFIG_TINYUSB_MSC_BUFSIZE
|
||||
#define CONFIG_USB_MSC_ENABLED CONFIG_TINYUSB_MSC_ENABLED
|
||||
#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
|
||||
#define CONFIG_ARDUINO_IDF_COMMIT "c69f0ec32"
|
||||
#define CONFIG_ARDUINO_IDF_COMMIT "3e370c4296"
|
||||
#define CONFIG_ARDUINO_IDF_BRANCH "master"
|
||||
|
Reference in New Issue
Block a user