Update IDF to abea9e4c0 (#2458)

* Update IDF to abea9e4c0

* Update esptool

* Enable PSRAM for PICO D4

* Enable APP_ROLLBACK_ENABLE
This commit is contained in:
Me No Dev
2019-02-14 16:49:30 +01:00
committed by GitHub
parent c0345eafbf
commit 010a7c60f7
101 changed files with 741 additions and 307 deletions

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@ -20,38 +20,55 @@ extern "C" {
#include "esp_eth.h"
/** Common PHY-management functions.
/**
* @brief Common PHY-management functions.
*
* @note These are not enough to drive any particular Ethernet PHY.
* They provide a common configuration structure and management functions.
*
*/
These are not enough to drive any particular Ethernet PHY, but they provide a common configuration structure and
management functions.
*/
/** Configure fixed pins for RMII data interface.
This configures GPIOs 0, 19, 22, 25, 26, 27 for use with RMII
data interface. These pins cannot be changed, and must be wired to
ethernet functions.
This is not sufficient to fully configure the Ethernet PHY,
MDIO configuration interface pins (such as SMI MDC, MDO, MDI)
must also be configured correctly in the GPIO matrix.
*/
/**
* @brief Configure fixed pins for RMII data interface.
*
* @note This configures GPIOs 0, 19, 22, 25, 26, 27 for use with RMII data interface.
* These pins cannot be changed, and must be wired to ethernet functions.
* This is not sufficient to fully configure the Ethernet PHY.
* MDIO configuration interface pins (such as SMI MDC, MDO, MDI) must also be configured correctly in the GPIO matrix.
*
*/
void phy_rmii_configure_data_interface_pins(void);
/** Configure variable pins for SMI (MDIO) ethernet functions.
Calling this function along with mii_configure_default_pins() will
fully configure the GPIOs for the ethernet PHY.
/**
* @brief Configure variable pins for SMI ethernet functions.
*
* @param mdc_gpio MDC GPIO Pin number
* @param mdio_gpio MDIO GPIO Pin number
*
* @note Calling this function along with mii_configure_default_pins() will fully configure the GPIOs for the ethernet PHY.
*/
void phy_rmii_smi_configure_pins(uint8_t mdc_gpio, uint8_t mdio_gpio);
/** Enable flow control in standard PHY MII register.
/**
* @brief Enable flow control in standard PHY MII register.
*
*/
void phy_mii_enable_flow_ctrl(void);
/**
* @brief Check Ethernet link status via MII interface
*
* @return true Link is on
* @return false Link is off
*/
bool phy_mii_check_link_status(void);
/**
* @brief Check pause frame ability of partner via MII interface
*
* @return true Partner is able to process pause frame
* @return false Partner can not process pause frame
*/
bool phy_mii_get_partner_pause_enable(void);
#ifdef __cplusplus

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@ -0,0 +1,75 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include "phy.h"
/**
* @brief Dump IP101 PHY SMI configuration registers
*
*/
void phy_ip101_dump_registers();
/**
* @brief Default IP101 phy_check_init function
*
*/
void phy_ip101_check_phy_init(void);
/**
* @brief Default IP101 phy_get_speed_mode function
*
* @return eth_speed_mode_t Ethernet speed mode
*/
eth_speed_mode_t phy_ip101_get_speed_mode(void);
/**
* @brief Default IP101 phy_get_duplex_mode function
*
* @return eth_duplex_mode_t Ethernet duplex mode
*/
eth_duplex_mode_t phy_ip101_get_duplex_mode(void);
/**
* @brief Default IP101 phy_power_enable function
*
*/
void phy_ip101_power_enable(bool);
/**
* @brief Default IP101 phy_init function
*
* @return esp_err_t
* - ESP_OK on success
* - ESP_FAIL on error
*/
esp_err_t phy_ip101_init(void);
/**
* @brief Default IP101 PHY configuration
*
* @note This configuration is not suitable for use as-is,
* it will need to be modified for your particular PHY hardware setup.
*
*/
extern const eth_config_t phy_ip101_default_ethernet_config;
#ifdef __cplusplus
}
#endif

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@ -20,45 +20,53 @@ extern "C" {
#include "phy.h"
/** @brief Dump all LAN8720 PHY SMI configuration registers
/**
* @brief Dump LAN8720 PHY SMI configuration registers
*
* @note These registers are dumped at 'debug' level, so output
* may not be visible depending on default log levels.
*/
void phy_lan8720_dump_registers();
/** @brief Default LAN8720 phy_check_init function.
/**
* @brief Default LAN8720 phy_check_init function
*
*/
void phy_lan8720_check_phy_init(void);
/** @brief Default LAN8720 phy_get_speed_mode function.
/**
* @brief Default LAN8720 phy_get_speed_mode function
*
* @return eth_speed_mode_t Ethernet speed mode
*/
eth_speed_mode_t phy_lan8720_get_speed_mode(void);
/** @brief Default LAN8720 phy_get_duplex_mode function.
/**
* @brief Default LAN8720 phy_get_duplex_mode function
*
* @return eth_duplex_mode_t Ethernet duplex mode
*/
eth_duplex_mode_t phy_lan8720_get_duplex_mode(void);
/** @brief Default LAN8720 phy_power_enable function.
/**
* @brief Default LAN8720 phy_power_enable function
*
* @note This function may need to be replaced with a custom function
* if the PHY has a GPIO to enable power or start a clock.
*
* Consult the ethernet example to see how this is done.
*/
void phy_lan8720_power_enable(bool);
/** @brief Default LAN8720 phy_init function.
/**
* @brief Default LAN8720 phy_init function
*
* @return esp_err_t
* - ESP_OK on success
* - ESP_FAIL on error
*/
esp_err_t phy_lan8720_init(void);
/** @brief Default LAN8720 PHY configuration
/**
* @brief Default LAN8720 PHY configuration
*
* This configuration is not suitable for use as-is, it will need
* to be modified for your particular PHY hardware setup.
* @note This configuration is not suitable for use as-is,
* it will need to be modified for your particular PHY hardware setup.
*
* Consult the Ethernet example to see how this is done.
*/
extern const eth_config_t phy_lan8720_default_ethernet_config;

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@ -18,9 +18,10 @@
extern "C" {
#endif
/* This header contains register/bit masks for the standard
PHY MII registers that should be supported by all PHY models.
*/
/**
* @brief This header contains register/bit masks for the standard PHY MII registers that should be supported by all PHY models.
*
*/
#define MII_BASIC_MODE_CONTROL_REG (0x0)
#define MII_SOFTWARE_RESET BIT(15)

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@ -20,44 +20,53 @@ extern "C" {
#include "phy.h"
/** @brief Dump all TLK110 PHY SMI configuration registers
/**
* @brief Dump TLK110 PHY SMI configuration registers
*
* @note These registers are dumped at 'debug' level, so output
* may not be visible depending on default log levels.
*/
void phy_tlk110_dump_registers();
/** @brief Default TLK110 phy_check_init function.
/**
* @brief Default TLK110 phy_check_init function
*
*/
void phy_tlk110_check_phy_init(void);
/** @brief Default TLK110 phy_get_speed_mode function.
/**
* @brief Default TLK110 phy_get_speed_mode function
*
* @return eth_speed_mode_t Ethernet speed mode
*/
eth_speed_mode_t phy_tlk110_get_speed_mode(void);
/** @brief Default TLK110 phy_get_duplex_mode function.
/**
* @brief Default TLK110 phy_get_duplex_mode function
*
* @return eth_duplex_mode_t Ethernet duplex mode
*/
eth_duplex_mode_t phy_tlk110_get_duplex_mode(void);
/** @brief Default TLK110 phy_power_enable function.
/**
* @brief Default TLK110 phy_power_enable function
*
* @note This function may need to be replaced with a custom function
* if the PHY has a GPIO to enable power or start a clock.
*
* Consult the ethernet example to see how this is done.
*/
void phy_tlk110_power_enable(bool);
/** @brief Default TLK110 phy_init function.
/**
* @brief Default TLK110 phy_init function
*
* @return esp_err_t
* - ESP_OK on success
* - ESP_FAIL on error
*/
esp_err_t phy_tlk110_init(void);
/** @brief Default TLK110 PHY configuration
/**
* @brief Default TLK110 PHY configuration
*
* This configuration is not suitable for use as-is, it will need
* to be modified for your particular PHY hardware setup.
* @note This configuration is not suitable for use as-is,
* it will need to be modified for your particular PHY hardware setup.
*
* Consult the Ethernet example to see how this is done.
*/
extern const eth_config_t phy_tlk110_default_ethernet_config;