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Update IDF to a0468b2 (#2108)

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* Update IDF to a0468b2

* add missing ld file

* Fix PIO builds and change coex policy
This commit is contained in:
Me No Dev
2018-11-26 23:22:11 +01:00
committed by GitHub
parent c3ec91f968
commit 04963009ee
988 changed files with 114643 additions and 65141 deletions
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16
tools/sdk/include/esp32/rom/cache.h
View File

@ -83,6 +83,9 @@ static inline unsigned int IRAM_ATTR cache_flash_mmu_set(int cpu_no, int pid, un
* @brief Set Ext-SRAM-Cache mmu mapping.
* Please do not call this function in your SDK application.
*
* Note that this code lives in IRAM and has a bugfix in respect to the ROM version
* of this function (which erroneously refused a vaddr > 2MiB
*
* @param int cpu_no : CPU number, 0 for PRO cpu, 1 for APP cpu.
*
* @param int pod : process identifier. Range 0~7.
@ -106,18 +109,7 @@ static inline unsigned int IRAM_ATTR cache_flash_mmu_set(int cpu_no, int pid, un
* 4 : mmu table to be written is out of range
* 5 : vaddr is out of range
*/
static inline unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num)
{
extern unsigned int cache_sram_mmu_set_rom(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num);
unsigned int ret;
DPORT_STALL_OTHER_CPU_START();
ret = cache_sram_mmu_set_rom(cpu_no, pid, vaddr, paddr, psize, num);
DPORT_STALL_OTHER_CPU_END();
return ret;
}
unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num);
/**
* @brief Initialise cache access for the cpu.

14
tools/sdk/include/esp32/rom/uart.h
View File

@ -36,7 +36,7 @@ extern "C" {
#define RX_BUFF_SIZE 0x100
#define TX_BUFF_SIZE 100
//uart int enalbe register ctrl bits
//uart int enable register ctrl bits
#define UART_RCV_INTEN BIT0
#define UART_TRX_INTEN BIT1
#define UART_LINE_STATUS_INTEN BIT2
@ -267,9 +267,11 @@ void uart_tx_flush(uint8_t uart_no);
* here for compatibility.
*/
static inline void IRAM_ATTR uart_tx_wait_idle(uint8_t uart_no) {
while(REG_GET_FIELD(UART_STATUS_REG(uart_no), UART_ST_UTX_OUT)) {
;
}
uint32_t status;
do {
status = READ_PERI_REG(UART_STATUS_REG(uart_no));
/* either tx count or state is non-zero */
} while ((status & (UART_ST_UTX_OUT_M | UART_TXFIFO_CNT_M)) != 0);
}
/**
@ -299,14 +301,14 @@ char uart_rx_one_char_block(void);
*
* @param uint8_t *pString : the pointer to store the string.
*
* @param uint8_t MaxStrlen : the max string length, incude '\0'.
* @param uint8_t MaxStrlen : the max string length, include '\0'.
*
* @return OK.
*/
STATUS UartRxString(uint8_t *pString, uint8_t MaxStrlen);
/**
* @brief Process uart recevied information in the interrupt handler.
* @brief Process uart received information in the interrupt handler.
* Please do not call this function in SDK.
*
* @param void *para : the message receive buffer.