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IDF release/v3.3 (#3339)
* IDF release/v3.3 46b12a560 * fix build * IDF release/v3.3 367c3c09c
This commit is contained in:
Me No Dev
GitHub
@ -19,6 +19,7 @@
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extern "C" {
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#endif
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#include "freertos/FreeRTOS.h"
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#include "esp_types.h"
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#include "esp_intr.h"
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#include "esp_err.h"
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@ -44,7 +45,13 @@ extern "C" {
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* The following initializer macros offer commonly found bit rates.
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*
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* @note These timing values are based on the assumption APB clock is at 80MHz
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* @note The 20K, 16K and 12.5K bit rates are only available from ESP32 Revision 2 onwards
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*/
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#if (CONFIG_ESP32_REV_MIN >= 2)
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#define CAN_TIMING_CONFIG_12_5KBITS() {.brp = 256, .tseg_1 = 16, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
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#define CAN_TIMING_CONFIG_16KBITS() {.brp = 200, .tseg_1 = 16, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
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#define CAN_TIMING_CONFIG_20KBITS() {.brp = 200, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
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#endif
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#define CAN_TIMING_CONFIG_25KBITS() {.brp = 128, .tseg_1 = 16, .tseg_2 = 8, .sjw = 3, .triple_sampling = false}
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#define CAN_TIMING_CONFIG_50KBITS() {.brp = 80, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
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#define CAN_TIMING_CONFIG_100KBITS() {.brp = 40, .tseg_1 = 15, .tseg_2 = 4, .sjw = 3, .triple_sampling = false}
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@ -105,7 +112,7 @@ extern "C" {
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#define CAN_EXTD_ID_MASK 0x1FFFFFFF /**< Bit mask for 29 bit Extended Frame Format ID */
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#define CAN_STD_ID_MASK 0x7FF /**< Bit mask for 11 bit Standard Frame Format ID */
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#define CAN_MAX_DATA_LEN 8 /**< Maximum number of data bytes in a CAN2.0B frame */
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#define CAN_IO_UNUSED (-1) /**< Marks GPIO as unused in CAN configuration */
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#define CAN_IO_UNUSED ((gpio_num_t) -1) /**< Marks GPIO as unused in CAN configuration */
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/** @endcond */
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/* ----------------------- Enum and Struct Definitions ---------------------- */
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@ -152,7 +159,8 @@ typedef struct {
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* @note Macro initializers are available for this structure
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*/
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typedef struct {
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uint8_t brp; /**< Baudrate prescaler (APB clock divider, even number from 2 to 128) */
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uint32_t brp; /**< Baudrate prescaler (i.e., APB clock divider) can be any even number from 2 to 128.
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For ESP32 Rev 2 or later, multiples of 4 from 132 to 256 are also supported */
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uint8_t tseg_1; /**< Timing segment 1 (Number of time quanta, between 1 to 16) */
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uint8_t tseg_2; /**< Timing segment 2 (Number of time quanta, 1 to 8) */
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uint8_t sjw; /**< Synchronization Jump Width (Max time quanta jump for synchronize from 1 to 4) */
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@ -392,6 +400,34 @@ esp_err_t can_initiate_recovery();
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*/
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esp_err_t can_get_status_info(can_status_info_t *status_info);
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/**
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* @brief Clear the transmit queue
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*
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* This function will clear the transmit queue of all messages.
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*
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* @note The transmit queue is automatically cleared when can_stop() or
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* can_initiate_recovery() is called.
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*
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* @return
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* - ESP_OK: Transmit queue cleared
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* - ESP_ERR_INVALID_STATE: CAN driver is not installed or TX queue is disabled
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*/
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esp_err_t can_clear_transmit_queue();
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/**
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* @brief Clear the receive queue
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*
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* This function will clear the receive queue of all messages.
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*
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* @note The receive queue is automatically cleared when can_start() is
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* called.
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*
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* @return
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* - ESP_OK: Transmit queue cleared
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* - ESP_ERR_INVALID_STATE: CAN driver is not installed
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*/
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esp_err_t can_clear_receive_queue();
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#ifdef __cplusplus
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}
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#endif
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@ -189,6 +189,14 @@ typedef struct {
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int data_in_num; /*!< DATA in pin*/
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} i2s_pin_config_t;
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/**
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* @brief I2S PDM RX downsample mode
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*/
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typedef enum {
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I2S_PDM_DSR_8S = 0, /*!< downsampling number is 8 for PDM RX mode*/
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I2S_PDM_DSR_16S, /*!< downsampling number is 16 for PDM RX mode*/
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I2S_PDM_DSR_MAX,
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} i2s_pdm_dsr_t;
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typedef intr_handle_t i2s_isr_handle_t;
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/**
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@ -215,6 +223,25 @@ typedef intr_handle_t i2s_isr_handle_t;
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*/
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esp_err_t i2s_set_pin(i2s_port_t i2s_num, const i2s_pin_config_t *pin);
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/**
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* @brief Set PDM mode down-sample rate
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* In PDM RX mode, there would be 2 rounds of downsample process in hardware.
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* In the first downsample process, the sampling number can be 16 or 8.
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* In the second downsample process, the sampling number is fixed as 8.
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* So the clock frequency in PDM RX mode would be (fpcm * 64) or (fpcm * 128) accordingly.
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* @param i2s_num I2S_NUM_0, I2S_NUM_1
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* @param dsr i2s RX down sample rate for PDM mode.
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*
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* @note After calling this function, it would call i2s_set_clk inside to update the clock frequency.
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* Please call this function after I2S driver has been initialized.
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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* - ESP_ERR_NO_MEM Out of memory
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*/
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esp_err_t i2s_set_pdm_rx_down_sample(i2s_port_t i2s_num, i2s_pdm_dsr_t dsr);
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/**
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* @brief Set I2S dac mode, I2S built-in DAC is disabled by default
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*
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@ -476,6 +503,16 @@ esp_err_t i2s_zero_dma_buffer(i2s_port_t i2s_num);
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*/
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esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, i2s_bits_per_sample_t bits, i2s_channel_t ch);
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/**
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* @brief get clock set on particular port number.
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*
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* @param i2s_num I2S_NUM_0, I2S_NUM_1
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*
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* @return
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* - actual clock set by i2s driver
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*/
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float i2s_get_clk(i2s_port_t i2s_num);
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/**
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* @brief Set built-in ADC mode for I2S DMA, this function will initialize ADC pad,
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* and set ADC parameters.
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@ -80,6 +80,19 @@ typedef enum {
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RMT_CARRIER_LEVEL_MAX
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} rmt_carrier_level_t;
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typedef enum {
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RMT_CHANNEL_UNINIT = 0, /*!< RMT channel uninitialized */
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RMT_CHANNEL_IDLE = 1, /*!< RMT channel status idle */
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RMT_CHANNEL_BUSY = 2, /*!< RMT channel status busy */
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} rmt_channel_status_t;
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/**
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* @brief Data struct of RMT channel status
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*/
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typedef struct {
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rmt_channel_status_t status[RMT_CHANNEL_MAX]; /*!< Store the current status of each channel */
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} rmt_channel_status_result_t;
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/**
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* @brief Data struct of RMT TX configure parameters
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*/
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@ -479,6 +492,7 @@ esp_err_t rmt_get_idle_level(rmt_channel_t channel, bool* idle_out_en, rmt_idle_
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*
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* @param channel RMT channel (0-7)
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* @param status Pointer to accept channel status.
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* Please refer to RMT_CHnSTATUS_REG(n=0~7) in `rmt_reg.h` for more details of each field.
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*
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* @return
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* - ESP_ERR_INVALID_ARG Parameter error
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@ -650,6 +664,19 @@ esp_err_t rmt_driver_install(rmt_channel_t channel, size_t rx_buf_size, int intr
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*/
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esp_err_t rmt_driver_uninstall(rmt_channel_t channel);
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/**
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* @brief Get the current status of eight channels.
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*
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* @note Do not call this function if it is possible that `rmt_driver_uninstall` will be called at the same time.
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*
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* @param[out] channel_status store the current status of each channel
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*
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* @return
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* - ESP_ERR_INVALID_ARG Parameter is NULL
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* - ESP_OK Success
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*/
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esp_err_t rmt_get_channel_status(rmt_channel_status_result_t *channel_status);
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/**
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* @brief RMT send waveform from rmt_item array.
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*
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@ -42,11 +42,11 @@ extern "C"
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*
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* Then points tx_buffer to ``&data``.
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*
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* @param data Data to be sent, can be uint8_t, uint16_t or uint32_t. @param
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* len Length of data to be sent, since the SPI peripheral sends from the MSB,
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* this helps to shift the data to the MSB.
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* @param DATA Data to be sent, can be uint8_t, uint16_t or uint32_t.
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* @param LEN Length of data to be sent, since the SPI peripheral sends from
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* the MSB, this helps to shift the data to the MSB.
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*/
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#define SPI_SWAP_DATA_TX(data, len) __builtin_bswap32((uint32_t)data<<(32-len))
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#define SPI_SWAP_DATA_TX(DATA, LEN) __builtin_bswap32((uint32_t)(DATA)<<(32-(LEN)))
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/**
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* Transform received data of length <= 32 bits to the format of an unsigned integer.
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@ -55,11 +55,11 @@ extern "C"
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*
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* uint16_t data = SPI_SWAP_DATA_RX(*(uint32_t*)t->rx_data, 15);
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*
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* @param data Data to be rearranged, can be uint8_t, uint16_t or uint32_t.
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* @param len Length of data received, since the SPI peripheral writes from
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* @param DATA Data to be rearranged, can be uint8_t, uint16_t or uint32_t.
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* @param LEN Length of data received, since the SPI peripheral writes from
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* the MSB, this helps to shift the data to the LSB.
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*/
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#define SPI_SWAP_DATA_RX(data, len) (__builtin_bswap32(data)>>(32-len))
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#define SPI_SWAP_DATA_RX(DATA, LEN) (__builtin_bswap32(DATA)>>(32-(LEN)))
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/**
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* @brief Enum with the three SPI peripherals that are software-accessible in it
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@ -101,9 +101,32 @@ typedef struct {
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* Call this if your driver wants to manage a SPI peripheral.
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*
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* @param host Peripheral to claim
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* @param source The caller indentification string.
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*
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* @return True if peripheral is claimed successfully; false if peripheral already is claimed.
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*/
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bool spicommon_periph_claim(spi_host_device_t host);
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bool spicommon_periph_claim(spi_host_device_t host, const char* source);
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// The macro is to keep the back-compatibility of IDF v3.2 and before
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// In this way we can call spicommon_periph_claim with two arguments, or the host with the source set to the calling function name
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// When two arguments (host, func) are given, __spicommon_periph_claim2 is called
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// or if only one arguments (host) is given, __spicommon_periph_claim1 is called
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#define spicommon_periph_claim(host...) __spicommon_periph_claim(host, 2, 1)
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#define __spicommon_periph_claim(host, source, n, ...) __spicommon_periph_claim ## n(host, source)
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#define __spicommon_periph_claim1(host, _) ({ \
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char* warning_str = "calling spicommon_periph_claim without source string is deprecated.";\
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spicommon_periph_claim(host, __FUNCTION__); })
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#define __spicommon_periph_claim2(host, func) spicommon_periph_claim(host, func)
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/**
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* @brief Check whether the spi periph is in use.
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*
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* @param host Peripheral to check.
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*
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* @return True if in use, otherwise false.
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*/
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bool spicommon_periph_in_use(spi_host_device_t host);
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/**
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* @brief Return the SPI peripheral so another driver can claim it.
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@ -124,6 +147,15 @@ bool spicommon_periph_free(spi_host_device_t host);
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*/
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bool spicommon_dma_chan_claim(int dma_chan);
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/**
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* @brief Check whether the spi DMA channel is in use.
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*
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* @param dma_chan DMA channel to check.
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*
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* @return True if in use, otherwise false.
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*/
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bool spicommon_dma_chan_in_use(int dma_chan);
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/**
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* @brief Return the SPI DMA channel so other driver can claim it, or just to power down DMA.
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*
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@ -168,6 +168,10 @@ typedef struct spi_device_t* spi_device_handle_t; ///< Handle for a device on a
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* @warning If a DMA channel is selected, any transmit and receive buffer used should be allocated in
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* DMA-capable memory.
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*
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* @warning The ISR of SPI is always executed on the core which calls this
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* function. Never starve the ISR on this core or the SPI transactions will not
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* be handled.
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*
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* @return
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* - ESP_ERR_INVALID_ARG if configuration is invalid
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* - ESP_ERR_INVALID_STATE if host already is in use
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@ -73,7 +73,10 @@ struct spi_slave_transaction_t {
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size_t length; ///< Total data length, in bits
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size_t trans_len; ///< Transaction data length, in bits
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const void *tx_buffer; ///< Pointer to transmit buffer, or NULL for no MOSI phase
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void *rx_buffer; ///< Pointer to receive buffer, or NULL for no MISO phase
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void *rx_buffer; /**< Pointer to receive buffer, or NULL for no MISO phase.
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* When the DMA is anabled, must start at WORD boundary (``rx_buffer%4==0``),
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* and has length of a multiple of 4 bytes.
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*/
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void *user; ///< User-defined variable. Can be used to store eg transaction ID.
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};
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@ -89,10 +92,14 @@ struct spi_slave_transaction_t {
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* it. The SPI hardware has two DMA channels to share. This parameter indicates which
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* one to use.
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*
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* @warning If a DMA channel is selected, any transmit and receive buffer used should be allocated in
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* @warning If a DMA channel is selected, any transmit and receive buffer used should be allocated in
|
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* DMA-capable memory.
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*
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* @return
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* @warning The ISR of SPI is always executed on the core which calls this
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* function. Never starve the ISR on this core or the SPI transactions will not
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* be handled.
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*
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* @return
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* - ESP_ERR_INVALID_ARG if configuration is invalid
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* - ESP_ERR_INVALID_STATE if host already is in use
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* - ESP_ERR_NO_MEM if out of memory
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@ -104,7 +111,7 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b
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* @brief Free a SPI bus claimed as a SPI slave interface
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*
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* @param host SPI peripheral to free
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* @return
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* @return
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* - ESP_ERR_INVALID_ARG if parameter is invalid
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* - ESP_ERR_INVALID_STATE if not all devices on the bus are freed
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* - ESP_OK on success
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@ -128,7 +135,7 @@ esp_err_t spi_slave_free(spi_host_device_t host);
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* into the transaction description.
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* @param ticks_to_wait Ticks to wait until there's room in the queue; use portMAX_DELAY to
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* never time out.
|
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* @return
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* @return
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* - ESP_ERR_INVALID_ARG if parameter is invalid
|
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* - ESP_OK on success
|
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*/
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@ -138,19 +145,19 @@ esp_err_t spi_slave_queue_trans(spi_host_device_t host, const spi_slave_transact
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/**
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* @brief Get the result of a SPI transaction queued earlier
|
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*
|
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* This routine will wait until a transaction to the given device (queued earlier with
|
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* This routine will wait until a transaction to the given device (queued earlier with
|
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* spi_slave_queue_trans) has succesfully completed. It will then return the description of the
|
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* completed transaction so software can inspect the result and e.g. free the memory or
|
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* completed transaction so software can inspect the result and e.g. free the memory or
|
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* re-use the buffers.
|
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*
|
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* It is mandatory to eventually use this function for any transaction queued by ``spi_slave_queue_trans``.
|
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*
|
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* @param host SPI peripheral to that is acting as a slave
|
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* @param[out] trans_desc Pointer to variable able to contain a pointer to the description of the
|
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* @param[out] trans_desc Pointer to variable able to contain a pointer to the description of the
|
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* transaction that is executed
|
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* @param ticks_to_wait Ticks to wait until there's a returned item; use portMAX_DELAY to never time
|
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* out.
|
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* @return
|
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* @return
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* - ESP_ERR_INVALID_ARG if parameter is invalid
|
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* - ESP_OK on success
|
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*/
|
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@ -161,16 +168,16 @@ esp_err_t spi_slave_get_trans_result(spi_host_device_t host, spi_slave_transacti
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* @brief Do a SPI transaction
|
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*
|
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* Essentially does the same as spi_slave_queue_trans followed by spi_slave_get_trans_result. Do
|
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* not use this when there is still a transaction queued that hasn't been finalized
|
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* not use this when there is still a transaction queued that hasn't been finalized
|
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* using spi_slave_get_trans_result.
|
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*
|
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* @param host SPI peripheral to that is acting as a slave
|
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* @param trans_desc Pointer to variable able to contain a pointer to the description of the
|
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* @param trans_desc Pointer to variable able to contain a pointer to the description of the
|
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* transaction that is executed. Not const because we may want to write status back
|
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* into the transaction description.
|
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* @param ticks_to_wait Ticks to wait until there's a returned item; use portMAX_DELAY to never time
|
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* out.
|
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* @return
|
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* @return
|
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* - ESP_ERR_INVALID_ARG if parameter is invalid
|
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* - ESP_OK on success
|
||||
*/
|
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|
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@ -801,7 +801,7 @@ esp_err_t uart_get_collision_flag(uart_port_t uart_num, bool* collision_flag);
|
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* light sleep. This function allows setting the threshold value.
|
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*
|
||||
* Stop bit and parity bits (if enabled) also contribute to the number of edges.
|
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* For example, letter 'a' with ASCII code 97 is encoded as 010001101 on the wire
|
||||
* For example, letter 'a' with ASCII code 97 is encoded as 0100001101 on the wire
|
||||
* (with 8n1 configuration), start and stop bits included. This sequence has 3
|
||||
* positive edges (transitions from 0 to 1). Therefore, to wake up the system
|
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* when 'a' is sent, set wakeup_threshold=3.
|
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@ -813,7 +813,10 @@ esp_err_t uart_get_collision_flag(uart_port_t uart_num, bool* collision_flag);
|
||||
* correct baud rate all the time, select REF_TICK as UART clock source,
|
||||
* by setting use_ref_tick field in uart_config_t to true.
|
||||
*
|
||||
* @note in ESP32, UART2 does not support light sleep wakeup feature.
|
||||
* @note in ESP32, the wakeup signal can only be input via IO_MUX (i.e.
|
||||
* GPIO3 should be configured as function_1 to wake up UART0,
|
||||
* GPIO9 should be configured as function_5 to wake up UART1), UART2
|
||||
* does not support light sleep wakeup feature.
|
||||
*
|
||||
* @param uart_num UART number
|
||||
* @param wakeup_threshold number of RX edges for light sleep wakeup, value is 3 .. 0x3ff.
|
||||
|
||||
Reference in New Issue
Block a user