IDF release/v3.3 (#3672)

ESP-IDF release/v3.3: 66d3783c8
esp-face: 420fc7e
esp32-camera: 0107093

tools/sdk/include/esp32/xtensa/cacheasm.h

@@ -148,7 +148,7 @@
  *                  if all sets affected by cainst,
  *                  or 1 if only one set (or not all sets) of the cache
  *                  is affected by cainst (eg. DIWB or DIWBI [not yet ISA defined]).
- *	aa, ab      unique address registers (temporaries).
+ *	aa, ab      unique address registers (temporaries). 
  *	awb         set to other than a0 if wb type of instruction
  *	loopokay    1 allows use of zero-overhead loops, 0 does not
  *	immrange    range (max value) of cainst's immediate offset parameter, in bytes
@@ -904,7 +904,7 @@
 	movi	\aa, XCHAL_DCACHE_WAYS
 .Ldcgw:
 #else
-	// All ways are always enabled
+	// All ways are always enabled  
 	movi	\aa, XCHAL_DCACHE_WAYS
 #endif
 #else

tools/sdk/include/esp32/xtensa/coreasm.h

@@ -558,7 +558,7 @@
  *  macro implements version of beqi for arbitrary 32-bit immediate value
  *
  *     beqi32 ax, ay, imm32, label
- *
+ * 
  *  Compares value in register ax with imm32 value and jumps to label if
  *  equal. Clobbers register ay if needed
  *
@@ -573,7 +573,7 @@
         .ifeq (\imm)		// 0 ?
 		beqz	\ax, \label
         .else
-		//  We could also handle immediates 10,12,16,32,64,128,256
+		//  We could also handle immediates 10,12,16,32,64,128,256 
 		//  but it would be a long macro...
 		movi	\ay, \imm
 		beq	\ax, \ay, \label
@@ -639,9 +639,9 @@
 
 /*----------------------------------------------------------------------
  *  addx2
- *
+ *  
  *  implements addx2 on machines that do not have it configured
- *
+ *     
  */
 
 #if !XCHAL_HAVE_ADDX
@@ -666,7 +666,7 @@
 	
 /*----------------------------------------------------------------------
  *  addx4
- *
+ * 
  *  implements addx4 on machines that do not have it configured
  *
  */
@@ -696,9 +696,9 @@
 
 /*----------------------------------------------------------------------
  *  addx8
- *
+ * 
  *  implements addx8 on machines that do not have it configured
- *
+ * 
  */
 
 #if !XCHAL_HAVE_ADDX
@@ -731,7 +731,7 @@
 
 /*----------------------------------------------------------------------
  *  rfe_rfue
- *
+ * 
  *  Maps to RFUE on XEA1, and RFE on XEA2.  No mapping on XEAX.
  */
 
@@ -744,11 +744,11 @@
 	rfe
 	.endm
 #endif
-
+ 
 
 /*----------------------------------------------------------------------
  *  abi_entry
- *
+ * 
  *  Generate proper function entry sequence for the current ABI
  *  (windowed or call0).  Takes care of allocating stack space (up to 1kB)
  *  and saving the return PC, if necessary.  The corresponding abi_return
@@ -882,7 +882,7 @@
 
 /*----------------------------------------------------------------------
  *  abi_return
- *
+ * 
  *  Generate proper function exit sequence for the current ABI
  *  (windowed or call0).  Takes care of freeing stack space and
  *  restoring the return PC, if necessary.

tools/sdk/include/esp32/xtensa/xt_perf_consts.h

@@ -34,7 +34,7 @@
 #define XTPERF_CNT_DCACHE_MISSES         0x8006  /* DCache misses penalty in cycles */
 
 #define XTPERF_CNT_CYCLES         0  /* Count cycles */
-#define XTPERF_CNT_OVERFLOW       1  /* Overflow of counter n-1 (assuming this is counter n) */
+#define XTPERF_CNT_OVERFLOW       1  /* Overflow of counter n-1 (assuming this is counter n) */  
 #define XTPERF_CNT_INSN           2  /* Successfully completed instructions */
 #define XTPERF_CNT_D_STALL        3  /* Data-related GlobalStall cycles */
 #define XTPERF_CNT_I_STALL        4  /* Instruction-related and other GlobalStall cycles */
@@ -67,18 +67,18 @@
 #define XTPERF_MASK_COMMITTED_INSN               0x0001
 
 /* XTPERF_CNT_BRANCH_PENALTY selector mask */
-
+ 
 #define XTPERF_MASK_BRANCH_PENALTY               0x0001
 
 /* XTPERF_CNT_PIPELINE_INTERLOCKS selector mask */
 
 #define XTPERF_MASK_PIPELINE_INTERLOCKS          0x0001
 
-/* XTPERF_CNT_ICACHE_MISSES selector mask */
+/* XTPERF_CNT_ICACHE_MISSES selector mask */ 
 
 #define XTPERF_MASK_ICACHE_MISSES                0x0001
 
-/* XTPERF_CNT_DCACHE_MISSES selector mask */
+/* XTPERF_CNT_DCACHE_MISSES selector mask */ 
 
 #define XTPERF_MASK_DCACHE_MISSES                0x0001
 

tools/sdk/include/esp32/xtensa/xtensa-libdb-macros.h

@@ -156,6 +156,6 @@ extern "C" {
 #ifdef __cplusplus
 }
 #endif
-
+      
 #endif /* __H_LIBDB_MACROS */