espressif/arduino-esp32
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Update IDF to 65acd99 (#358)

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* Update IDF to 65acd99

* Update platformio and arduino build paths and libs

* Update esptool binaries
This commit is contained in:
Me No Dev
2017-05-06 20:29:12 +03:00
committed by GitHub
parent 450df7e3f8
commit 376961d168
221 changed files with 14441 additions and 523 deletions
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39
tools/sdk/include/ethernet/esp_eth.h
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@ -15,6 +15,7 @@
#ifndef __ESP_ETH_H__
#define __ESP_ETH_H__
#include <stdbool.h>
#include <stdint.h>
#include "esp_err.h"
@ -24,7 +25,7 @@ extern "C" {
typedef enum {
ETH_MODE_RMII = 0,
ETH_MDOE_MII,
ETH_MODE_MII,
} eth_mode_t;
typedef enum {
@ -34,7 +35,7 @@ typedef enum {
typedef enum {
ETH_MODE_HALFDUPLEX = 0,
ETH_MDOE_FULLDUPLEX,
ETH_MODE_FULLDUPLEX,
} eth_duplex_mode_t;
typedef enum {
@ -99,9 +100,10 @@ typedef struct {
bool flow_ctrl_enable; /*!< flag of flow ctrl enable */
eth_phy_get_partner_pause_enable_func phy_get_partner_pause_enable; /*!< get partner pause enable */
eth_phy_power_enable_func phy_power_enable; /*!< enable or disable phy power */
} eth_config_t;
/**
* @brief Init ethernet mac
*
@ -173,7 +175,7 @@ void esp_eth_get_mac(uint8_t mac[6]);
void esp_eth_smi_write(uint32_t reg_num, uint16_t value);
/**
* @brief Write phy reg with smi interface.
* @brief Read phy reg with smi interface.
*
* @note phy base addr must be right.
*
@ -183,6 +185,35 @@ void esp_eth_smi_write(uint32_t reg_num, uint16_t value);
*/
uint16_t esp_eth_smi_read(uint32_t reg_num);
/**
* @brief Continuously read a PHY register over SMI interface, wait until the register has the desired value.
*
* @note PHY base address must be right.
*
* @param reg_num: PHY register number
* @param value: Value to wait for (masked with value_mask)
* @param value_mask: Mask of bits to match in the register.
* @param timeout_ms: Timeout to wait for this value (milliseconds). 0 means never timeout.
*
* @return ESP_OK if desired value matches, ESP_ERR_TIMEOUT if timed out.
*/
esp_err_t esp_eth_smi_wait_value(uint32_t reg_num, uint16_t value, uint16_t value_mask, int timeout_ms);
/**
* @brief Continuously read a PHY register over SMI interface, wait until the register has all bits in a mask set.
*
* @note PHY base address must be right.
*
* @param reg_num: PHY register number
* @param value_mask: Value mask to wait for (all bits in this mask must be set)
* @param timeout_ms: Timeout to wait for this value (milliseconds). 0 means never timeout.
*
* @return ESP_OK if desired value matches, ESP_ERR_TIMEOUT if timed out.
*/
static inline esp_err_t esp_eth_smi_wait_set(uint32_t reg_num, uint16_t value_mask, int timeout_ms) {
return esp_eth_smi_wait_value(reg_num, value_mask, value_mask, timeout_ms);
}
/**
* @brief Free emac rx buf.
*