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Initial Esp32c3 Support (#5060)

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Me No Dev
2021-04-14 18:10:05 +03:00
committed by GitHub
parent 371f382db7
commit 404a31f445
1929 changed files with 382833 additions and 190 deletions
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229
cores/esp32/esp32-hal-rmt.c
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@ -28,15 +28,27 @@
*/
#if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
#define MAX_CHANNELS 8
#define MAX_DATA_PER_CHANNEL 64
#define MAX_DATA_PER_ITTERATION 62
#elif CONFIG_IDF_TARGET_ESP32S2
#define MAX_CHANNELS 4
#define MAX_DATA_PER_CHANNEL 64
#define MAX_DATA_PER_ITTERATION 62
#elif CONFIG_IDF_TARGET_ESP32C3
#define MAX_CHANNELS 4
#define MAX_DATA_PER_CHANNEL 48
#define MAX_DATA_PER_ITTERATION 46
#else
#error Target CONFIG_IDF_TARGET is not supported
#endif
#define MAX_DATA_PER_CHANNEL 64
#define MAX_DATA_PER_ITTERATION 62
#define _ABS(a) (a>0?a:-a)
#define _LIMIT(a,b) (a>b?b:a)
#if CONFIG_IDF_TARGET_ESP32C3
#define _INT_TX_END(channel) (1<<(channel))
#define _INT_RX_END(channel) (4<<(channel))
#define _INT_ERROR(channel) (16<<(channel))
#define _INT_THR_EVNT(channel) (256<<(channel))
#else
#define __INT_TX_END (1)
#define __INT_RX_END (2)
#define __INT_ERROR (4)
@ -46,6 +58,7 @@
#define _INT_RX_END(channel) (__INT_RX_END<<(channel*3))
#define _INT_ERROR(channel) (__INT_ERROR<<(channel*3))
#define _INT_THR_EVNT(channel) ((__INT_THR_EVNT)<<(channel))
#endif
#if CONFIG_DISABLE_HAL_LOCKS
# define RMT_MUTEX_LOCK(channel)
@ -55,7 +68,7 @@
# define RMT_MUTEX_UNLOCK(channel) xSemaphoreGive(g_rmt_objlocks[channel])
#endif /* CONFIG_DISABLE_HAL_LOCKS */
#define _RMT_INTERNAL_DEBUG
//#define _RMT_INTERNAL_DEBUG
#ifdef _RMT_INTERNAL_DEBUG
# define DEBUG_INTERRUPT_START(pin) digitalWrite(pin, 1);
# define DEBUG_INTERRUPT_END(pin) digitalWrite(pin, 0);
@ -162,12 +175,17 @@ bool rmtSetCarrier(rmt_obj_t* rmt, bool carrier_en, bool carrier_level, uint32_t
size_t channel = rmt->channel;
RMT_MUTEX_LOCK(channel);
#if CONFIG_IDF_TARGET_ESP32C3
RMT.tx_carrier[channel].low = low;
RMT.tx_carrier[channel].high = high;
RMT.rx_conf[channel].conf0.carrier_en = carrier_en;
RMT.rx_conf[channel].conf0.carrier_out_lv = carrier_level;
#else
RMT.carrier_duty_ch[channel].low = low;
RMT.carrier_duty_ch[channel].high = high;
RMT.conf_ch[channel].conf0.carrier_en = carrier_en;
RMT.conf_ch[channel].conf0.carrier_out_lv = carrier_level;
#endif
RMT_MUTEX_UNLOCK(channel);
return true;
@ -183,8 +201,13 @@ bool rmtSetFilter(rmt_obj_t* rmt, bool filter_en, uint32_t filter_level)
RMT_MUTEX_LOCK(channel);
#if CONFIG_IDF_TARGET_ESP32C3
RMT.rx_conf[channel].conf1.rx_filter_thres = filter_level;
RMT.rx_conf[channel].conf1.rx_filter_en = filter_en;
#else
RMT.conf_ch[channel].conf1.rx_filter_thres = filter_level;
RMT.conf_ch[channel].conf1.rx_filter_en = filter_en;
#endif
RMT_MUTEX_UNLOCK(channel);
@ -200,7 +223,11 @@ bool rmtSetRxThreshold(rmt_obj_t* rmt, uint32_t value)
size_t channel = rmt->channel;
RMT_MUTEX_LOCK(channel);
#if CONFIG_IDF_TARGET_ESP32C3
RMT.rx_conf[channel].conf0.idle_thres = value;
#else
RMT.conf_ch[channel].conf0.idle_thres = value;
#endif
RMT_MUTEX_UNLOCK(channel);
return true;
@ -265,7 +292,7 @@ bool rmtWrite(rmt_obj_t* rmt, rmt_data_t* data, size_t size)
int channel = rmt->channel;
int allocated_size = MAX_DATA_PER_CHANNEL * rmt->buffers;
if (size > allocated_size) {
if (size > (allocated_size - 1)) {
int half_tx_nr = MAX_DATA_PER_ITTERATION/2;
RMT_MUTEX_LOCK(channel);
@ -279,6 +306,18 @@ bool rmtWrite(rmt_obj_t* rmt, rmt_data_t* data, size_t size)
rmt->intr_mode = E_TX_INTR | E_TXTHR_INTR;
rmt->tx_state = E_SET_CONTI | E_FIRST_HALF;
#if CONFIG_IDF_TARGET_ESP32C3
//uint32_t val = RMT.tx_conf[channel].val;
// init the tx limit for interruption
RMT.tx_lim[channel].limit = half_tx_nr+2;
//RMT.tx_conf[channel].val = val;
//RMT.tx_conf[channel].conf_update = 1;
// reset memory pointer
RMT.tx_conf[channel].mem_rst = 1;
//RMT.tx_conf[channel].mem_rst = 0;
RMT.tx_conf[channel].mem_rd_rst = 1;
//RMT.tx_conf[channel].mem_rd_rst = 0;
#else
// init the tx limit for interruption
RMT.tx_lim_ch[channel].limit = half_tx_nr+2;
// reset memory pointer
@ -288,9 +327,9 @@ bool rmtWrite(rmt_obj_t* rmt, rmt_data_t* data, size_t size)
RMT.conf_ch[channel].conf1.mem_rd_rst = 0;
RMT.conf_ch[channel].conf1.mem_wr_rst = 1;
RMT.conf_ch[channel].conf1.mem_wr_rst = 0;
#endif
// set the tx end mark
RMTMEM.chan[channel].data32[MAX_DATA_PER_ITTERATION].val = 0;
//RMTMEM.chan[channel].data32[MAX_DATA_PER_ITTERATION].val = 0;
// clear and enable both Tx completed and half tx event
RMT.int_clr.val = _INT_TX_END(channel);
@ -304,6 +343,7 @@ bool rmtWrite(rmt_obj_t* rmt, rmt_data_t* data, size_t size)
RMT_MUTEX_UNLOCK(channel);
// start the transation
//return _rmtSendOnce(rmt, data, MAX_DATA_PER_ITTERATION, true);
return _rmtSendOnce(rmt, data, MAX_DATA_PER_ITTERATION, false);
} else {
// use one-go mode if data fits one buffer
@ -342,10 +382,15 @@ bool rmtBeginReceive(rmt_obj_t* rmt)
RMT.int_clr.val = _INT_ERROR(channel);
RMT.int_ena.val |= _INT_ERROR(channel);
#if CONFIG_IDF_TARGET_ESP32C3
RMT.rx_conf[channel].conf1.mem_owner = 1;
RMT.rx_conf[channel].conf1.mem_wr_rst = 1;
RMT.rx_conf[channel].conf1.rx_en = 1;
#else
RMT.conf_ch[channel].conf1.mem_owner = 1;
RMT.conf_ch[channel].conf1.mem_wr_rst = 1;
RMT.conf_ch[channel].conf1.rx_en = 1;
#endif
return true;
}
@ -384,17 +429,26 @@ bool rmtRead(rmt_obj_t* rmt, rmt_rx_data_cb_t cb, void * arg)
rmt->data_alloc = true;
}
#if CONFIG_IDF_TARGET_ESP32C3
RMT.rx_conf[channel].conf1.mem_owner = 1;
#else
RMT.conf_ch[channel].conf1.mem_owner = 1;
#endif
RMT.int_clr.val = _INT_RX_END(channel);
RMT.int_clr.val = _INT_ERROR(channel);
RMT.int_ena.val |= _INT_RX_END(channel);
RMT.int_ena.val |= _INT_ERROR(channel);
#if CONFIG_IDF_TARGET_ESP32C3
RMT.rx_conf[channel].conf1.mem_wr_rst = 1;
RMT.rx_conf[channel].conf1.rx_en = 1;
#else
RMT.conf_ch[channel].conf1.mem_wr_rst = 1;
RMT.conf_ch[channel].conf1.rx_en = 1;
#endif
RMT_MUTEX_UNLOCK(channel);
return true;
@ -407,7 +461,11 @@ bool rmtEnd(rmt_obj_t* rmt) {
int channel = rmt->channel;
RMT_MUTEX_LOCK(channel);
#if CONFIG_IDF_TARGET_ESP32C3
RMT.rx_conf[channel].conf1.rx_en = 1;
#else
RMT.conf_ch[channel].conf1.rx_en = 1;
#endif
RMT_MUTEX_UNLOCK(channel);
return true;
@ -437,7 +495,11 @@ bool rmtReadAsync(rmt_obj_t* rmt, rmt_data_t* data, size_t size, void* eventFlag
RMT_MUTEX_LOCK(channel);
rmt->intr_mode = E_RX_INTR;
#if CONFIG_IDF_TARGET_ESP32C3
RMT.rx_conf[channel].conf1.mem_owner = 1;
#else
RMT.conf_ch[channel].conf1.mem_owner = 1;
#endif
RMT.int_clr.val = _INT_RX_END(channel);
RMT.int_clr.val = _INT_ERROR(channel);
@ -445,9 +507,15 @@ bool rmtReadAsync(rmt_obj_t* rmt, rmt_data_t* data, size_t size, void* eventFlag
RMT.int_ena.val |= _INT_RX_END(channel);
RMT.int_ena.val |= _INT_ERROR(channel);
#if CONFIG_IDF_TARGET_ESP32C3
RMT.rx_conf[channel].conf1.mem_wr_rst = 1;
RMT.rx_conf[channel].conf1.rx_en = 1;
#else
RMT.conf_ch[channel].conf1.mem_wr_rst = 1;
RMT.conf_ch[channel].conf1.rx_en = 1;
#endif
RMT_MUTEX_UNLOCK(channel);
// wait for data if requested so
@ -474,14 +542,20 @@ float rmtSetTick(rmt_obj_t* rmt, float tick)
* rmt tick for 1 MHz -> 1us (1x) div_cnt = 0x01
256us (256x) div_cnt = 0x00
*/
int apb_div = _LIMIT(tick/12.5, 256);
int ref_div = _LIMIT(tick/1000, 256);
float apb_tick = 12.5 * apb_div;
float ref_tick = 1000.0 * ref_div;
size_t channel = rmt->channel;
#if CONFIG_IDF_TARGET_ESP32C3
int apb_div = _LIMIT(tick/25.0, 256);
float apb_tick = 25.0 * apb_div;
RMT.tx_conf[channel].div_cnt = apb_div & 0xFF;
RMT.tx_conf[channel].conf_update = 1;
return apb_tick;
#else
int apb_div = _LIMIT(tick/12.5, 256);
int ref_div = _LIMIT(tick/1000, 256);
float apb_tick = 12.5 * apb_div;
float ref_tick = 1000.0 * ref_div;
if (_ABS(apb_tick - tick) < _ABS(ref_tick - tick)) {
RMT.conf_ch[channel].conf0.div_cnt = apb_div & 0xFF;
RMT.conf_ch[channel].conf1.ref_always_on = 1;
@ -491,6 +565,7 @@ float rmtSetTick(rmt_obj_t* rmt, float tick)
RMT.conf_ch[channel].conf1.ref_always_on = 0;
return ref_tick;
}
#endif
}
rmt_obj_t* rmtInit(int pin, bool tx_not_rx, rmt_reserve_memsize_t memsize)
@ -553,6 +628,47 @@ rmt_obj_t* rmtInit(int pin, bool tx_not_rx, rmt_reserve_memsize_t memsize)
// - no carrier, filter
// - timebase tick of 1us
// - idle threshold set to 0x8000 (max pulse width + 1)
#if CONFIG_IDF_TARGET_ESP32C3
RMT.sys_conf.fifo_mask = 1;
if (tx_not_rx) {
RMT.tx_lim[channel].limit = MAX_DATA_PER_ITTERATION/2 + 2;
RMT.tx_conf[channel].val = 0;
// RMT.tx_conf[channel].carrier_en = 0;
// RMT.tx_conf[channel].carrier_out_lv = 0;
// RMT.tx_conf[channel].tx_conti_mode = 0;
// RMT.tx_conf[channel].idle_out_lv = 0; // signal level for idle
// RMT.tx_conf[channel].tx_start = 0;
// RMT.tx_conf[channel].tx_stop = 0;
// RMT.tx_conf[channel].carrier_eff_en = 0;
// RMT.tx_conf[channel].afifo_rst = 0;
// RMT.tx_conf[channel].conf_update = 0;
// RMT.tx_conf[channel].mem_tx_wrap_en = 0;
// RMT.tx_conf[channel].mem_rst = 1;
RMT.tx_conf[channel].idle_out_en = 1; // enable idle
RMT.tx_conf[channel].div_cnt = 1;
RMT.tx_conf[channel].mem_size = buffers;
RMT.tx_conf[channel].mem_rd_rst = 1;
RMT.tx_conf[channel].conf_update = 1;
} else {
RMT.rx_conf[channel].conf0.div_cnt = 1;
RMT.rx_conf[channel].conf0.mem_size = buffers;
RMT.rx_conf[channel].conf0.carrier_en = 0;
RMT.rx_conf[channel].conf0.carrier_out_lv = 0;
RMT.rx_conf[channel].conf0.idle_thres = 0x80;
RMT.rx_conf[channel].conf1.rx_filter_en = 0;
RMT.rx_conf[channel].conf1.rx_filter_thres = 0;
RMT.rx_conf[channel].conf1.mem_rst = 0;
RMT.rx_conf[channel].conf1.mem_rx_wrap_en = 0;
RMT.rx_conf[channel].conf1.afifo_rst = 0;
RMT.rx_conf[channel].conf1.conf_update = 0;
RMT.rx_conf[channel].conf1.rx_en = 1;
RMT.rx_conf[channel].conf1.mem_owner = 1;
RMT.rx_conf[channel].conf1.mem_wr_rst = 1;
}
#else
RMT.conf_ch[channel].conf0.div_cnt = 1;
RMT.conf_ch[channel].conf0.mem_size = buffers;
RMT.conf_ch[channel].conf0.carrier_en = 0;
@ -585,7 +701,7 @@ rmt_obj_t* rmtInit(int pin, bool tx_not_rx, rmt_reserve_memsize_t memsize)
RMT.conf_ch[channel].conf1.mem_owner = 1;
RMT.conf_ch[channel].conf1.mem_wr_rst = 1;
}
#endif
// install interrupt if at least one channel is active
if (!intr_handle) {
esp_intr_alloc(ETS_RMT_INTR_SOURCE, (int)ARDUINO_ISR_FLAG, _rmt_isr, NULL, &intr_handle);
@ -604,7 +720,11 @@ bool _rmtSendOnce(rmt_obj_t* rmt, rmt_data_t* data, size_t size, bool continuous
return false;
}
int channel = rmt->channel;
#if CONFIG_IDF_TARGET_ESP32C3
RMT.sys_conf.fifo_mask = 1;
#else
RMT.apb_conf.fifo_mask = 1;
#endif
if (data && size>0) {
size_t i;
volatile uint32_t* rmt_mem_ptr = &(RMTMEM.chan[channel].data32[0].val);
@ -616,9 +736,15 @@ bool _rmtSendOnce(rmt_obj_t* rmt, rmt_data_t* data, size_t size, bool continuous
}
RMT_MUTEX_LOCK(channel);
#if CONFIG_IDF_TARGET_ESP32C3
RMT.tx_conf[channel].tx_conti_mode = continuous;
RMT.tx_conf[channel].mem_rd_rst = 1;
RMT.tx_conf[channel].tx_start = 1;
#else
RMT.conf_ch[channel].conf1.tx_conti_mode = continuous;
RMT.conf_ch[channel].conf1.mem_rd_rst = 1;
RMT.conf_ch[channel].conf1.tx_start = 1;
#endif
RMT_MUTEX_UNLOCK(channel);
return true;
@ -643,6 +769,7 @@ static void _initPin(int pin, int channel, bool tx_not_rx)
{
if (!periph_enabled) {
periph_enabled = true;
periph_module_reset( PERIPH_RMT_MODULE );
periph_module_enable( PERIPH_RMT_MODULE );
}
if (tx_not_rx) {
@ -658,6 +785,7 @@ static void _initPin(int pin, int channel, bool tx_not_rx)
static void ARDUINO_ISR_ATTR _rmt_isr(void* arg)
{
//DEBUG_INTERRUPT_START(4);
int intr_val = RMT.int_st.val;
size_t ch;
for (ch = 0; ch < MAX_CHANNELS; ch++) {
@ -692,9 +820,15 @@ static void ARDUINO_ISR_ATTR _rmt_isr(void* arg)
(g_rmt_objects[ch].cb)(data_received, _rmt_get_mem_len(ch), g_rmt_objects[ch].arg);
// restart the reception
#if CONFIG_IDF_TARGET_ESP32C3
RMT.rx_conf[ch].conf1.mem_owner = 1;
RMT.rx_conf[ch].conf1.mem_wr_rst = 1;
RMT.rx_conf[ch].conf1.rx_en = 1;
#else
RMT.conf_ch[ch].conf1.mem_owner = 1;
RMT.conf_ch[ch].conf1.mem_wr_rst = 1;
RMT.conf_ch[ch].conf1.rx_en = 1;
#endif
RMT.int_ena.val |= _INT_RX_END(ch);
} else {
// if not callback provide, expect only one Rx
@ -720,10 +854,17 @@ static void ARDUINO_ISR_ATTR _rmt_isr(void* arg)
xEventGroupSetBits(g_rmt_objects[ch].events, RMT_FLAG_ERROR);
}
// reset memory
#if CONFIG_IDF_TARGET_ESP32C3
RMT.tx_conf[ch].mem_rd_rst = 1;
RMT.tx_conf[ch].mem_rd_rst = 0;
RMT.rx_conf[ch].conf1.mem_wr_rst = 1;
RMT.rx_conf[ch].conf1.mem_wr_rst = 0;
#else
RMT.conf_ch[ch].conf1.mem_rd_rst = 1;
RMT.conf_ch[ch].conf1.mem_rd_rst = 0;
RMT.conf_ch[ch].conf1.mem_wr_rst = 1;
RMT.conf_ch[ch].conf1.mem_wr_rst = 0;
#endif
}
if (intr_val & _INT_TX_END(ch)) {
@ -735,15 +876,24 @@ static void ARDUINO_ISR_ATTR _rmt_isr(void* arg)
if (intr_val & _INT_THR_EVNT(ch)) {
// clear the flag
RMT.int_clr.val = _INT_THR_EVNT(ch);
#if CONFIG_IDF_TARGET_ESP32C3
//RMT.int_clr.val = _INT_TX_END(ch);
//RMT.int_ena.val |= _INT_TX_END(ch);
#endif
// initial setup of continuous mode
if (g_rmt_objects[ch].tx_state & E_SET_CONTI) {
#if CONFIG_IDF_TARGET_ESP32C3
RMT.tx_conf[ch].tx_conti_mode = 1;
#else
RMT.conf_ch[ch].conf1.tx_conti_mode = 1;
#endif
g_rmt_objects[ch].intr_mode &= ~E_SET_CONTI;
}
_rmt_tx_mem_first(ch);
}
}
//DEBUG_INTERRUPT_END(4);
}
static void ARDUINO_ISR_ATTR _rmt_tx_mem_second(uint8_t ch)
@ -753,14 +903,23 @@ static void ARDUINO_ISR_ATTR _rmt_tx_mem_second(uint8_t ch)
int half_tx_nr = MAX_DATA_PER_ITTERATION/2;
int i;
#if CONFIG_IDF_TARGET_ESP32C3
RMT.tx_lim[ch].limit = half_tx_nr+2;
#else
RMT.tx_lim_ch[ch].limit = half_tx_nr+2;
#endif
RMT.int_clr.val = _INT_THR_EVNT(ch);
RMT.int_ena.val |= _INT_THR_EVNT(ch);
#if CONFIG_IDF_TARGET_ESP32C3
//RMT.int_clr.val = _INT_TX_END(ch);
//RMT.int_ena.val &= ~_INT_TX_END(ch);
#endif
g_rmt_objects[ch].tx_state |= E_FIRST_HALF;
if (data) {
int remaining_size = g_rmt_objects[ch].data_size;
//ets_printf("RMT Tx[%d] %d\n", ch, remaining_size);
// will the remaining data occupy the entire halfbuffer
if (remaining_size > half_tx_nr) {
for (i = 0; i < half_tx_nr; i++) {
@ -779,17 +938,30 @@ static void ARDUINO_ISR_ATTR _rmt_tx_mem_second(uint8_t ch)
g_rmt_objects[ch].data_ptr = NULL;
}
#if CONFIG_IDF_TARGET_ESP32C3
RMTMEM.chan[ch].data32[half_tx_nr+i].val = 0;
RMT.tx_conf[ch].tx_start = 1;
#endif
} else if ((!(g_rmt_objects[ch].tx_state & E_LAST_DATA)) &&
(!(g_rmt_objects[ch].tx_state & E_END_TRANS))) {
//ets_printf("RMT Tx finishing %d!\n", ch);
for (i = 0; i < half_tx_nr; i++) {
RMTMEM.chan[ch].data32[half_tx_nr+i].val = 0x000F000F;
}
RMTMEM.chan[ch].data32[half_tx_nr+i].val = 0;
g_rmt_objects[ch].tx_state |= E_LAST_DATA;
#if CONFIG_IDF_TARGET_ESP32C3
RMT.tx_conf[ch].tx_conti_mode = 0;
#else
RMT.conf_ch[ch].conf1.tx_conti_mode = 0;
#endif
} else {
log_d("RMT Tx finished %d!\n", ch);
//ets_printf("RMT Tx finished %d!\n", ch);
#if CONFIG_IDF_TARGET_ESP32C3
RMT.tx_conf[ch].tx_conti_mode = 0;
#else
RMT.conf_ch[ch].conf1.tx_conti_mode = 0;
#endif
RMT.int_ena.val &= ~_INT_TX_END(ch);
RMT.int_ena.val &= ~_INT_THR_EVNT(ch);
g_rmt_objects[ch].intr_mode = E_NO_INTR;
@ -805,10 +977,15 @@ static void ARDUINO_ISR_ATTR _rmt_tx_mem_first(uint8_t ch)
int half_tx_nr = MAX_DATA_PER_ITTERATION/2;
int i;
RMT.int_ena.val &= ~_INT_THR_EVNT(ch);
#if CONFIG_IDF_TARGET_ESP32C3
RMT.tx_lim[ch].limit = 0;
#else
RMT.tx_lim_ch[ch].limit = 0;
#endif
if (data) {
int remaining_size = g_rmt_objects[ch].data_size;
//ets_printf("RMT TxF[%d] %d\n", ch, remaining_size);
// will the remaining data occupy the entire halfbuffer
if (remaining_size > half_tx_nr) {
@ -819,7 +996,11 @@ static void ARDUINO_ISR_ATTR _rmt_tx_mem_first(uint8_t ch)
g_rmt_objects[ch].tx_state &= ~E_FIRST_HALF;
// turn off the treshold interrupt
RMT.int_ena.val &= ~_INT_THR_EVNT(ch);
#if CONFIG_IDF_TARGET_ESP32C3
RMT.tx_lim[ch].limit = 0;
#else
RMT.tx_lim_ch[ch].limit = 0;
#endif
g_rmt_objects[ch].data_size -= half_tx_nr;
g_rmt_objects[ch].data_ptr += half_tx_nr;
} else {
@ -836,23 +1017,37 @@ static void ARDUINO_ISR_ATTR _rmt_tx_mem_first(uint8_t ch)
g_rmt_objects[ch].data_ptr = NULL;
}
} else {
//ets_printf("RMT TxF finished %d!\n", ch);
for (i = 0; i < half_tx_nr; i++) {
RMTMEM.chan[ch].data32[i].val = 0x000F000F;
}
RMTMEM.chan[ch].data32[i].val = 0;
g_rmt_objects[ch].tx_state &= ~E_FIRST_HALF;
#if CONFIG_IDF_TARGET_ESP32C3
RMT.tx_lim[ch].limit = 0;
#else
RMT.tx_lim_ch[ch].limit = 0;
#endif
g_rmt_objects[ch].tx_state |= E_LAST_DATA;
#if CONFIG_IDF_TARGET_ESP32C3
RMT.tx_conf[ch].tx_conti_mode = 0;
#else
RMT.conf_ch[ch].conf1.tx_conti_mode = 0;
#endif
}
DEBUG_INTERRUPT_END(2);
}
static int ARDUINO_ISR_ATTR _rmt_get_mem_len(uint8_t channel)
{
#if CONFIG_IDF_TARGET_ESP32C3
int block_num = RMT.rx_conf[channel].conf0.mem_size;
int item_block_len = block_num * 48;
#else
int block_num = RMT.conf_ch[channel].conf0.mem_size;
int item_block_len = block_num * 64;
#endif
volatile rmt_item32_t* data = RMTMEM.chan[channel].data32;
int idx;
for(idx = 0; idx < item_block_len; idx++) {