mirror of
https://github.com/0xFEEDC0DE64/arduino-esp32.git
synced 2025-06-30 20:40:59 +02:00
IDF release/v4.4 6a7d83af19
* Update toolchain to 2021r2 (#5828) * Update C3 libs to support only ECO3 and newer
This commit is contained in:
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@ -111,6 +111,9 @@ TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte2(uint32_t ui32) { return
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TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte1(uint32_t ui32) { return TU_U32_BYTE1(ui32); }
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TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u32_byte0(uint32_t ui32) { return TU_U32_BYTE0(ui32); }
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TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u32_high16(uint32_t ui32) { return (uint16_t) (ui32 >> 16); }
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TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u32_low16 (uint32_t ui32) { return (uint16_t) (ui32 & 0x0000ffffu); }
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TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_high(uint16_t ui16) { return TU_U16_HIGH(ui16); }
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TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_u16_low (uint16_t ui16) { return TU_U16_LOW(ui16); }
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@ -235,37 +238,6 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16 (void* mem, ui
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#endif
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/*------------------------------------------------------------------*/
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/* Count number of arguments of __VA_ARGS__
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* - reference https://groups.google.com/forum/#!topic/comp.std.c/d-6Mj5Lko_s
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* - _GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th)
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* - _RSEQ_N() is reverse sequential to N to add padding to have
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* Nth position is the same as the number of arguments
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* - ##__VA_ARGS__ is used to deal with 0 paramerter (swallows comma)
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*------------------------------------------------------------------*/
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#ifndef TU_ARGS_NUM
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#define TU_ARGS_NUM(...) _TU_NARG(_0, ##__VA_ARGS__,_RSEQ_N())
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#define _TU_NARG(...) _GET_NTH_ARG(__VA_ARGS__)
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#define _GET_NTH_ARG( \
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_1, _2, _3, _4, _5, _6, _7, _8, _9,_10, \
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_11,_12,_13,_14,_15,_16,_17,_18,_19,_20, \
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_21,_22,_23,_24,_25,_26,_27,_28,_29,_30, \
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_31,_32,_33,_34,_35,_36,_37,_38,_39,_40, \
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_41,_42,_43,_44,_45,_46,_47,_48,_49,_50, \
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_51,_52,_53,_54,_55,_56,_57,_58,_59,_60, \
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_61,_62,_63,N,...) N
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#define _RSEQ_N() \
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62,61,60, \
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59,58,57,56,55,54,53,52,51,50, \
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49,48,47,46,45,44,43,42,41,40, \
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39,38,37,36,35,34,33,32,31,30, \
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29,28,27,26,25,24,23,22,21,20, \
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19,18,17,16,15,14,13,12,11,10, \
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9,8,7,6,5,4,3,2,1,0
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#endif
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// To be removed
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//------------- Binary constant -------------//
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#if defined(__GNUC__) && !defined(__CC_ARM)
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@ -334,8 +306,8 @@ void tu_print_var(uint8_t const* buf, uint32_t bufsize)
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#define TU_LOG1 tu_printf
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#define TU_LOG1_MEM tu_print_mem
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#define TU_LOG1_VAR(_x) tu_print_var((uint8_t const*)(_x), sizeof(*(_x)))
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#define TU_LOG1_INT(_x) tu_printf(#_x " = %ld\r\n", (uint32_t) (_x) )
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#define TU_LOG1_HEX(_x) tu_printf(#_x " = %lX\r\n", (uint32_t) (_x) )
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#define TU_LOG1_INT(_x) tu_printf(#_x " = %ld\r\n", (unsigned long) (_x) )
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#define TU_LOG1_HEX(_x) tu_printf(#_x " = %lX\r\n", (unsigned long) (_x) )
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// Log Level 2: Warn
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#if CFG_TUSB_DEBUG >= 2
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@ -67,6 +67,46 @@
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#define TU_LITTLE_ENDIAN (0x12u)
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#define TU_BIG_ENDIAN (0x21u)
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/*------------------------------------------------------------------*/
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/* Count number of arguments of __VA_ARGS__
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* - reference https://stackoverflow.com/questions/2124339/c-preprocessor-va-args-number-of-arguments
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* - _GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th)
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* - _RSEQ_N() is reverse sequential to N to add padding to have
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* Nth position is the same as the number of arguments
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* - ##__VA_ARGS__ is used to deal with 0 paramerter (swallows comma)
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*------------------------------------------------------------------*/
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#define TU_ARGS_NUM(...) _TU_NARG(_0, ##__VA_ARGS__,_RSEQ_N())
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#define _TU_NARG(...) _GET_NTH_ARG(__VA_ARGS__)
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#define _GET_NTH_ARG( \
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_1, _2, _3, _4, _5, _6, _7, _8, _9,_10, \
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_11,_12,_13,_14,_15,_16,_17,_18,_19,_20, \
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_21,_22,_23,_24,_25,_26,_27,_28,_29,_30, \
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_31,_32,_33,_34,_35,_36,_37,_38,_39,_40, \
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_41,_42,_43,_44,_45,_46,_47,_48,_49,_50, \
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_51,_52,_53,_54,_55,_56,_57,_58,_59,_60, \
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_61,_62,_63,N,...) N
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#define _RSEQ_N() \
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62,61,60, \
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59,58,57,56,55,54,53,52,51,50, \
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49,48,47,46,45,44,43,42,41,40, \
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39,38,37,36,35,34,33,32,31,30, \
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29,28,27,26,25,24,23,22,21,20, \
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19,18,17,16,15,14,13,12,11,10, \
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9,8,7,6,5,4,3,2,1,0
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// Apply an macro X to each of the arguments with an separated of choice
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#define TU_ARGS_APPLY(_X, _s, ...) TU_XSTRCAT(_TU_ARGS_APPLY_, TU_ARGS_NUM(__VA_ARGS__))(_X, _s, __VA_ARGS__)
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#define _TU_ARGS_APPLY_1(_X, _s, _a1) _X(_a1)
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#define _TU_ARGS_APPLY_2(_X, _s, _a1, _a2) _X(_a1) _s _X(_a2)
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#define _TU_ARGS_APPLY_3(_X, _s, _a1, _a2, _a3) _X(_a1) _s _TU_ARGS_APPLY_2(_X, _s, _a2, _a3)
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#define _TU_ARGS_APPLY_4(_X, _s, _a1, _a2, _a3, _a4) _X(_a1) _s _TU_ARGS_APPLY_3(_X, _s, _a2, _a3, _a4)
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#define _TU_ARGS_APPLY_5(_X, _s, _a1, _a2, _a3, _a4, _a5) _X(_a1) _s _TU_ARGS_APPLY_4(_X, _s, _a2, _a3, _a4, _a5)
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#define _TU_ARGS_APPLY_6(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6) _X(_a1) _s _TU_ARGS_APPLY_5(_X, _s, _a2, _a3, _a4, _a5, _a6)
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#define _TU_ARGS_APPLY_7(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7) _X(_a1) _s _TU_ARGS_APPLY_6(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7)
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#define _TU_ARGS_APPLY_8(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7, _a8) _X(_a1) _s _TU_ARGS_APPLY_7(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7, _a8)
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//--------------------------------------------------------------------+
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// Compiler porting with Attribute and Endian
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//--------------------------------------------------------------------+
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@ -47,8 +47,8 @@
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typedef enum
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{
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TUSB_SPEED_FULL = 0,
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TUSB_SPEED_LOW ,
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TUSB_SPEED_HIGH,
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TUSB_SPEED_LOW = 1,
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TUSB_SPEED_HIGH = 2,
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TUSB_SPEED_INVALID = 0xff,
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}tusb_speed_t;
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@ -36,124 +36,155 @@
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// - PORT_HIGHSPEED: mask to indicate which port support highspeed mode, bit0 for port0 and so on.
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//------------- NXP -------------//
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#if TU_CHECK_MCU(LPC11UXX) || TU_CHECK_MCU(LPC13XX) || TU_CHECK_MCU(LPC15XX)
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#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX)
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#define DCD_ATTR_ENDPOINT_MAX 5
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#elif TU_CHECK_MCU(LPC175X_6X) || TU_CHECK_MCU(LPC177X_8X) || TU_CHECK_MCU(LPC40XX)
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#elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
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#define DCD_ATTR_ENDPOINT_MAX 16
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#elif TU_CHECK_MCU(LPC18XX) || TU_CHECK_MCU(LPC43XX)
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#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
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// TODO USB0 has 6, USB1 has 4
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#define DCD_ATTR_ENDPOINT_MAX 6
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#elif TU_CHECK_MCU(LPC51UXX)
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#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
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#define DCD_ATTR_ENDPOINT_MAX 5
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#elif TU_CHECK_MCU(LPC54XXX)
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#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX)
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// TODO USB0 has 5, USB1 has 6
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#define DCD_ATTR_ENDPOINT_MAX 6
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#elif TU_CHECK_MCU(LPC55XX)
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#elif TU_CHECK_MCU(OPT_MCU_LPC55XX)
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// TODO USB0 has 5, USB1 has 6
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#define DCD_ATTR_ENDPOINT_MAX 6
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#elif TU_CHECK_MCU(MIMXRT10XX)
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#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX)
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#define DCD_ATTR_ENDPOINT_MAX 8
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#elif TU_CHECK_MCU(MKL25ZXX) || TU_CHECK_MCU(K32L2BXX)
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#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX)
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#define DCD_ATTR_ENDPOINT_MAX 16
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#elif TU_CHECK_MCU(MM32F327X)
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#elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
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#define DCD_ATTR_ENDPOINT_MAX 16
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//------------- Nordic -------------//
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#elif TU_CHECK_MCU(NRF5X)
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#elif TU_CHECK_MCU(OPT_MCU_NRF5X)
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// 8 CBI + 1 ISO
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#define DCD_ATTR_ENDPOINT_MAX 9
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//------------- Microchip -------------//
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#elif TU_CHECK_MCU(SAMD21) || TU_CHECK_MCU(SAMD51) || TU_CHECK_MCU(SAME5X) || \
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TU_CHECK_MCU(SAMD11) || TU_CHECK_MCU(SAML21) || TU_CHECK_MCU(SAML22)
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#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \
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TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22)
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#define DCD_ATTR_ENDPOINT_MAX 8
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#elif TU_CHECK_MCU(SAMG)
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#elif TU_CHECK_MCU(OPT_MCU_SAMG)
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#define DCD_ATTR_ENDPOINT_MAX 6
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#define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
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#elif TU_CHECK_MCU(SAMX7X)
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#elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
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#define DCD_ATTR_ENDPOINT_MAX 10
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#define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
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//------------- ST -------------//
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#elif TU_CHECK_MCU(STM32F0) || TU_CHECK_MCU(STM32F1) || TU_CHECK_MCU(STM32F3) || \
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TU_CHECK_MCU(STM32L0) || TU_CHECK_MCU(STM32L1) || TU_CHECK_MCU(STM32L4)
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// F1: F102, F103
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// L4: L4x2, L4x3
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#elif TU_CHECK_MCU(OPT_MCU_STM32F0)
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#define DCD_ATTR_ENDPOINT_MAX 8
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#elif TU_CHECK_MCU(STM32F2) || TU_CHECK_MCU(STM32F4) || TU_CHECK_MCU(STM32F3)
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// F1: F105, F107 only has 4
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// L4: L4x5, L4x6 has 6
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// For most mcu, FS has 4, HS has 6
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#define DCD_ATTR_ENDPOINT_MAX 6
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#elif TU_CHECK_MCU(OPT_MCU_STM32F1)
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#if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \
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defined (STM32F107xB) || defined (STM32F107xC)
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#define DCD_ATTR_ENDPOINT_MAX 4
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#define DCD_ATTR_DWC2_STM32
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#else
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#define DCD_ATTR_ENDPOINT_MAX 8
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#endif
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#elif TU_CHECK_MCU(STM32F7)
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#elif TU_CHECK_MCU(OPT_MCU_STM32F2)
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// FS has 4 ep, HS has 5 ep
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#define DCD_ATTR_ENDPOINT_MAX 6
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#define DCD_ATTR_DWC2_STM32
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#elif TU_CHECK_MCU(OPT_MCU_STM32F3)
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#define DCD_ATTR_ENDPOINT_MAX 8
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#elif TU_CHECK_MCU(OPT_MCU_STM32F4)
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// For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9
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#define DCD_ATTR_ENDPOINT_MAX 6
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#define DCD_ATTR_DWC2_STM32
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#elif TU_CHECK_MCU(OPT_MCU_STM32F7)
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// FS has 6, HS has 9
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#define DCD_ATTR_ENDPOINT_MAX 9
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#define DCD_ATTR_DWC2_STM32
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#elif TU_CHECK_MCU(STM32H7)
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#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
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#define DCD_ATTR_ENDPOINT_MAX 9
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#define DCD_ATTR_DWC2_STM32
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#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1)
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#define DCD_ATTR_ENDPOINT_MAX 8
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#elif TU_CHECK_MCU(OPT_MCU_STM32L4)
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#if defined (STM32L475xx) || defined (STM32L476xx) || \
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defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \
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defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
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defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \
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defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
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#define DCD_ATTR_ENDPOINT_MAX 6
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#define DCD_ATTR_DWC2_STM32
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#else
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#define DCD_ATTR_ENDPOINT_MAX 8
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#endif
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//------------- Sony -------------//
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#elif TU_CHECK_MCU(CXD56)
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#elif TU_CHECK_MCU(OPT_MCU_CXD56)
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#define DCD_ATTR_ENDPOINT_MAX 7
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#define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER
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|
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//------------- TI -------------//
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#elif TU_CHECK_MCU(MSP430x5xx)
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#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx)
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#define DCD_ATTR_ENDPOINT_MAX 8
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//------------- ValentyUSB -------------//
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#elif TU_CHECK_MCU(VALENTYUSB_EPTRI)
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#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI)
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#define DCD_ATTR_ENDPOINT_MAX 16
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//------------- Nuvoton -------------//
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||||
#elif TU_CHECK_MCU(NUC121) || TU_CHECK_MCU(NUC126)
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#elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126)
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#define DCD_ATTR_ENDPOINT_MAX 8
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#elif TU_CHECK_MCU(NUC120)
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#elif TU_CHECK_MCU(OPT_MCU_NUC120)
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#define DCD_ATTR_ENDPOINT_MAX 6
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#elif TU_CHECK_MCU(NUC505)
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#elif TU_CHECK_MCU(OPT_MCU_NUC505)
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#define DCD_ATTR_ENDPOINT_MAX 12
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||||
|
||||
//------------- Espressif -------------//
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||||
#elif TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
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||||
#define DCD_ATTR_ENDPOINT_MAX 6
|
||||
|
||||
//------------- Dialog -------------//
|
||||
#elif TU_CHECK_MCU(DA1469X)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_DA1469X)
|
||||
#define DCD_ATTR_ENDPOINT_MAX 4
|
||||
|
||||
//------------- Raspberry Pi -------------//
|
||||
#elif TU_CHECK_MCU(RP2040)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_RP2040)
|
||||
#define DCD_ATTR_ENDPOINT_MAX 16
|
||||
|
||||
//------------- Silabs -------------//
|
||||
#elif TU_CHECK_MCU(EFM32GG) || TU_CHECK_MCU(EFM32GG11) || TU_CHECK_MCU(EFM32GG12)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
|
||||
#define DCD_ATTR_ENDPOINT_MAX 7
|
||||
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||||
//------------- Renesas -------------//
|
||||
#elif TU_CHECK_MCU(RX63X) || TU_CHECK_MCU(RX65X) || TU_CHECK_MCU(RX72N)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
|
||||
#define DCD_ATTR_ENDPOINT_MAX 10
|
||||
|
||||
//#elif TU_CHECK_MCU(MM32F327X)
|
||||
// #define DCD_ATTR_ENDPOINT_MAX not known yet
|
||||
|
||||
//------------- GigaDevice -------------//
|
||||
#elif TU_CHECK_MCU(GD32VF103)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
|
||||
#define DCD_ATTR_ENDPOINT_MAX 4
|
||||
|
||||
//------------- Broadcom -------------//
|
||||
#elif TU_CHECK_MCU(OPT_MCU_BCM2711)
|
||||
#define DCD_ATTR_ENDPOINT_MAX 8
|
||||
|
||||
#else
|
||||
#warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8"
|
||||
#define DCD_ATTR_ENDPOINT_MAX 8
|
||||
|
||||
@ -34,64 +34,64 @@
|
||||
// - PORT_HIGHSPEED: mask to indicate which port support highspeed mode, bit0 for port0 and so on.
|
||||
|
||||
//------------- NXP -------------//
|
||||
#if TU_CHECK_MCU(LPC175X_6X) || TU_CHECK_MCU(LPC177X_8X) || TU_CHECK_MCU(LPC40XX)
|
||||
#if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
|
||||
#define HCD_ATTR_OHCI
|
||||
|
||||
#elif TU_CHECK_MCU(LPC18XX) || TU_CHECK_MCU(LPC43XX)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
|
||||
#define HCD_ATTR_EHCI_TRANSDIMENSION
|
||||
|
||||
#elif TU_CHECK_MCU(LPC54XXX)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX)
|
||||
// #define HCD_ATTR_EHCI_NXP_PTD
|
||||
|
||||
#elif TU_CHECK_MCU(LPC55XX)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_LPC55XX)
|
||||
// #define HCD_ATTR_EHCI_NXP_PTD
|
||||
|
||||
#elif TU_CHECK_MCU(MIMXRT10XX)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX)
|
||||
#define HCD_ATTR_EHCI_TRANSDIMENSION
|
||||
|
||||
#elif TU_CHECK_MCU(MKL25ZXX)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX)
|
||||
|
||||
//------------- Microchip -------------//
|
||||
#elif TU_CHECK_MCU(SAMD21) || TU_CHECK_MCU(SAMD51) || TU_CHECK_MCU(SAME5X) || \
|
||||
TU_CHECK_MCU(SAMD11) || TU_CHECK_MCU(SAML21) || TU_CHECK_MCU(SAML22)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \
|
||||
TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22)
|
||||
|
||||
#elif TU_CHECK_MCU(SAMG)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_SAMG)
|
||||
|
||||
#elif TU_CHECK_MCU(SAMX7X)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
|
||||
|
||||
//------------- ST -------------//
|
||||
#elif TU_CHECK_MCU(STM32F0) || TU_CHECK_MCU(STM32F1) || TU_CHECK_MCU(STM32F3) || \
|
||||
TU_CHECK_MCU(STM32L0) || TU_CHECK_MCU(STM32L1) || TU_CHECK_MCU(STM32L4)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F1, OPT_MCU_STM32F3) || \
|
||||
TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1, OPT_MCU_STM32L4)
|
||||
|
||||
#elif TU_CHECK_MCU(STM32F2) || TU_CHECK_MCU(STM32F4) || TU_CHECK_MCU(STM32F3)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_STM32F2, OPT_MCU_STM32F3, OPT_MCU_STM32F4)
|
||||
|
||||
#elif TU_CHECK_MCU(STM32F7)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_STM32F7)
|
||||
|
||||
#elif TU_CHECK_MCU(STM32H7)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
|
||||
|
||||
//------------- Sony -------------//
|
||||
#elif TU_CHECK_MCU(CXD56)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_CXD56)
|
||||
|
||||
//------------- Nuvoton -------------//
|
||||
#elif TU_CHECK_MCU(NUC505)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_NUC505)
|
||||
|
||||
//------------- Espressif -------------//
|
||||
#elif TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
|
||||
|
||||
//------------- Raspberry Pi -------------//
|
||||
#elif TU_CHECK_MCU(RP2040)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_RP2040)
|
||||
|
||||
//------------- Silabs -------------//
|
||||
#elif TU_CHECK_MCU(EFM32GG) || TU_CHECK_MCU(EFM32GG11) || TU_CHECK_MCU(EFM32GG12)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
|
||||
|
||||
//------------- Renesas -------------//
|
||||
#elif TU_CHECK_MCU(RX63X) || TU_CHECK_MCU(RX65X) || TU_CHECK_MCU(RX72N)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
|
||||
|
||||
//#elif TU_CHECK_MCU(MM32F327X)
|
||||
//#elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
|
||||
// #define DCD_ATTR_ENDPOINT_MAX not known yet
|
||||
|
||||
//------------- GigaDevice -------------//
|
||||
#elif TU_CHECK_MCU(GD32VF103)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
|
||||
|
||||
#else
|
||||
// #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8"
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,89 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2021, Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#ifndef _TUSB_DWC2_BCM_H_
|
||||
#define _TUSB_DWC2_BCM_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "broadcom/interrupts.h"
|
||||
#include "broadcom/caches.h"
|
||||
|
||||
#define DWC2_REG_BASE 0xFE980000UL
|
||||
#define DWC2_EP_MAX 8
|
||||
#define DWC2_EP_FIFO_SIZE 4096
|
||||
|
||||
#define dcache_clean(_addr, _size) data_clean(_addr, _size)
|
||||
#define dcache_invalidate(_addr, _size) data_invalidate(_addr, _size)
|
||||
#define dcache_clean_invalidate(_addr, _size) data_clean_and_invalidate(_addr, _size)
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE
|
||||
static inline void dwc2_dcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
BP_EnableIRQ(USB_IRQn);
|
||||
__asm__ volatile("isb"); // needed if TIMER1 IRQ is not enabled !?
|
||||
}
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE
|
||||
static inline void dwc2_dcd_int_disable (uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
BP_DisableIRQ(USB_IRQn);
|
||||
__asm__ volatile("isb"); // needed if TIMER1 IRQ is not enabled !?
|
||||
}
|
||||
|
||||
static inline void dwc2_remote_wakeup_delay(void)
|
||||
{
|
||||
// try to delay for 1 ms
|
||||
// TODO implement later
|
||||
}
|
||||
|
||||
// MCU specific PHY init, called BEFORE core reset
|
||||
static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
|
||||
{
|
||||
(void) dwc2;
|
||||
(void) hs_phy_type;
|
||||
|
||||
// nothing to do
|
||||
}
|
||||
|
||||
// MCU specific PHY update, it is called AFTER init() and core reset
|
||||
static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
|
||||
{
|
||||
(void) dwc2;
|
||||
(void) hs_phy_type;
|
||||
|
||||
// nothing to do
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@ -0,0 +1,87 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2021 Rafael Silva (@perigoso)
|
||||
* Copyright (c) 2021, Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#ifndef _DWC2_EFM32_H_
|
||||
#define _DWC2_EFM32_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "em_device.h"
|
||||
|
||||
// EFM32 has custom control register before DWC registers
|
||||
#define DWC2_REG_BASE (USB_BASE + offsetof(USB_TypeDef, GOTGCTL))
|
||||
#define DWC2_EP_MAX 7
|
||||
#define DWC2_EP_FIFO_SIZE 2048
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE
|
||||
static inline void dwc2_dcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
NVIC_EnableIRQ(USB_IRQn);
|
||||
}
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE
|
||||
static inline void dwc2_dcd_int_disable (uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
NVIC_DisableIRQ(USB_IRQn);
|
||||
}
|
||||
|
||||
static inline void dwc2_remote_wakeup_delay(void)
|
||||
{
|
||||
// try to delay for 1 ms
|
||||
// uint32_t count = SystemCoreClock / 1000;
|
||||
// while ( count-- ) __NOP();
|
||||
}
|
||||
|
||||
// MCU specific PHY init, called BEFORE core reset
|
||||
static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
|
||||
{
|
||||
(void) dwc2;
|
||||
(void) hs_phy_type;
|
||||
|
||||
// Enable PHY
|
||||
USB->ROUTE = USB_ROUTE_PHYPEN;
|
||||
}
|
||||
|
||||
// MCU specific PHY update, it is called AFTER init() and core reset
|
||||
static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
|
||||
{
|
||||
(void) dwc2;
|
||||
(void) hs_phy_type;
|
||||
|
||||
// EFM32 Manual: turn around must be 5 (reset & default value)
|
||||
// dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_TRDT_Msk) | (5u << GUSBCFG_TRDT_Pos);
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@ -0,0 +1,94 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2021, Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _DWC2_ESP32_H_
|
||||
#define _DWC2_ESP32_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "esp_intr_alloc.h"
|
||||
#include "soc/periph_defs.h"
|
||||
//#include "soc/usb_periph.h"
|
||||
|
||||
#define DWC2_REG_BASE 0x60080000UL
|
||||
#define DWC2_EP_MAX 5 // USB_OUT_EP_NUM
|
||||
#define DWC2_EP_FIFO_SIZE 1024
|
||||
|
||||
// #define EP_FIFO_NUM 5
|
||||
|
||||
static intr_handle_t usb_ih;
|
||||
|
||||
static void dcd_int_handler_wrap(void* arg)
|
||||
{
|
||||
(void) arg;
|
||||
dcd_int_handler(0);
|
||||
}
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE
|
||||
static inline void dwc2_dcd_int_enable (uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
esp_intr_alloc(ETS_USB_INTR_SOURCE, ESP_INTR_FLAG_LOWMED, dcd_int_handler_wrap, NULL, &usb_ih);
|
||||
}
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE
|
||||
static inline void dwc2_dcd_int_disable (uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
esp_intr_free(usb_ih);
|
||||
}
|
||||
|
||||
static inline void dwc2_remote_wakeup_delay(void)
|
||||
{
|
||||
vTaskDelay(pdMS_TO_TICKS(1));
|
||||
}
|
||||
|
||||
// MCU specific PHY init, called BEFORE core reset
|
||||
static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
|
||||
{
|
||||
(void) dwc2;
|
||||
(void) hs_phy_type;
|
||||
|
||||
// nothing to do
|
||||
}
|
||||
|
||||
// MCU specific PHY update, it is called AFTER init() and core reset
|
||||
static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
|
||||
{
|
||||
(void) dwc2;
|
||||
(void) hs_phy_type;
|
||||
|
||||
// nothing to do
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _DWC2_ESP32_H_ */
|
||||
@ -0,0 +1,100 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2021, Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef DWC2_GD32_H_
|
||||
#define DWC2_GD32_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define DWC2_REG_BASE 0x50000000UL
|
||||
#define DWC2_EP_MAX 4
|
||||
#define DWC2_EP_FIFO_SIZE 1280
|
||||
#define RHPORT_IRQn 86
|
||||
|
||||
extern uint32_t SystemCoreClock;
|
||||
|
||||
// The GD32VF103 is a RISC-V MCU, which implements the ECLIC Core-Local
|
||||
// Interrupt Controller by Nuclei. It is nearly API compatible to the
|
||||
// NVIC used by ARM MCUs.
|
||||
#define ECLIC_INTERRUPT_ENABLE_BASE 0xD2001001UL
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE
|
||||
static inline void __eclic_enable_interrupt (uint32_t irq) {
|
||||
*(volatile uint8_t*)(ECLIC_INTERRUPT_ENABLE_BASE + (irq * 4)) = 1;
|
||||
}
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE
|
||||
static inline void __eclic_disable_interrupt (uint32_t irq){
|
||||
*(volatile uint8_t*)(ECLIC_INTERRUPT_ENABLE_BASE + (irq * 4)) = 0;
|
||||
}
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE
|
||||
static inline void dwc2_dcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
__eclic_enable_interrupt(RHPORT_IRQn);
|
||||
}
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE
|
||||
static inline void dwc2_dcd_int_disable (uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
__eclic_disable_interrupt(RHPORT_IRQn);
|
||||
}
|
||||
|
||||
static inline void dwc2_remote_wakeup_delay(void)
|
||||
{
|
||||
// try to delay for 1 ms
|
||||
uint32_t count = SystemCoreClock / 1000;
|
||||
while ( count-- ) __asm volatile ("nop");
|
||||
}
|
||||
|
||||
// MCU specific PHY init, called BEFORE core reset
|
||||
static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
|
||||
{
|
||||
(void) dwc2;
|
||||
(void) hs_phy_type;
|
||||
|
||||
// nothing to do
|
||||
}
|
||||
|
||||
// MCU specific PHY update, it is called AFTER init() and core reset
|
||||
static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
|
||||
{
|
||||
(void) dwc2;
|
||||
(void) hs_phy_type;
|
||||
|
||||
// nothing to do
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* DWC2_GD32_H_ */
|
||||
@ -0,0 +1,205 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2021, Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#ifndef _DWC2_STM32_H_
|
||||
#define _DWC2_STM32_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
// EP_MAX : Max number of bi-directional endpoints including EP0
|
||||
// EP_FIFO_SIZE : Size of dedicated USB SRAM
|
||||
#if CFG_TUSB_MCU == OPT_MCU_STM32F1
|
||||
#include "stm32f1xx.h"
|
||||
#define EP_MAX_FS 4
|
||||
#define EP_FIFO_SIZE_FS 1280
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32F2
|
||||
#include "stm32f2xx.h"
|
||||
#define EP_MAX_FS USB_OTG_FS_MAX_IN_ENDPOINTS
|
||||
#define EP_FIFO_SIZE_FS USB_OTG_FS_TOTAL_FIFO_SIZE
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32F4
|
||||
#include "stm32f4xx.h"
|
||||
#define EP_MAX_FS USB_OTG_FS_MAX_IN_ENDPOINTS
|
||||
#define EP_FIFO_SIZE_FS USB_OTG_FS_TOTAL_FIFO_SIZE
|
||||
#define EP_MAX_HS USB_OTG_HS_MAX_IN_ENDPOINTS
|
||||
#define EP_FIFO_SIZE_HS USB_OTG_HS_TOTAL_FIFO_SIZE
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32H7
|
||||
#include "stm32h7xx.h"
|
||||
#define EP_MAX_FS 9
|
||||
#define EP_FIFO_SIZE_FS 4096
|
||||
#define EP_MAX_HS 9
|
||||
#define EP_FIFO_SIZE_HS 4096
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32F7
|
||||
#include "stm32f7xx.h"
|
||||
#define EP_MAX_FS 6
|
||||
#define EP_FIFO_SIZE_FS 1280
|
||||
#define EP_MAX_HS 9
|
||||
#define EP_FIFO_SIZE_HS 4096
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32L4
|
||||
#include "stm32l4xx.h"
|
||||
#define EP_MAX_FS 6
|
||||
#define EP_FIFO_SIZE_FS 1280
|
||||
|
||||
#else
|
||||
#error "Unsupported MCUs"
|
||||
#endif
|
||||
|
||||
// On STM32 we associate Port0 to OTG_FS, and Port1 to OTG_HS
|
||||
#if TUD_OPT_RHPORT == 0
|
||||
#define DWC2_REG_BASE USB_OTG_FS_PERIPH_BASE
|
||||
#define DWC2_EP_MAX EP_MAX_FS
|
||||
#define DWC2_EP_FIFO_SIZE EP_FIFO_SIZE_FS
|
||||
#define RHPORT_IRQn OTG_FS_IRQn
|
||||
|
||||
#else
|
||||
#define DWC2_REG_BASE USB_OTG_HS_PERIPH_BASE
|
||||
#define DWC2_EP_MAX EP_MAX_HS
|
||||
#define DWC2_EP_FIFO_SIZE EP_FIFO_SIZE_HS
|
||||
#define RHPORT_IRQn OTG_HS_IRQn
|
||||
|
||||
#endif
|
||||
|
||||
extern uint32_t SystemCoreClock;
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE
|
||||
static inline void dwc2_dcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
NVIC_EnableIRQ(RHPORT_IRQn);
|
||||
}
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE
|
||||
static inline void dwc2_dcd_int_disable (uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
NVIC_DisableIRQ(RHPORT_IRQn);
|
||||
}
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE
|
||||
static inline void dwc2_remote_wakeup_delay(void)
|
||||
{
|
||||
// try to delay for 1 ms
|
||||
uint32_t count = SystemCoreClock / 1000;
|
||||
while ( count-- ) __NOP();
|
||||
}
|
||||
|
||||
// MCU specific PHY init, called BEFORE core reset
|
||||
static inline void dwc2_phy_init(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
|
||||
{
|
||||
if ( hs_phy_type == HS_PHY_TYPE_NONE )
|
||||
{
|
||||
// Enable on-chip FS PHY
|
||||
dwc2->stm32_gccfg |= STM32_GCCFG_PWRDWN;
|
||||
}else
|
||||
{
|
||||
// Disable FS PHY
|
||||
dwc2->stm32_gccfg &= ~STM32_GCCFG_PWRDWN;
|
||||
|
||||
// Enable on-chip HS PHY
|
||||
if (hs_phy_type == HS_PHY_TYPE_UTMI || hs_phy_type == HS_PHY_TYPE_UTMI_ULPI)
|
||||
{
|
||||
#ifdef USB_HS_PHYC
|
||||
// Enable UTMI HS PHY
|
||||
dwc2->stm32_gccfg |= STM32_GCCFG_PHYHSEN;
|
||||
|
||||
// Enable LDO
|
||||
USB_HS_PHYC->USB_HS_PHYC_LDO |= USB_HS_PHYC_LDO_ENABLE;
|
||||
|
||||
// Wait until LDO ready
|
||||
while ( 0 == (USB_HS_PHYC->USB_HS_PHYC_LDO & USB_HS_PHYC_LDO_STATUS) ) {}
|
||||
|
||||
uint32_t phyc_pll = 0;
|
||||
|
||||
// TODO Try to get HSE_VALUE from registers instead of depending CFLAGS
|
||||
switch ( HSE_VALUE )
|
||||
{
|
||||
case 12000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_12MHZ ; break;
|
||||
case 12500000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_12_5MHZ ; break;
|
||||
case 16000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_16MHZ ; break;
|
||||
case 24000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_24MHZ ; break;
|
||||
case 25000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_25MHZ ; break;
|
||||
case 32000000: phyc_pll = USB_HS_PHYC_PLL1_PLLSEL_Msk ; break; // Value not defined in header
|
||||
default:
|
||||
TU_ASSERT(false, );
|
||||
}
|
||||
USB_HS_PHYC->USB_HS_PHYC_PLL = phyc_pll;
|
||||
|
||||
// Control the tuning interface of the High Speed PHY
|
||||
// Use magic value (USB_HS_PHYC_TUNE_VALUE) from ST driver for F7
|
||||
USB_HS_PHYC->USB_HS_PHYC_TUNE |= 0x00000F13U;
|
||||
|
||||
// Enable PLL internal PHY
|
||||
USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL_PLLEN;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// MCU specific PHY update, it is called AFTER init() and core reset
|
||||
static inline void dwc2_phy_update(dwc2_regs_t * dwc2, uint8_t hs_phy_type)
|
||||
{
|
||||
// used to set turnaround time for fullspeed, nothing to do in highspeed mode
|
||||
if ( hs_phy_type == HS_PHY_TYPE_NONE )
|
||||
{
|
||||
// Turnaround timeout depends on the AHB clock dictated by STM32 Reference Manual
|
||||
uint32_t turnaround;
|
||||
|
||||
if ( SystemCoreClock >= 32000000u )
|
||||
turnaround = 0x6u;
|
||||
else if ( SystemCoreClock >= 27500000u )
|
||||
turnaround = 0x7u;
|
||||
else if ( SystemCoreClock >= 24000000u )
|
||||
turnaround = 0x8u;
|
||||
else if ( SystemCoreClock >= 21800000u )
|
||||
turnaround = 0x9u;
|
||||
else if ( SystemCoreClock >= 20000000u )
|
||||
turnaround = 0xAu;
|
||||
else if ( SystemCoreClock >= 18500000u )
|
||||
turnaround = 0xBu;
|
||||
else if ( SystemCoreClock >= 17200000u )
|
||||
turnaround = 0xCu;
|
||||
else if ( SystemCoreClock >= 16000000u )
|
||||
turnaround = 0xDu;
|
||||
else if ( SystemCoreClock >= 15000000u )
|
||||
turnaround = 0xEu;
|
||||
else
|
||||
turnaround = 0xFu;
|
||||
|
||||
dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_TRDT_Msk) | (turnaround << GUSBCFG_TRDT_Pos);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _DWC2_STM32_H_ */
|
||||
File diff suppressed because it is too large
Load Diff
@ -27,6 +27,8 @@
|
||||
#ifndef _TUSB_OPTION_H_
|
||||
#define _TUSB_OPTION_H_
|
||||
|
||||
#include "common/tusb_compiler.h"
|
||||
|
||||
#define TUSB_VERSION_MAJOR 0
|
||||
#define TUSB_VERSION_MINOR 12
|
||||
#define TUSB_VERSION_REVISION 0
|
||||
@ -36,7 +38,6 @@
|
||||
// Supported MCUs
|
||||
// CFG_TUSB_MCU must be defined to one of following value
|
||||
//--------------------------------------------------------------------+
|
||||
#define TU_CHECK_MCU(_m) (CFG_TUSB_MCU == OPT_MCU_##_m)
|
||||
|
||||
#define OPT_MCU_NONE 0
|
||||
|
||||
@ -112,8 +113,6 @@
|
||||
|
||||
// Silabs
|
||||
#define OPT_MCU_EFM32GG 1300 ///< Silabs EFM32GG
|
||||
#define OPT_MCU_EFM32GG11 1301 ///< Silabs EFM32GG11
|
||||
#define OPT_MCU_EFM32GG12 1302 ///< Silabs EFM32GG12
|
||||
|
||||
// Renesas RX
|
||||
#define OPT_MCU_RX63X 1400 ///< Renesas RX63N/631
|
||||
@ -126,6 +125,14 @@
|
||||
// GigaDevice
|
||||
#define OPT_MCU_GD32VF103 1600 ///< GigaDevice GD32VF103
|
||||
|
||||
// Broadcom
|
||||
#define OPT_MCU_BCM2711 1700 ///< Broadcom BCM2711
|
||||
|
||||
// Helper to check if configured MCU is one of listed
|
||||
// Apply _TU_CHECK_MCU with || as separator to list of input
|
||||
#define _TU_CHECK_MCU(_m) (CFG_TUSB_MCU == _m)
|
||||
#define TU_CHECK_MCU(...) (TU_ARGS_APPLY(_TU_CHECK_MCU, ||, __VA_ARGS__))
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Supported OS
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
Reference in New Issue
Block a user