mirror of
https://github.com/0xFEEDC0DE64/arduino-esp32.git
synced 2025-07-01 13:00:59 +02:00
IDF master 4e03a9c34c (#5792)
esp-dsp: master e05fc36 esp-face: master f108a83 esp-rainmaker: f1b82c7 esp32-camera: master 3022601 esp_littlefs: master 05d55ab
This commit is contained in:
@ -1,16 +1,8 @@
|
||||
// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
@ -62,6 +54,7 @@ extern "C" {
|
||||
#define RTC_BOOT_TIME_LOW_REG RTC_CNTL_STORE2_REG
|
||||
#define RTC_BOOT_TIME_HIGH_REG RTC_CNTL_STORE3_REG
|
||||
#define RTC_XTAL_FREQ_REG RTC_CNTL_STORE4_REG
|
||||
#define RTC_ENTRY_LENGTH_REG RTC_CNTL_STORE5_REG
|
||||
#define RTC_ENTRY_ADDR_REG RTC_CNTL_STORE6_REG
|
||||
#define RTC_RESET_CAUSE_REG RTC_CNTL_STORE6_REG
|
||||
#define RTC_MEMORY_CRC_REG RTC_CNTL_STORE7_REG
|
||||
@ -173,16 +166,31 @@ RESET_REASON rtc_get_reset_reason(int cpu_no);
|
||||
*/
|
||||
WAKEUP_REASON rtc_get_wakeup_cause(void);
|
||||
|
||||
typedef void (* esp_rom_wake_func_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Get CRC for Fast RTC Memory.
|
||||
* @brief Read stored RTC wake function address
|
||||
*
|
||||
* @param uint32_t start_addr : 0 - 0x7ff for Fast RTC Memory.
|
||||
* Returns pointer to wake address if a value is set in RTC registers, and stored length & CRC all valid.
|
||||
*
|
||||
* @param uint32_t crc_len : 0 - 0x7ff, 0 for 4 byte, 0x7ff for 0x2000 byte.
|
||||
* @param None
|
||||
*
|
||||
* @return uint32_t : CRC32 result
|
||||
* @return esp_rom_wake_func_t : Returns pointer to wake address if a value is set in RTC registers
|
||||
*/
|
||||
uint32_t calc_rtc_memory_crc(uint32_t start_addr, uint32_t crc_len);
|
||||
esp_rom_wake_func_t esp_rom_get_rtc_wake_addr(void);
|
||||
|
||||
/**
|
||||
* @brief Store new RTC wake function address
|
||||
*
|
||||
* Set a new RTC wake address function. If a non-NULL function pointer is set then the function
|
||||
* memory is calculated and stored also.
|
||||
*
|
||||
* @param entry_addr Address of function. If NULL, length is ignored and all registers are cleared to 0.
|
||||
* @param length of function in RTC fast memory. cannot be larger than RTC Fast memory size.
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void esp_rom_set_rtc_wake_addr(esp_rom_wake_func_t entry_addr, size_t length);
|
||||
|
||||
/**
|
||||
* @brief Suppress ROM log by setting specific RTC control register.
|
||||
@ -202,26 +210,6 @@ static inline void rtc_suppress_rom_log(void)
|
||||
REG_SET_BIT(RTC_CNTL_STORE4_REG, RTC_DISABLE_ROM_LOG);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Set CRC of Fast RTC memory 0-0x7ff into RTC STORE7.
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void set_rtc_memory_crc(void);
|
||||
|
||||
/**
|
||||
* @brief Fetch entry from RTC memory and RTC STORE reg
|
||||
*
|
||||
* @param uint32_t * entry_addr : the address to save entry
|
||||
*
|
||||
* @param RESET_REASON reset_reason : reset reason this time
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void rtc_boot_control(uint32_t *entry_addr, RESET_REASON reset_reason);
|
||||
|
||||
/**
|
||||
* @brief Software Reset digital core.
|
||||
*
|
||||
|
Reference in New Issue
Block a user