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IDF master 4e03a9c34c (#5792)
esp-dsp: master e05fc36 esp-face: master f108a83 esp-rainmaker: f1b82c7 esp32-camera: master 3022601 esp_littlefs: master 05d55ab
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@ -45,17 +45,26 @@ extern "C" {
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esp_err_t spi_flash_init_chip_state(void);
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/**
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* @brief Make MSPI work under 20Mhz
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* @brief Make MSPI work under 20Mhz, remove the timing tuning required delays.
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* @param control_spi1 Select whether to control SPI1. For tuning, we need to use SPI1. After tuning (during startup stage), let the flash driver to control SPI1
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*/
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void spi_timing_enter_mspi_low_speed_mode(bool control_spi1);
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/**
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* @brief Make MSPI work under the frequency as users set
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* @brief Make MSPI work under the frequency as users set, may add certain delays to MSPI RX direction to meet timing requirements.
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* @param control_spi1 Select whether to control SPI1. For tuning, we need to use SPI1. After tuning (during startup stage), let the flash driver to control SPI1
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*/
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void spi_timing_enter_mspi_high_speed_mode(bool control_spi1);
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/**
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* @brief Switch MSPI into low speed mode / high speed mode.
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* @note This API is cache safe, it will freeze both D$ and I$ and restore them after MSPI is switched
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* @note For some of the MSPI high frequency settings (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required.
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* Certain delays will be added to the MSPI RX direction. When CPU clock switches from PLL to XTAL, should call
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* this API first to enter MSPI low speed mode to remove the delays, and vice versa.
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*/
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void spi_timing_change_speed_mode_cache_safe(bool switch_down);
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/**
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* @brief Tune MSPI flash timing to make it work under high frequency
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*/
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@ -90,9 +99,9 @@ esp_err_t esp_flash_init_main(esp_flash_t *chip);
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void spi_timing_get_flash_timing_param(spi_flash_hal_timing_config_t *out_timing_config);
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/**
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* @brief Judge if the flash in tuned
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* @brief Get the knowledge if the MSPI timing is tuned or not
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*/
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bool spi_timine_config_flash_is_tuned(void);
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bool spi_timing_is_tuned(void);
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/**
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* @brief Set Flash chip specifically required MSPI register settings here
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