mirror of
https://github.com/0xFEEDC0DE64/arduino-esp32.git
synced 2025-07-01 21:10:58 +02:00
Update IDF to 1e0710f
This commit is contained in:
me-no-dev
@ -28,13 +28,31 @@ typedef enum {
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DAC_CHANNEL_MAX,
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} dac_channel_t;
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/**
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* @brief Set DAC output voltage.
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*
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* @note Function has been deprecated, please use dac_output_voltage instead.
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* This name will be removed in a future release.
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* The difference is that before calling dac_output_voltage, we need to initialize the dac pad by dac_output_enable
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*
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*
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* @param channel DAC channel
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* @param dac_value DAC output value
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*
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* @return
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* - ESP_OK success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t dac_out_voltage(dac_channel_t channel, uint8_t dac_value) __attribute__ ((deprecated));
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/**
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* @brief Set DAC output voltage.
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*
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* DAC output is 8-bit. Maximum (255) corresponds to VDD.
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*
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* @note When this function is called, function for the DAC
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* channel's GPIO pin is reconfigured for RTC DAC function.
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* @note Need to configure DAC pad before calling this function.
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* DAC channel 1 is attached to GPIO25, DAC channel 2 is attached to GPIO26
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*
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* @param channel DAC channel
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* @param dac_value DAC output value
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@ -43,8 +61,35 @@ typedef enum {
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* - ESP_OK success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t dac_out_voltage(dac_channel_t channel, uint8_t dac_value);
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esp_err_t dac_output_voltage(dac_channel_t channel, uint8_t dac_value);
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/**
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* @brief DAC pad output enable
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*
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* @param channel DAC channel
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* @note DAC channel 1 is attached to GPIO25, DAC channel 2 is attached to GPIO26
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* I2S left channel will be mapped to DAC channel 2
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* I2S right channel will be mapped to DAC channel 1
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*/
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esp_err_t dac_output_enable(dac_channel_t channel);
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/**
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* @brief DAC pad output disable
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*
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* @param channel DAC channel
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* @note DAC channel 1 is attached to GPIO25, DAC channel 2 is attached to GPIO26
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*/
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esp_err_t dac_output_disable(dac_channel_t channel);
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/**
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* @brief Enable DAC output data from I2S
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*/
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esp_err_t dac_i2s_enable();
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/**
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* @brief Disable DAC output data from I2S
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*/
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esp_err_t dac_i2s_disable();
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#ifdef __cplusplus
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}
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#endif
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@ -109,13 +109,17 @@ typedef enum {
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/**
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* @brief I2S Mode, defaut is I2S_MODE_MASTER | I2S_MODE_TX
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*
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* @note PDM and built-in DAC functions are only supported on I2S0 for current ESP32 chip.
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*
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*/
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typedef enum {
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I2S_MODE_MASTER = 1,
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I2S_MODE_SLAVE = 2,
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I2S_MODE_TX = 4,
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I2S_MODE_RX = 8,
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I2S_MODE_DAC_BUILT_IN = 16
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I2S_MODE_DAC_BUILT_IN = 16, /*!< Output I2S data to built-in DAC, no matter the data format is 16bit or 32 bit, the DAC module will only take the 8bits from MSB*/
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//I2S_MODE_ADC_BUILT_IN = 32, /*!< Currently not supported yet, will be added for the next version*/
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I2S_MODE_PDM = 64,
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} i2s_mode_t;
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/**
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@ -144,6 +148,19 @@ typedef enum {
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I2S_EVENT_MAX, /*!< I2S event max index*/
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} i2s_event_type_t;
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/**
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* @brief I2S DAC mode for i2s_set_dac_mode.
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*
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* @note PDM and built-in DAC functions are only supported on I2S0 for current ESP32 chip.
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*/
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typedef enum {
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I2S_DAC_CHANNEL_DISABLE = 0, /*!< Disable I2S built-in DAC signals*/
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I2S_DAC_CHANNEL_RIGHT_EN = 1, /*!< Enable I2S built-in DAC right channel, maps to DAC channel 1 on GPIO25*/
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I2S_DAC_CHANNEL_LEFT_EN = 2, /*!< Enable I2S built-in DAC left channel, maps to DAC channel 2 on GPIO26*/
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I2S_DAC_CHANNEL_BOTH_EN = 0x3, /*!< Enable both of the I2S built-in DAC channels.*/
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I2S_DAC_CHANNEL_MAX = 0x4, /*!< I2S built-in DAC mode max index*/
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} i2s_dac_mode_t;
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/**
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* @brief Event structure used in I2S event queue
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*
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@ -166,6 +183,7 @@ typedef struct {
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int data_in_num; /*!< DATA in pin*/
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} i2s_pin_config_t;
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typedef intr_handle_t i2s_isr_handle_t;
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/**
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* @brief Set I2S pin number
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@ -181,12 +199,30 @@ typedef intr_handle_t i2s_isr_handle_t;
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* Inside the pin configuration structure, set I2S_PIN_NO_CHANGE for any pin where
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* the current configuration should not be changed.
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*
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* @note if *pin is set as NULL, this function will initialize both of the built-in DAC channels by default.
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* if you don't want this to happen and you want to initialize only one of the DAC channels, you can call i2s_set_dac_mode instead.
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*
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* @return
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* - ESP_OK Success
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* - ESP_FAIL Parameter error
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*/
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esp_err_t i2s_set_pin(i2s_port_t i2s_num, const i2s_pin_config_t *pin);
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/**
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* @brief Set I2S dac mode, I2S built-in DAC is disabled by default
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*
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* @param dac_mode DAC mode configurations - see i2s_dac_mode_t
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*
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* @note Built-in DAC functions are only supported on I2S0 for current ESP32 chip.
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* If either of the built-in DAC channel are enabled, the other one can not
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* be used as RTC DAC function at the same time.
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2s_set_dac_mode(i2s_dac_mode_t dac_mode);
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/**
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* @brief Install and start I2S driver.
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*
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709
tools/sdk/include/driver/driver/mcpwm.h
Normal file
709
tools/sdk/include/driver/driver/mcpwm.h
Normal file
@ -0,0 +1,709 @@
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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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||||
// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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||||
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _DRIVER_MCPWM_H_
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#define _DRIVER_MCPWM_H_
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#include "esp_err.h"
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#include "soc/soc.h"
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#include "driver/gpio.h"
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#include "driver/periph_ctrl.h"
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#include "esp_intr.h"
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#include "esp_intr_alloc.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief IO signals for MCPWM
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* 6 MCPWM output pins that generate PWM signals
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* 3 MCPWM fault input pins to detect faults like overcurrent, overvoltage, etc
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* 3 MCPWM sync input pins to synchronize MCPWM outputs signals
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* 3 MCPWM capture input pin to capture hall sell signal to measure time
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*/
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typedef enum {
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MCPWM0A = 0, /*!<PWM0A output pin*/
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MCPWM0B, /*!<PWM0B output pin*/
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MCPWM1A, /*!<PWM1A output pin*/
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MCPWM1B, /*!<PWM1B output pin*/
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MCPWM2A, /*!<PWM2A output pin*/
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MCPWM2B, /*!<PWM2B output pin*/
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MCPWM_SYNC_0, /*!<SYNC0 input pin*/
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MCPWM_SYNC_1, /*!<SYNC1 input pin*/
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MCPWM_SYNC_2, /*!<SYNC2 input pin*/
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MCPWM_FAULT_0, /*!<FAULT0 input pin*/
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MCPWM_FAULT_1, /*!<FAULT1 input pin*/
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MCPWM_FAULT_2, /*!<FAULT2 input pin*/
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MCPWM_CAP_0 = 84, /*!<CAP0 input pin*/
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MCPWM_CAP_1, /*!<CAP1 input pin*/
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MCPWM_CAP_2, /*!<CAP2 input pin*/
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} mcpwm_io_signals_t;
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/**
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* @brief MCPWM pin number for
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*
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*/
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typedef struct {
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int mcpwm0a_out_num; /*!<MCPWM0A out pin*/
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int mcpwm0b_out_num; /*!<MCPWM0A out pin*/
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int mcpwm1a_out_num; /*!<MCPWM0A out pin*/
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int mcpwm1b_out_num; /*!<MCPWM0A out pin*/
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int mcpwm2a_out_num; /*!<MCPWM0A out pin*/
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int mcpwm2b_out_num; /*!<MCPWM0A out pin*/
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int mcpwm_sync0_in_num; /*!<SYNC0 in pin*/
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int mcpwm_sync1_in_num; /*!<SYNC1 in pin*/
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int mcpwm_sync2_in_num; /*!<SYNC2 in pin*/
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int mcpwm_fault0_in_num; /*!<FAULT0 in pin*/
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int mcpwm_fault1_in_num; /*!<FAULT1 in pin*/
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int mcpwm_fault2_in_num; /*!<FAULT2 in pin*/
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int mcpwm_cap0_in_num; /*!<CAP0 in pin*/
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int mcpwm_cap1_in_num; /*!<CAP1 in pin*/
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int mcpwm_cap2_in_num; /*!<CAP2 in pin*/
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} mcpwm_pin_config_t;
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/**
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* @brief Select MCPWM unit
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*/
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typedef enum {
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MCPWM_UNIT_0 = 0, /*!<MCPWM unit0 selected*/
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MCPWM_UNIT_1, /*!<MCPWM unit1 selected*/
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MCPWM_UNIT_MAX, /*!<Num of MCPWM units on ESP32*/
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} mcpwm_unit_t;
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/**
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* @brief Select MCPWM timer
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*/
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typedef enum {
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MCPWM_TIMER_0 = 0, /*!<Select MCPWM timer0*/
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MCPWM_TIMER_1, /*!<Select MCPWM timer1*/
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MCPWM_TIMER_2, /*!<Select MCPWM timer2*/
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MCPWM_TIMER_MAX, /*!<Num of MCPWM timers on ESP32*/
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} mcpwm_timer_t;
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/**
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* @brief Select MCPWM operator
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*/
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typedef enum {
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MCPWM_OPR_A = 0, /*!<Select MCPWMXA, where 'X' is timer number*/
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MCPWM_OPR_B, /*!<Select MCPWMXB, where 'X' is timer number*/
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MCPWM_OPR_MAX, /*!<Num of operators to each timer of MCPWM*/
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} mcpwm_operator_t;
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/**
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* @brief Select type of MCPWM counter
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*/
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typedef enum {
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MCPWM_UP_COUNTER = 1, /*!<For asymmetric MCPWM*/
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MCPWM_DOWN_COUNTER, /*!<For asymmetric MCPWM*/
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MCPWM_UP_DOWN_COUNTER, /*!<For symmetric MCPWM, frequency is half of MCPWM frequency set*/
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MCPWM_COUNTER_MAX, /*!<Maximum counter mode*/
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} mcpwm_counter_type_t;
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/**
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* @brief Select type of MCPWM duty cycle mode
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*/
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typedef enum {
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MCPWM_DUTY_MODE_0 = 0, /*!<Active high duty, i.e. duty cycle proportional to high time for asymmetric MCPWM*/
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MCPWM_DUTY_MODE_1, /*!<Active low duty, i.e. duty cycle proportional to low time for asymmetric MCPWM, out of phase(inverted) MCPWM*/
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MCPWM_DUTY_MODE_MAX, /*!<Num of duty cycle modes*/
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} mcpwm_duty_type_t;
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/**
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* @brief MCPWM carrier oneshot mode, in this mode the width of the first pulse of carrier can be programmed
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*/
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typedef enum {
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MCPWM_ONESHOT_MODE_DIS = 0, /*!<Enable oneshot mode*/
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MCPWM_ONESHOT_MODE_EN, /*!<Disable oneshot mode*/
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} mcpwm_carrier_os_t;
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/**
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* @brief MCPWM carrier output inversion, high frequency carrier signal active with MCPWM signal is high
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*/
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typedef enum {
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MCPWM_CARRIER_OUT_IVT_DIS = 0, /*!<Enable carrier output inversion*/
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MCPWM_CARRIER_OUT_IVT_EN, /*!<Disable carrier output inversion*/
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} mcpwm_carrier_out_ivt_t;
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/**
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* @brief MCPWM select sync signal input
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*/
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typedef enum {
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MCPWM_SELECT_SYNC0 = 4, /*!<Select SYNC0 as input*/
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MCPWM_SELECT_SYNC1, /*!<Select SYNC1 as input*/
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MCPWM_SELECT_SYNC2, /*!<Select SYNC2 as input*/
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} mcpwm_sync_signal_t;
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/**
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* @brief MCPWM select fault signal input
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*/
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typedef enum {
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MCPWM_SELECT_F0 = 0, /*!<Select F0 as input*/
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MCPWM_SELECT_F1, /*!<Select F1 as input*/
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MCPWM_SELECT_F2, /*!<Select F2 as input*/
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} mcpwm_fault_signal_t;
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/**
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* @brief MCPWM select triggering level of fault signal
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*/
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typedef enum {
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MCPWM_LOW_LEVEL_TGR = 0, /*!<Fault condition occurs when fault input signal goes from high to low, currently not supported*/
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MCPWM_HIGH_LEVEL_TGR, /*!<Fault condition occurs when fault input signal goes low to high*/
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} mcpwm_fault_input_level_t;
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/**
|
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* @brief MCPWM select action to be taken on MCPWMXA when fault occurs
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*/
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typedef enum {
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MCPWM_NO_CHANGE_IN_MCPWMXA = 0, /*!<No change in MCPWMXA output*/
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MCPWM_FORCE_MCPWMXA_LOW, /*!<Make MCPWMXA output low*/
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MCPWM_FORCE_MCPWMXA_HIGH, /*!<Make MCPWMXA output high*/
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MCPWM_TOG_MCPWMXA, /*!<Make MCPWMXA output toggle*/
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} mcpwm_action_on_pwmxa_t;
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/**
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* @brief MCPWM select action to be taken on MCPWMxB when fault occurs
|
||||
*/
|
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typedef enum {
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MCPWM_NO_CHANGE_IN_MCPWMXB = 0, /*!<No change in MCPWMXB output*/
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MCPWM_FORCE_MCPWMXB_LOW, /*!<Make MCPWMXB output low*/
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MCPWM_FORCE_MCPWMXB_HIGH, /*!<Make MCPWMXB output high*/
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MCPWM_TOG_MCPWMXB, /*!<Make MCPWMXB output toggle*/
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||||
} mcpwm_action_on_pwmxb_t;
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/**
|
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* @brief MCPWM select capture signal input
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||||
*/
|
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typedef enum {
|
||||
MCPWM_SELECT_CAP0 = 0, /*!<Select CAP0 as input*/
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MCPWM_SELECT_CAP1, /*!<Select CAP1 as input*/
|
||||
MCPWM_SELECT_CAP2, /*!<Select CAP2 as input*/
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||||
} mcpwm_capture_signal_t;
|
||||
|
||||
/**
|
||||
* @brief MCPWM select capture starts from which edge
|
||||
*/
|
||||
typedef enum {
|
||||
MCPWM_NEG_EDGE = 0, /*!<Capture starts from negative edge*/
|
||||
MCPWM_POS_EDGE, /*!<Capture starts from positive edge*/
|
||||
} mcpwm_capture_on_edge_t;
|
||||
|
||||
/**
|
||||
* @brief MCPWM deadtime types, used to generate deadtime, RED refers to rising edge delay and FED refers to falling edge delay
|
||||
*/
|
||||
typedef enum {
|
||||
MCPWM_BYPASS_RED = 0, /*!<MCPWMXA = no change, MCPWMXB = falling edge delay*/
|
||||
MCPWM_BYPASS_FED, /*!<MCPWMXA = rising edge delay, MCPWMXB = no change*/
|
||||
MCPWM_ACTIVE_HIGH_MODE, /*!<MCPWMXA = rising edge delay, MCPWMXB = falling edge delay*/
|
||||
MCPWM_ACTIVE_LOW_MODE, /*!<MCPWMXA = compliment of rising edge delay, MCPWMXB = compliment of falling edge delay*/
|
||||
MCPWM_ACTIVE_HIGH_COMPLIMENT_MODE, /*!<MCPWMXA = rising edge delay, MCPWMXB = compliment of falling edge delay*/
|
||||
MCPWM_ACTIVE_LOW_COMPLIMENT_MODE, /*!<MCPWMXA = compliment of rising edge delay, MCPWMXB = falling edge delay*/
|
||||
MCPWM_ACTIVE_RED_FED_FROM_PWMXA, /*!<MCPWMXA = MCPWMXB = rising edge delay as well as falling edge delay, generated from MCPWMXA*/
|
||||
MCPWM_ACTIVE_RED_FED_FROM_PWMXB, /*!<MCPWMXA = MCPWMXB = rising edge delay as well as falling edge delay, generated from MCPWMXB*/
|
||||
MCPWM_DEADTIME_TYPE_MAX,
|
||||
} mcpwm_deadtime_type_t;
|
||||
|
||||
/**
|
||||
* @brief MCPWM config structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t frequency; /*!<Set frequency of MCPWM in Hz*/
|
||||
float cmpr_a; /*!<Set % duty cycle for operator a(MCPWMXA), i.e for 62.3% duty cycle, duty_a = 62.3*/
|
||||
float cmpr_b; /*!<Set % duty cycle for operator b(MCPWMXB), i.e for 48% duty cycle, duty_b = 48.0*/
|
||||
mcpwm_duty_type_t duty_mode; /*!<Set type of duty cycle*/
|
||||
mcpwm_counter_type_t counter_mode; /*!<Set type of MCPWM counter*/
|
||||
} mcpwm_config_t;
|
||||
|
||||
/**
|
||||
* @brief MCPWM config carrier structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t carrier_period; /*!<Set carrier period = (carrier_period + 1)*800ns, carrier_period should be < 16*/
|
||||
uint8_t carrier_duty; /*!<Set carrier duty cycle, carrier_duty should be less then 8(increment every 12.5%)*/
|
||||
uint8_t pulse_width_in_os; /*!<Set pulse width of first pulse in one shot mode = (carrier period)*(pulse_width_in_os + 1), should be less then 16*/
|
||||
mcpwm_carrier_os_t carrier_os_mode; /*!<Enable or disable carrier oneshot mode*/
|
||||
mcpwm_carrier_out_ivt_t carrier_ivt_mode; /*!<Invert output of carrier*/
|
||||
} mcpwm_carrier_config_t;
|
||||
|
||||
|
||||
/**
|
||||
* @brief This function initializes each gpio signal for MCPWM
|
||||
* @note
|
||||
* This function initializes one gpio at a time.
|
||||
*
|
||||
* @param mcpwm_num set MCPWM Channel(0-1)
|
||||
* @param io_signal set MCPWM signals, each MCPWM unit has 6 output(MCPWMXA, MCPWMXB) and 9 input(SYNC_X, FAULT_X, CAP_X)
|
||||
* 'X' is timer_num(0-2)
|
||||
* @param gpio_num set this to configure gpio for MCPWM, if you want to use gpio16, gpio_num = 16
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_gpio_init(mcpwm_unit_t mcpwm_num, mcpwm_io_signals_t io_signal, int gpio_num);
|
||||
|
||||
/**
|
||||
* @brief Initialize MCPWM gpio structure
|
||||
* @note
|
||||
* This function can be used to initialize more then one gpio at a time.
|
||||
*
|
||||
* @param mcpwm_num set MCPWM Channel(0-1)
|
||||
* @param mcpwm_pin MCPWM pin structure
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_set_pin(mcpwm_unit_t mcpwm_num, const mcpwm_pin_config_t *mcpwm_pin);
|
||||
|
||||
/**
|
||||
* @brief Initialize MCPWM parameters
|
||||
*
|
||||
* @param mcpwm_num set MCPWM Channel(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param mcpwm_conf configure structure mcpwm_config_t
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_init( mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, const mcpwm_config_t *mcpwm_conf);
|
||||
|
||||
/**
|
||||
* @brief Set frequency(in Hz) of MCPWM timer
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param frequency set the frequency in Hz of each timer
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_set_frequency(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, uint32_t frequency);
|
||||
|
||||
/**
|
||||
* @brief Set duty cycle of each operator(MCPWMXA/MCPWMXB)
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param op_num set the operator(MCPWMXA/MCPWMXB), 'X' is timer number selected
|
||||
* @param duty set duty cycle in %(i.e for 62.3% duty cycle, duty = 62.3) of each operator
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_set_duty(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_operator_t op_num, float duty);
|
||||
|
||||
/**
|
||||
* @brief Set duty cycle of each operator(MCPWMXA/MCPWMXB) in us
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param op_num set the operator(MCPWMXA/MCPWMXB), 'x' is timer number selected
|
||||
* @param duty set duty value in microseconds of each operator
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_set_duty_in_us(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_operator_t op_num, uint32_t duty);
|
||||
|
||||
/**
|
||||
* @brief Set duty either active high or active low(out of phase/inverted)
|
||||
* @note
|
||||
* Call this function every time after mcpwm_set_signal_high or mcpwm_set_signal_low to resume with previously set duty cycle
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param op_num set the operator(MCPWMXA/MCPWMXB), 'x' is timer number selected
|
||||
* @param duty_num set active low or active high duty type
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_set_duty_type(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_operator_t op_num, mcpwm_duty_type_t duty_num);
|
||||
|
||||
/**
|
||||
* @brief Get frequency of timer
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
*
|
||||
* @return
|
||||
* - frequency of timer
|
||||
*/
|
||||
uint32_t mcpwm_get_frequency(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
|
||||
|
||||
/**
|
||||
* @brief Get duty cycle of each operator
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param op_num set the operator(MCPWMXA/MCPWMXB), 'x' is timer number selected
|
||||
*
|
||||
* @return
|
||||
* - duty cycle in % of each operator(56.7 means duty is 56.7%)
|
||||
*/
|
||||
float mcpwm_get_duty(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_operator_t op_num);
|
||||
|
||||
/**
|
||||
* @brief Use this function to set MCPWM signal high
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param op_num set the operator(MCPWMXA/MCPWMXB), 'x' is timer number selected
|
||||
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_set_signal_high(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_operator_t op_num);
|
||||
|
||||
/**
|
||||
* @brief Use this function to set MCPWM signal low
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param op_num set the operator(MCPWMXA/MCPWMXB), 'x' is timer number selected
|
||||
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_set_signal_low(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_operator_t op_num);
|
||||
/**
|
||||
* @brief Start MCPWM signal on timer 'x'
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_start(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
|
||||
|
||||
/**
|
||||
* @brief Start MCPWM signal on timer 'x'
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_stop(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
|
||||
|
||||
/**
|
||||
* @brief Initialize carrier configuration
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param carrier_conf configure structure mcpwm_carrier_config_t
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_carrier_init(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, const mcpwm_carrier_config_t *carrier_conf);
|
||||
|
||||
/**
|
||||
* @brief Enable MCPWM carrier submodule, for respective timer
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_carrier_enable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
|
||||
|
||||
/**
|
||||
* @brief Disable MCPWM carrier submodule, for respective timer
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_carrier_disable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
|
||||
|
||||
/**
|
||||
* @brief Set period of carrier
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param carrier_period set the carrier period of each timer, carrier period = (carrier_period + 1)*800ns
|
||||
* (carrier_period <= 15)
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_carrier_set_period(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, uint8_t carrier_period);
|
||||
|
||||
/**
|
||||
* @brief Set duty_cycle of carrier
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param carrier_duty set duty_cycle of carrier , carrier duty cycle = carrier_duty*12.5%
|
||||
* (chop_duty <= 7)
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_carrier_set_duty_cycle(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, uint8_t carrier_duty);
|
||||
|
||||
/**
|
||||
* @brief Enable and set width of first pulse in carrier oneshot mode
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param pulse_width set pulse width of first pulse in oneshot mode, width = (carrier period)*(pulse_width +1)
|
||||
* (pulse_width <= 15)
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_carrier_oneshot_mode_enable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, uint8_t pulse_width);
|
||||
|
||||
/**
|
||||
* @brief Disable oneshot mode, width of first pulse = carrier period
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_carrier_oneshot_mode_disable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
|
||||
|
||||
/**
|
||||
* @brief Enable or disable carrier output inversion
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param carrier_ivt_mode enable or disable carrier output inversion
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_carrier_output_invert(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num,
|
||||
mcpwm_carrier_out_ivt_t carrier_ivt_mode);
|
||||
|
||||
/**
|
||||
* @brief Enable and initialize deadtime for each MCPWM timer
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param dt_mode set deadtime mode
|
||||
* @param red set rising edge delay = red*100ns
|
||||
* @param fed set rising edge delay = fed*100ns
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_deadtime_enable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_deadtime_type_t dt_mode,
|
||||
uint32_t red, uint32_t fed);
|
||||
|
||||
/**
|
||||
* @brief Disable deadtime on MCPWM timer
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_deadtime_disable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
|
||||
|
||||
/**
|
||||
* @brief Initialize fault submodule, currently low level triggering not supported
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param intput_level set fault signal level, which will cause fault to occur
|
||||
* @param fault_sig set the fault Pin, which needs to be enabled
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_fault_init(mcpwm_unit_t mcpwm_num, mcpwm_fault_input_level_t intput_level, mcpwm_fault_signal_t fault_sig);
|
||||
|
||||
/**
|
||||
* @brief Set oneshot mode on fault detection, once fault occur in oneshot mode reset is required to resume MCPWM signals
|
||||
* @note
|
||||
* currently low level triggering not supported
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param fault_sig set the fault Pin, which needs to be enabled for oneshot mode
|
||||
* @param action_on_pwmxa action to be taken on MCPWMXA when fault occurs, either no change or high or low or toggle
|
||||
* @param action_on_pwmxb action to be taken on MCPWMXB when fault occurs, either no change or high or low or toggle
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_fault_set_oneshot_mode(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_fault_signal_t fault_sig,
|
||||
mcpwm_action_on_pwmxa_t action_on_pwmxa, mcpwm_action_on_pwmxb_t action_on_pwmxb);
|
||||
|
||||
/**
|
||||
* @brief Set cycle-by-cycle mode on fault detection, once fault occur in cyc mode MCPWM signal resumes as soon as fault signal becomes inactive
|
||||
* @note
|
||||
* currently low level triggering not supported
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param fault_sig set the fault Pin, which needs to be enabled for cyc mode
|
||||
* @param action_on_pwmxa action to be taken on MCPWMXA when fault occurs, either no change or high or low or toggle
|
||||
* @param action_on_pwmxb action to be taken on MCPWMXB when fault occurs, either no change or high or low or toggle
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_fault_set_cyc_mode(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_fault_signal_t fault_sig,
|
||||
mcpwm_action_on_pwmxa_t action_on_pwmxa, mcpwm_action_on_pwmxb_t action_on_pwmxb);
|
||||
|
||||
/**
|
||||
* @brief Disable fault signal
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param fault_sig fault pin, which needs to be disabled
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_fault_deinit(mcpwm_unit_t mcpwm_num, mcpwm_fault_signal_t fault_sig);
|
||||
|
||||
/**
|
||||
* @brief Initialize capture submodule
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param cap_edge set capture edge, BIT(0) - negative edge, BIT(1) - positive edge
|
||||
* @param cap_sig capture Pin, which needs to be enabled
|
||||
* @param num_of_pulse count time between rising/falling edge between 2 *(pulses mentioned), counter uses APB_CLK
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
|
||||
esp_err_t mcpwm_capture_enable(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig, mcpwm_capture_on_edge_t cap_edge,
|
||||
uint32_t num_of_pulse);
|
||||
|
||||
/**
|
||||
* @brief Disable capture signal
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param cap_sig capture Pin, which needs to be disabled
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_capture_disable(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig);
|
||||
|
||||
/**
|
||||
* @brief Get capture value
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param cap_sig capture pin on which value is to be measured
|
||||
*
|
||||
* @return
|
||||
* Captured value
|
||||
*/
|
||||
uint32_t mcpwm_capture_signal_get_value(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig);
|
||||
|
||||
/**
|
||||
* @brief Get edge of capture signal
|
||||
*
|
||||
* @param mcpwm_num set MCPWM Channel(0-1)
|
||||
* @param cap_sig capture pin of whose edge is to be determined
|
||||
*
|
||||
* @return
|
||||
* Capture signal edge: 1 - positive edge, 2 - negtive edge
|
||||
*/
|
||||
uint32_t mcpwm_capture_signal_get_edge(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig);
|
||||
|
||||
/**
|
||||
* @brief Initialize sync submodule
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
* @param sync_sig set the fault Pin, which needs to be enabled
|
||||
* @param phase_val phase value in 1/1000(for 86.7%, phase_val = 867) which timer moves to on sync signal
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_sync_enable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_sync_signal_t sync_sig,
|
||||
uint32_t phase_val);
|
||||
|
||||
/**
|
||||
* @brief Disable sync submodule on given timer
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param timer_num set timer number(0-2) of MCPWM, each MCPWM unit has 3 timers
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t mcpwm_sync_disable(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num);
|
||||
|
||||
/**
|
||||
* @brief Register MCPWM interrupt handler, the handler is an ISR.
|
||||
* the handler will be attached to the same CPU core that this function is running on.
|
||||
*
|
||||
* @param mcpwm_num set MCPWM unit(0-1)
|
||||
* @param fn interrupt handler function.
|
||||
* @param arg user-supplied argument passed to the handler function.
|
||||
* @param intr_alloc_flags flags used to allocate the interrupt. One or multiple (ORred)
|
||||
* ESP_INTR_FLAG_* values. see esp_intr_alloc.h for more info.
|
||||
* @param arg parameter for handler function
|
||||
* @param handle pointer to return handle. If non-NULL, a handle for the interrupt will
|
||||
* be returned here.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Function pointer error.
|
||||
*/
|
||||
esp_err_t mcpwm_isr_register(mcpwm_unit_t mcpwm_num, void (*fn)(void *), void *arg, int intr_alloc_flags, intr_handle_t *handle);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*_DRIVER_MCPWM_H_*/
|
||||
@ -100,6 +100,10 @@ typedef struct spi_device_t* spi_device_handle_t; ///< Handle for a device on a
|
||||
* for a SPI bus allows transfers on the bus to have sizes only limited by the amount of
|
||||
* internal memory. Selecting no DMA channel (by passing the value 0) limits the amount of
|
||||
* bytes transfered to a maximum of 32.
|
||||
*
|
||||
* @warning If a DMA channel is selected, any transmit and receive buffer used should be allocated in
|
||||
* DMA-capable memory.
|
||||
*
|
||||
* @return
|
||||
* - ESP_ERR_INVALID_ARG if configuration is invalid
|
||||
* - ESP_ERR_INVALID_STATE if host already is in use
|
||||
|
||||
@ -69,6 +69,10 @@ struct spi_slave_transaction_t {
|
||||
* @param dma_chan Either 1 or 2. A SPI bus used by this driver must have a DMA channel associated with
|
||||
* it. The SPI hardware has two DMA channels to share. This parameter indicates which
|
||||
* one to use.
|
||||
*
|
||||
* @warning If a DMA channel is selected, any transmit and receive buffer used should be allocated in
|
||||
* DMA-capable memory.
|
||||
*
|
||||
* @return
|
||||
* - ESP_ERR_INVALID_ARG if configuration is invalid
|
||||
* - ESP_ERR_INVALID_STATE if host already is in use
|
||||
|
||||
Reference in New Issue
Block a user