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IDF master 1d7068e4b (#5257)

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esp-dsp: master 7cc5073
esp-face: master 420fc7e
esp-rainmaker: f1b82c7
esp32-camera: master 7a06a7e
esp_littlefs: master b58f00c
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Me No Dev
2021-06-09 13:12:47 +03:00
committed by GitHub
parent 7f87d0fc3a
commit 4f9e583b29
606 changed files with 6709 additions and 3956 deletions
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18
tools/sdk/esp32/include/asio/port/include/esp_asio_config.h
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@ -1,16 +1,8 @@
// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ESP_ASIO_CONFIG_H_
#define _ESP_ASIO_CONFIG_H_

18
tools/sdk/esp32/include/asio/port/include/esp_exception.h
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@ -1,17 +1,9 @@
// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ESP_EXCEPTION_H_
#define _ESP_EXCEPTION_H_

18
tools/sdk/esp32/include/asio/port/include/openssl/conf.h
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@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ESP_ASIO_OPENSSL_CONF_H
#define _ESP_ASIO_OPENSSL_CONF_H

18
tools/sdk/esp32/include/asio/port/include/openssl/dh.h
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@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ESP_ASIO_OPENSSL_DH_STUB_H
#define _ESP_ASIO_OPENSSL_DH_STUB_H

18
tools/sdk/esp32/include/asio/port/include/openssl/esp_asio_openssl_stubs.h
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@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ESP_ASIO_OPENSSL_STUBS_H
#define _ESP_ASIO_OPENSSL_STUBS_H

18
tools/sdk/esp32/include/asio/port/include/openssl/rsa.h
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@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ESP_ASIO_OPENSSL_RSA_STUB_H
#define _ESP_ASIO_OPENSSL_RSA_STUB_H

18
tools/sdk/esp32/include/asio/port/include/openssl/x509v3.h
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@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ESP_ASIO_OPENSSL_X509V3_STUB_H
#define _ESP_ASIO_OPENSSL_X509V3_STUB_H

18
tools/sdk/esp32/include/bootloader_support/include/bootloader_clock.h
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@ -1,16 +1,8 @@
// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/bootloader_support/include/bootloader_common.h
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@ -1,16 +1,8 @@
// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "esp_flash_partitions.h"

18
tools/sdk/esp32/include/bootloader_support/include/bootloader_flash.h
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@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <esp_err.h>

18
tools/sdk/esp32/include/bootloader_support/include/bootloader_flash_config.h
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@ -1,16 +1,8 @@
// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/bootloader_support/include/bootloader_mem.h
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@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#ifdef __cplusplus

47
tools/sdk/esp32/include/bootloader_support/include/bootloader_random.h
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@ -1,16 +1,8 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
@ -21,33 +13,38 @@ extern "C" {
#endif
/**
* @brief Enable early entropy source for RNG
* @brief Enable an entropy source for RNG if RF is disabled
*
* Uses the SAR ADC to feed entropy into the HWRNG. The ADC is put
* into a test mode that reads an internal reference voltage and
* constantly feeds the LSB of data into the HWRNG. Consult the
* SoC Technical Reference Manual for more information.
* The exact internal entropy source mechanism depends on the chip in use but
* all SoCs use the SAR ADC to continuously mix random bits (an internal
* noise reading) into the HWRNG. Consult the SoC Technical Reference
* Manual for more information.
*
* Can also be used from app code early during operation, if true
* random numbers are required before WiFi stack is initialised.
* Call this function from app code only if WiFi/BT are not yet
* enabled and I2S and ADC are not in use.
*
* Call bootloader_random_disable() when done.
* random numbers are required before RF is initialised. Consult
* ESP-IDF Programming Guide "Random Number Generation" section for
* details.
*/
void bootloader_random_enable(void);
/**
* @brief Disable early entropy source for RNG
* @brief Disable entropy source for RNG
*
* Disables SAR ADC source and resets the I2S hardware.
* Disables internal entropy source. Must be called after
* bootloader_random_enable() and before RF features, ADC, or
* I2S (ESP32 only) are initialized.
*
* Consult the ESP-IDF Programming Guide "Random Number Generation"
* section for details.
*/
void bootloader_random_disable(void);
/**
* @brief Fill buffer with 'length' random bytes
*
* @note If this function is being called from app code only, and never
* from the bootloader, then it's better to call esp_fill_random().
*
* @param buffer Pointer to buffer
* @param length This many bytes of random data will be copied to buffer
*/

18
tools/sdk/esp32/include/bootloader_support/include/bootloader_util.h
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@ -1,16 +1,8 @@
// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/bootloader_support/include/esp_app_format.h
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@ -1,16 +1,8 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <inttypes.h>

5
tools/sdk/esp32/include/bootloader_support/include/esp_flash_data_types.h
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@ -1,2 +1,7 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#warning esp_flash_data_types.h has been merged into esp_flash_partitions.h, please include esp_flash_partitions.h instead
#include "esp_flash_partitions.h"

18
tools/sdk/esp32/include/bootloader_support/include/esp_flash_encrypt.h
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@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdbool.h>

21
tools/sdk/esp32/include/bootloader_support/include/esp_flash_partitions.h
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@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "esp_err.h"
@ -42,6 +34,9 @@ extern "C" {
#define PART_FLAG_ENCRYPTED (1<<0)
/* The md5sum value is found this many bytes after the ESP_PARTITION_MAGIC_MD5 offset */
#define ESP_PARTITION_MD5_OFFSET 16
/* Pre-partition table fixed flash offsets */
#define ESP_BOOTLOADER_DIGEST_OFFSET 0x0
#define ESP_BOOTLOADER_OFFSET CONFIG_BOOTLOADER_OFFSET_IN_FLASH /* Offset of bootloader image. Has matching value in bootloader KConfig.projbuild file. */

18
tools/sdk/esp32/include/bootloader_support/include/esp_image_format.h
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@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdbool.h>

18
tools/sdk/esp32/include/bootloader_support/include/esp_secure_boot.h
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@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdbool.h>

12
tools/sdk/esp32/include/config/sdkconfig.h
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@ -118,8 +118,6 @@
#define CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_SUPP 1
#define CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_NUM 100
#define CONFIG_BTDM_BLE_ADV_REPORT_DISCARD_THRSHOLD 20
#define CONFIG_BTDM_COEX_BT_OPTIONS 1
#define CONFIG_BTDM_COEX_BLE_ADV_HIGH_PRIORITY 1
#define CONFIG_BT_CTRL_MODE_EFF 1
#define CONFIG_BT_CTRL_BLE_MAX_ACT 10
#define CONFIG_BT_CTRL_BLE_MAX_ACT_EFF 10
@ -244,6 +242,10 @@
#define CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL 120
#define CONFIG_ESP_NETIF_TCPIP_LWIP 1
#define CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER 1
#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE 1
#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER 20
#define CONFIG_ESP32_PHY_MAX_TX_POWER 20
#define CONFIG_ESP32_REDUCE_PHY_TX_POWER 1
#define CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT 1
#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2048
@ -285,10 +287,6 @@
#define CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0 1
#define CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN 752
#define CONFIG_ESP32_WIFI_MGMT_SBUF_NUM 32
#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE 1
#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER 20
#define CONFIG_ESP32_PHY_MAX_TX_POWER 20
#define CONFIG_ESP32_REDUCE_PHY_TX_POWER 1
#define CONFIG_ESP_COREDUMP_ENABLE_TO_NONE 1
#define CONFIG_FATFS_CODEPAGE_850 1
#define CONFIG_FATFS_CODEPAGE 850
@ -660,5 +658,5 @@
#define CONFIG_ULP_COPROC_ENABLED CONFIG_ESP32_ULP_COPROC_ENABLED
#define CONFIG_ULP_COPROC_RESERVE_MEM CONFIG_ESP32_ULP_COPROC_RESERVE_MEM
#define CONFIG_WARN_WRITE_STRINGS CONFIG_COMPILER_WARN_WRITE_STRINGS
#define CONFIG_ARDUINO_IDF_COMMIT "c13afea63"
#define CONFIG_ARDUINO_IDF_COMMIT "1d7068e4b"
#define CONFIG_ARDUINO_IDF_BRANCH "master"

18
tools/sdk/esp32/include/console/esp_console.h
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@ -1,16 +1,8 @@
// Copyright 2016-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#ifdef __cplusplus

18
tools/sdk/esp32/include/driver/esp32/include/driver/adc.h
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@ -1,16 +1,8 @@
// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/esp32/include/driver/dac.h
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@ -1,16 +1,8 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/esp32/include/driver/touch_sensor.h
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@ -1,16 +1,8 @@
// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/adc2_wifi_private.h
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@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/adc_common.h
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@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/can.h
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@ -1,16 +1,8 @@
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/dac_common.h
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@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/dedic_gpio.h
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@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/gpio.h
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@ -1,16 +1,8 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "sdkconfig.h"

21
tools/sdk/esp32/include/driver/include/driver/i2c.h
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@ -1,16 +1,8 @@
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _DRIVER_I2C_H_
#define _DRIVER_I2C_H_
@ -97,6 +89,9 @@ esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode, size_t slv_rx_
/**
* @brief I2C driver delete
*
* @note This function does not guarantee thread safety.
* Please make sure that no thread will continuously hold semaphores before calling the delete function.
*
* @param i2c_num I2C port number
*
* @return

18
tools/sdk/esp32/include/driver/include/driver/i2s.h
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@ -1,16 +1,8 @@
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/ledc.h
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@ -1,16 +1,8 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/mcpwm.h
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@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/pcnt.h
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@ -1,16 +1,8 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/periph_ctrl.h
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@ -1,16 +1,8 @@
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _DRIVER_PERIPH_CTRL_H_
#define _DRIVER_PERIPH_CTRL_H_

18
tools/sdk/esp32/include/driver/include/driver/rmt.h
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@ -1,16 +1,8 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/rtc_cntl.h
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@ -1,16 +1,8 @@
// Copyright 2016-2017 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/rtc_io.h
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@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _DRIVER_RTC_GPIO_H_
#define _DRIVER_RTC_GPIO_H_

18
tools/sdk/esp32/include/driver/include/driver/sdio_slave.h
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@ -1,16 +1,8 @@
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _DRIVER_SDIO_SLAVE_H_
#define _DRIVER_SDIO_SLAVE_H_

8
tools/sdk/esp32/include/driver/include/driver/sdmmc_defs.h
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@ -1,6 +1,12 @@
/*
* SPDX-FileCopyrightText: 2006 Uwe Stuehler <uwe@openbsd.org>
*
* SPDX-License-Identifier: ISC
*
* SPDX-FileContributor: 2016-2021 Espressif Systems (Shanghai) CO LTD
*/
/*
* Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
* Adaptations to ESP-IDF Copyright (c) 2016 Espressif Systems (Shanghai) PTE LTD
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

77
tools/sdk/esp32/include/driver/include/driver/sdmmc_host.h
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@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
@ -59,8 +51,26 @@ extern "C" {
* Extra configuration for SDMMC peripheral slot
*/
typedef struct {
gpio_num_t gpio_cd; ///< GPIO number of card detect signal
gpio_num_t gpio_wp; ///< GPIO number of write protect signal
#ifdef SOC_SDMMC_USE_GPIO_MATRIX
gpio_num_t clk; ///< GPIO number of CLK signal.
gpio_num_t cmd; ///< GPIO number of CMD signal.
gpio_num_t d0; ///< GPIO number of D0 signal.
gpio_num_t d1; ///< GPIO number of D1 signal.
gpio_num_t d2; ///< GPIO number of D2 signal.
gpio_num_t d3; ///< GPIO number of D3 signal.
gpio_num_t d4; ///< GPIO number of D4 signal. Ignored in 1- or 4- line mode.
gpio_num_t d5; ///< GPIO number of D5 signal. Ignored in 1- or 4- line mode.
gpio_num_t d6; ///< GPIO number of D6 signal. Ignored in 1- or 4- line mode.
gpio_num_t d7; ///< GPIO number of D7 signal. Ignored in 1- or 4- line mode.
#endif // SOC_SDMMC_USE_GPIO_MATRIX
union {
gpio_num_t gpio_cd; ///< GPIO number of card detect signal
gpio_num_t cd; ///< GPIO number of card detect signal; shorter name.
};
union {
gpio_num_t gpio_wp; ///< GPIO number of write protect signal
gpio_num_t wp; ///< GPIO number of write protect signal; shorter name.
};
uint8_t width; ///< Bus width used by the slot (might be less than the max width supported)
uint32_t flags; ///< Features used by this slot
#define SDMMC_SLOT_FLAG_INTERNAL_PULLUP BIT(0)
@ -72,18 +82,44 @@ typedef struct {
#define SDMMC_SLOT_NO_CD GPIO_NUM_NC ///< indicates that card detect line is not used
#define SDMMC_SLOT_NO_WP GPIO_NUM_NC ///< indicates that write protect line is not used
#define SDMMC_SLOT_WIDTH_DEFAULT 0 ///< use the default width for the slot (8 for slot 0, 4 for slot 1)
#define SDMMC_SLOT_WIDTH_DEFAULT 0 ///< use the maximum possible width for the slot
#ifdef SOC_SDMMC_USE_GPIO_MATRIX
/**
* Macro defining default configuration of SDMMC host slot
*/
#define SDMMC_SLOT_CONFIG_DEFAULT() {\
.gpio_cd = SDMMC_SLOT_NO_CD, \
.gpio_wp = SDMMC_SLOT_NO_WP, \
.clk = GPIO_NUM_14, \
.cmd = GPIO_NUM_15, \
.d0 = GPIO_NUM_2, \
.d1 = GPIO_NUM_4, \
.d2 = GPIO_NUM_12, \
.d3 = GPIO_NUM_13, \
.d4 = GPIO_NUM_33, \
.d5 = GPIO_NUM_34, \
.d6 = GPIO_NUM_35, \
.d7 = GPIO_NUM_36, \
.cd = SDMMC_SLOT_NO_CD, \
.wp = SDMMC_SLOT_NO_WP, \
.width = SDMMC_SLOT_WIDTH_DEFAULT, \
.flags = 0, \
}
#else // SOC_SDMMC_USE_GPIO_MATRIX
/**
* Macro defining default configuration of SDMMC host slot
*/
#define SDMMC_SLOT_CONFIG_DEFAULT() {\
.cd = SDMMC_SLOT_NO_CD, \
.wp = SDMMC_SLOT_NO_WP, \
.width = SDMMC_SLOT_WIDTH_DEFAULT, \
.flags = 0, \
}
#endif // SOC_SDMMC_USE_GPIO_MATRIX
/**
* @brief Initialize SDMMC host peripheral
*
@ -226,6 +262,9 @@ esp_err_t sdmmc_host_deinit(void);
/**
* @brief Enable the pull-ups of sd pins.
*
* This function is deprecated. Please set SDMMC_SLOT_FLAG_INTERNAL_PULLUP flag in
* sdmmc_slot_config_t::flags instead.
*
* @note You should always place actual pullups on the lines instead of using
* this function. Internal pullup resistance are high and not sufficient, may
* cause instability in products. This is for debug or examples only.
@ -238,7 +277,7 @@ esp_err_t sdmmc_host_deinit(void);
* - ESP_ERR_INVALID_ARG: if configured width larger than maximum the slot can
* support
*/
esp_err_t sdmmc_host_pullup_en(int slot, int width);
esp_err_t sdmmc_host_pullup_en(int slot, int width) __attribute__((deprecated));
#ifdef __cplusplus
}

8
tools/sdk/esp32/include/driver/include/driver/sdmmc_types.h
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@ -1,6 +1,12 @@
/*
* SPDX-FileCopyrightText: 2006 Uwe Stuehler <uwe@openbsd.org>
*
* SPDX-License-Identifier: ISC
*
* SPDX-FileContributor: 2016-2021 Espressif Systems (Shanghai) CO LTD
*/
/*
* Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
* Adaptations to ESP-IDF Copyright (c) 2016 Espressif Systems (Shanghai) PTE LTD
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above

18
tools/sdk/esp32/include/driver/include/driver/sdspi_host.h
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@ -1,16 +1,8 @@
// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

17
tools/sdk/esp32/include/driver/include/driver/sigmadelta.h
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@ -1,15 +1,8 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/spi_common.h
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@ -1,16 +1,8 @@
// Copyright 2010-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/spi_common_internal.h
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@ -1,16 +1,8 @@
// Copyright 2010-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
// Internal header, don't use it in the user code

18
tools/sdk/esp32/include/driver/include/driver/spi_master.h
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@ -1,16 +1,8 @@
// Copyright 2010-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/spi_slave.h
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@ -1,16 +1,8 @@
// Copyright 2010-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _DRIVER_SPI_SLAVE_H_

18
tools/sdk/esp32/include/driver/include/driver/spi_slave_hd.h
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@ -1,16 +1,8 @@
// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/timer.h
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@ -1,16 +1,8 @@
// Copyright 2010-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/touch_pad.h
View File

@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/touch_sensor_common.h
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@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/twai.h
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@ -1,16 +1,8 @@
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/uart.h
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@ -1,16 +1,8 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/driver/include/driver/uart_select.h
View File

@ -1,17 +1,9 @@
// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _UART_SELECT_H_
#define _UART_SELECT_H_

18
tools/sdk/esp32/include/driver/include/esp_private/adc_cali.h
View File

@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
// Internal header for calibration, don't use in app

18
tools/sdk/esp32/include/driver/include/esp_private/gdma.h
View File

@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
// DO NOT USE THESE APIS IN ANY APPLICATIONS
// GDMA driver is not public for end users, but for ESP-IDF developpers.

18
tools/sdk/esp32/include/driver/include/esp_private/gpio.h
View File

@ -1,16 +1,8 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/efuse/esp32/include/esp_efuse.h
View File

@ -1,16 +1,8 @@
// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/efuse/esp32/include/esp_efuse_table.h
View File

@ -1,16 +1,8 @@
// Copyright 2017-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at",
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifdef __cplusplus
extern "C" {

18
tools/sdk/esp32/include/efuse/include/esp_efuse.h
View File

@ -1,16 +1,8 @@
// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once

18
tools/sdk/esp32/include/esp-tls/esp-tls-crypto/esp_tls_crypto.h
View File

@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ESP_TLS_CRYPTO_H
#define _ESP_TLS_CRYPTO_H

38
tools/sdk/esp32/include/esp-tls/esp_tls.h
View File

@ -1,16 +1,8 @@
// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ESP_TLS_H_
#define _ESP_TLS_H_
@ -171,7 +163,10 @@ typedef struct esp_tls_cfg {
void *ds_data; /*!< Pointer for digital signature peripheral context */
bool is_plain_tcp; /*!< Use non-TLS connection: When set to true, the esp-tls uses
plain TCP transport rather then TLS/SSL connection */
plain TCP transport rather then TLS/SSL connection.
Note, that it is possible to connect using a plain tcp transport
directly with esp_tls_plain_tcp_connect() API */
struct ifreq *if_name; /*!< The name of interface for data to go through. Use the default interface without setting */
} esp_tls_cfg_t;
@ -599,6 +594,21 @@ int esp_tls_server_session_create(esp_tls_cfg_server_t *cfg, int sockfd, esp_tls
void esp_tls_server_session_delete(esp_tls_t *tls);
#endif /* ! CONFIG_ESP_TLS_SERVER */
/**
* @brief Creates a plain TCP connection, returning a valid socket fd on success or an error handle
*
* @param[in] host Hostname of the host.
* @param[in] hostlen Length of hostname.
* @param[in] port Port number of the host.
* @param[in] cfg ESP-TLS configuration as esp_tls_cfg_t.
* @param[out] error_handle ESP-TLS error handle holding potential errors occurred during connection
* @param[out] sockfd Socket descriptor if successfully connected on TCP layer
* @return ESP_OK on success
* ESP_ERR_INVALID_ARG if invalid output parameters
* ESP-TLS based error codes on failure
*/
esp_err_t esp_tls_plain_tcp_connect(const char *host, int hostlen, int port, const esp_tls_cfg_t *cfg, esp_tls_error_handle_t error_handle, int *sockfd);
#ifdef __cplusplus
}
#endif

18
tools/sdk/esp32/include/esp-tls/esp_tls_errors.h
View File

@ -1,16 +1,8 @@
// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ESP_TLS_ERRORS_H_
#define _ESP_TLS_ERRORS_H_

18
tools/sdk/esp32/include/esp-tls/private_include/esp_tls_error_capture_internal.h
View File

@ -1,16 +1,8 @@
// Copyright 2017-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __ESP_TLS_ERROR_CAPTURE_INTERNAL_H__
#define __ESP_TLS_ERROR_CAPTURE_INTERNAL_H__

18
tools/sdk/esp32/include/esp-tls/private_include/esp_tls_mbedtls.h
View File

@ -1,16 +1,8 @@
// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "esp_tls.h"

18
tools/sdk/esp32/include/esp-tls/private_include/esp_tls_wolfssl.h
View File

@ -1,16 +1,8 @@
// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "esp_tls.h"

2
tools/sdk/esp32/include/esp32-camera/driver/include/esp_camera.h
View File

@ -104,7 +104,7 @@ typedef struct {
int pin_href; /*!< GPIO pin for camera HREF line */
int pin_pclk; /*!< GPIO pin for camera PCLK line */
int xclk_freq_hz; /*!< Frequency of XCLK signal, in Hz. Either 20KHz or 10KHz for OV2640 double FPS (Experimental) */
int xclk_freq_hz; /*!< Frequency of XCLK signal, in Hz. EXPERIMENTAL: Set to 16MHz on ESP32-S2 or ESP32-S3 to enable EDMA mode */
ledc_timer_t ledc_timer; /*!< LEDC timer to be used for generating XCLK */
ledc_channel_t ledc_channel; /*!< LEDC channel to be used for generating XCLK */

5
tools/sdk/esp32/include/esp_gdbstub/include/esp_gdbstub.h
View File

@ -14,13 +14,12 @@
#pragma once
#include "esp_gdbstub_arch.h"
#ifdef __cplusplus
extern "C" {
#endif
void esp_gdbstub_panic_handler(esp_gdbstub_frame_t *frame) __attribute__((noreturn));
void esp_gdbstub_init(void);
void esp_gdbstub_panic_handler(void *frame);
#ifdef __cplusplus
}

19
tools/sdk/esp32/include/esp_http_client/include/esp_http_client.h
View File

@ -1,16 +1,8 @@
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ESP_HTTP_CLIENT_H
#define _ESP_HTTP_CLIENT_H
@ -158,6 +150,7 @@ typedef enum {
HttpStatus_TemporaryRedirect = 307,
/* 4xx - Client Error */
HttpStatus_BadRequest = 400,
HttpStatus_Unauthorized = 401,
HttpStatus_Forbidden = 403,
HttpStatus_NotFound = 404,

18
tools/sdk/esp32/include/esp_http_server/include/esp_http_server.h
View File

@ -1,16 +1,8 @@
// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ESP_HTTP_SERVER_H_
#define _ESP_HTTP_SERVER_H_

5
tools/sdk/esp32/include/esp_http_server/include/http_server.h
View File

@ -1,2 +1,7 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#warning http_server.h has been renamed to esp_http_server.h, please update include directives
#include "esp_http_server.h"

27
tools/sdk/esp32/include/esp_hw_support/include/esp_random.h
View File

@ -24,27 +24,13 @@ extern "C" {
/**
* @brief Get one random 32-bit word from hardware RNG
*
* The hardware RNG produces true random numbers under any of the following conditions:
*
* - An RF subsystem is running (i.e. Bluetooth or WiFi is enabled)
* - An internal entropy source has been enabled by calling bootloader_random_enable()
* and not yet disabled by calling bootloader_random_disable()
* - While the ESP-IDF bootloader is running (due to the internal entropy source being enabled
* for the duration of bootloader execution).
*
* If none of the above conditions are true, the hardware RNG will produce pseudo-random numbers only.
*
* When the hardware RNG is producing true random numbers, external entropy (noise samples) are
* continuously mixed into the internal hardware RNG state. Consult the SoC Technical Reference Manual
* for more details.
* If Wi-Fi or Bluetooth are enabled, this function returns true random numbers. In other
* situations, if true random numbers are required then consult the ESP-IDF Programming
* Guide "Random Number Generation" section for necessary prerequisites.
*
* This function automatically busy-waits to ensure enough external entropy has been
* introduced into the hardware RNG state, before returning a new random number.
*
* If generating random numbers from an app which has not yet enabled Bluetooth or Wi-Fi, call the
* API function bootloader_random_enable() before generating random numbers and then call
* bootloader_random_disable() before using any APIs for Bluetooth, Wi-Fi, ADC, or I2S. Consult the
* bootloader_random.h header for more details.
* introduced into the hardware RNG state, before returning a new random number. This delay
* is very short (always less than 100 CPU cycles).
*
* @return Random value between 0 and UINT32_MAX
*/
@ -53,7 +39,8 @@ uint32_t esp_random(void);
/**
* @brief Fill a buffer with random bytes from hardware RNG
*
* @note This function has the same restrictions regarding available entropy as esp_random()
* @note This function is implemented via calls to esp_random(), so the same
* constraints apply.
*
* @param buf Pointer to buffer to fill with random numbers.
* @param len Length of buffer in bytes

48
tools/sdk/esp32/include/esp_netif/include/esp_netif.h
View File

@ -237,6 +237,54 @@ void esp_netif_action_disconnected(void *esp_netif, esp_event_base_t base, int32
*/
void esp_netif_action_got_ip(void *esp_netif, esp_event_base_t base, int32_t event_id, void *data);
/**
* @brief Default building block for network interface action upon IPv6 multicast group join
*
* @note This API can be directly used as event handler
*
* @param[in] esp_netif Handle to esp-netif instance
* @param base
* @param event_id
* @param data
*/
void esp_netif_action_join_ip6_multicast_group(void *esp_netif, esp_event_base_t base, int32_t event_id, void *data);
/**
* @brief Default building block for network interface action upon IPv6 multicast group leave
*
* @note This API can be directly used as event handler
*
* @param[in] esp_netif Handle to esp-netif instance
* @param base
* @param event_id
* @param data
*/
void esp_netif_action_leave_ip6_multicast_group(void *esp_netif, esp_event_base_t base, int32_t event_id, void *data);
/**
* @brief Default building block for network interface action upon IPv6 address added by the underlying stack
*
* @note This API can be directly used as event handler
*
* @param[in] esp_netif Handle to esp-netif instance
* @param base
* @param event_id
* @param data
*/
void esp_netif_action_add_ip6_address(void *esp_netif, esp_event_base_t base, int32_t event_id, void *data);
/**
* @brief Default building block for network interface action upon IPv6 address removed by the underlying stack
*
* @note This API can be directly used as event handler
*
* @param[in] esp_netif Handle to esp-netif instance
* @param base
* @param event_id
* @param data
*/
void esp_netif_action_remove_ip6_address(void *esp_netif, esp_event_base_t base, int32_t event_id, void *data);
/**
* @}
*/

36
tools/sdk/esp32/include/esp_netif/include/esp_netif_defaults.h
View File

@ -73,6 +73,18 @@ extern "C" {
.route_prio = 20 \
};
#define ESP_NETIF_INHERENT_DEFAULT_OPENTHREAD() \
{ \
.flags = 0, \
ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(mac) \
ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(ip_info) \
.get_ip_event = 0, \
.lost_ip_event = 0, \
.if_key = "OT_DEF", \
.if_desc = "openthread", \
.route_prio = 15 \
};
#define ESP_NETIF_INHERENT_DEFAULT_SLIP() \
{ \
.flags = ESP_NETIF_FLAG_IS_SLIP, \
@ -85,6 +97,7 @@ extern "C" {
.route_prio = 16 \
};
/**
* @brief Default configuration reference of ethernet interface
*/
@ -162,12 +175,12 @@ extern "C" {
#define ESP_NETIF_BASE_DEFAULT_SLIP &_g_esp_netif_inherent_slip_config
#define ESP_NETIF_NETSTACK_DEFAULT_ETH _g_esp_netif_netstack_default_eth
#define ESP_NETIF_NETSTACK_DEFAULT_WIFI_STA _g_esp_netif_netstack_default_wifi_sta
#define ESP_NETIF_NETSTACK_DEFAULT_WIFI_AP _g_esp_netif_netstack_default_wifi_ap
#define ESP_NETIF_NETSTACK_DEFAULT_PPP _g_esp_netif_netstack_default_ppp
#define ESP_NETIF_NETSTACK_DEFAULT_SLIP _g_esp_netif_netstack_default_slip
#define ESP_NETIF_NETSTACK_DEFAULT_OPENTHREAD _g_esp_netif_netstack_default_openthread
//
// Include default network stacks configs
@ -194,6 +207,27 @@ extern const esp_netif_inherent_config_t _g_esp_netif_inherent_slip_config;
extern const esp_netif_ip_info_t _g_esp_netif_soft_ap_ip;
#if CONFIG_OPENTHREAD_ENABLED
/**
* @brief Default configuration reference of SLIP client
*/
#define ESP_NETIF_DEFAULT_OPENTHREAD() \
{ \
.base = ESP_NETIF_BASE_DEFAULT_OPENTHREAD, \
.driver = NULL, \
.stack = ESP_NETIF_NETSTACK_DEFAULT_OPENTHREAD, \
}
/**
* @brief Default base config (esp-netif inherent) of openthread interface
*/
#define ESP_NETIF_BASE_DEFAULT_OPENTHREAD &_g_esp_netif_inherent_openthread_config
extern const esp_netif_netstack_config_t *_g_esp_netif_netstack_default_openthread;
extern const esp_netif_inherent_config_t _g_esp_netif_inherent_openthread_config;
#endif // CONFIG_OPENTHREAD_ENABLED
#ifdef __cplusplus
}
#endif

8
tools/sdk/esp32/include/esp_netif/include/esp_netif_types.h
View File

@ -33,6 +33,8 @@ extern "C" {
#define ESP_ERR_ESP_NETIF_DRIVER_ATTACH_FAILED ESP_ERR_ESP_NETIF_BASE + 0x08
#define ESP_ERR_ESP_NETIF_INIT_FAILED ESP_ERR_ESP_NETIF_BASE + 0x09
#define ESP_ERR_ESP_NETIF_DNS_NOT_CONFIGURED ESP_ERR_ESP_NETIF_BASE + 0x0A
#define ESP_ERR_ESP_NETIF_MLD6_FAILED ESP_ERR_ESP_NETIF_BASE + 0x0B
#define ESP_ERR_ESP_NETIF_IP6_ADDR_FAILED ESP_ERR_ESP_NETIF_BASE + 0x0C
/** @brief Type of esp_netif_object server */
@ -125,6 +127,12 @@ typedef struct {
int ip_index; /*!< IPv6 address index */
} ip_event_got_ip6_t;
/** Event structure for ADD_IP6 event */
typedef struct {
esp_ip6_addr_t addr; /*!< The address to be added to the interface */
bool preferred; /*!< The default preference of the address */
} ip_event_add_ip6_t;
/** Event structure for IP_EVENT_AP_STAIPASSIGNED event */
typedef struct {
esp_ip4_addr_t ip; /*!< IP address which was assigned to the station */

0
tools/sdk/esp32/include/esp_wifi/esp32/include/phy_init_data.h → tools/sdk/esp32/include/esp_phy/esp32/include/phy_init_data.h
View File

0
tools/sdk/esp32/include/esp_wifi/include/esp_phy_init.h → tools/sdk/esp32/include/esp_phy/include/esp_phy_init.h
View File

0
tools/sdk/esp32/include/esp_wifi/include/phy.h → tools/sdk/esp32/include/esp_phy/include/phy.h
View File

8
tools/sdk/esp32/include/esp_rom/include/esp_rom_md5.h
View File

@ -34,6 +34,8 @@ typedef struct MD5Context {
uint8_t in[64];
} md5_context_t;
#define ESP_ROM_MD5_DIGEST_LEN 16
/**
* @brief Initialize the MD5 context
*
@ -46,9 +48,9 @@ void esp_rom_md5_init(md5_context_t *context);
*
* @param context MD5 context which has been initialized by `MD5Init`
* @param buf Input buffer
* @param len Buffer length
* @param len Buffer length in bytes
*/
void esp_rom_md5_update(md5_context_t *context, const uint8_t *buf, uint32_t len);
void esp_rom_md5_update(md5_context_t *context, const void *buf, uint32_t len);
/**
* @brief Extract the MD5 result, and erase the context
@ -56,7 +58,7 @@ void esp_rom_md5_update(md5_context_t *context, const uint8_t *buf, uint32_t len
* @param digest Where to store the 128-bit digest value
* @param context MD5 context
*/
void esp_rom_md5_final(uint8_t digest[16], md5_context_t *context);
void esp_rom_md5_final(uint8_t *digest, md5_context_t *context);
#ifdef __cplusplus
}

2
tools/sdk/esp32/include/esp_system/include/esp_task.h
View File

@ -21,6 +21,8 @@
* 4. If the configMAX_PRIORITIES is modified, please make all priority are
* greater than 0
* 5. Make sure esp_task.h is consistent between wifi lib and idf
* 6. If changing system task priorities, please check the values documented in /api-guides/performance/speed.rst
* are up to date
*/
#ifndef _ESP_TASK_H_

33
tools/sdk/esp32/include/espcoredump/include/esp_core_dump.h
View File

@ -14,10 +14,11 @@
#ifndef ESP_CORE_DUMP_H_
#define ESP_CORE_DUMP_H_
#include "sdkconfig.h"
#include <stddef.h>
#include "esp_err.h"
#include "esp_private/panic_internal.h"
#include "esp_core_dump_summary_extra_info.h"
#include "esp_core_dump_summary_port.h"
#ifdef __cplusplus
extern "C" {
@ -25,14 +26,7 @@ extern "C" {
#define APP_ELF_SHA256_SZ (CONFIG_APP_RETRIEVE_LEN_ELF_SHA + 1)
/**
* @brief Backtrace information
*/
typedef struct {
uint32_t bt[16]; /*!< Backtrace (array of PC) */
uint32_t depth; /*!< Number of backtrace entries */
bool corrupted; /*!< Status flag for backtrace is corrupt or not */
} esp_core_dump_bt_info_t;
#if CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF
/**
* @brief Core dump summary, Most meaningful contents of the core dump
@ -48,6 +42,8 @@ typedef struct {
esp_core_dump_summary_extra_info_t ex_info; /*!< Architecture specific extra data */
} esp_core_dump_summary_t;
#endif /* CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF */
/**************************************************************************************/
/******************************** EXCEPTION MODE API **********************************/
/**************************************************************************************/
@ -137,15 +133,32 @@ esp_err_t esp_core_dump_image_get(size_t* out_addr, size_t *out_size);
*/
esp_err_t esp_core_dump_image_erase(void);
#if CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF
/**
* @brief Get the summary of a core dump. This function works only with ELF format core dumps.
* @brief Get the summary of a core dump.
*
* @param summary Summary of the core dump
*
* @return ESP_OK on success, otherwise \see esp_err_t
*
* @note This function works only if coredump is stored in flash and in ELF format
*
* Example usage:
* @code{c}
* esp_core_dump_summary_t *summary = malloc(sizeof(esp_core_dump_summary_t));
* if (summary) {
* if (esp_core_dump_get_summary(summary) == ESP_OK) {
* // Do stuff
* }
* }
* free(summary);
* @endcode
*/
esp_err_t esp_core_dump_get_summary(esp_core_dump_summary_t *summary);
#endif /* CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF */
#ifdef __cplusplus
}
#endif

22
tools/sdk/esp32/include/espcoredump/include/port/riscv/esp_core_dump_summary_extra_info.h → tools/sdk/esp32/include/espcoredump/include/port/riscv/esp_core_dump_summary_port.h
View File

@ -12,6 +12,7 @@
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include "sdkconfig.h"
#include <stdint.h>
#ifdef __cplusplus
@ -19,6 +20,21 @@ extern "C"
{
#endif
#if CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF
/**
* @brief Backtrace information
*
* For RISCV, backtrace cannot be generated on device without including and parsing
* DWARF sections. Including these sections would increase the binary size so provide
* the stackdump that can be later used to generate backtrace with the help of GDB or by parsing the ELF file
* on the host machine
*/
typedef struct {
uint8_t stackdump[CONFIG_ESP_COREDUMP_SUMMARY_STACKDUMP_SIZE]; /*!< Stack dump of the crashing task. */
uint32_t dump_size; /*!< Size (in bytes) of the stack dump */
} esp_core_dump_bt_info_t;
/**
* @brief RISC-V architecture specific extra information
*/
@ -27,9 +43,13 @@ typedef struct {
uint32_t mtvec; /* Machine Trap-Vector Base Address */
uint32_t mcause; /* Machine Trap Cause */
uint32_t mtval; /* Machine Trap Value */
uint32_t exc_a[8]; /*!< a register set when the exception caused */
uint32_t ra; /* Return Address */
uint32_t sp; /* Stack pointer */
uint32_t exc_a[8]; /* A0-A7 registers when the exception caused */
} esp_core_dump_summary_extra_info_t;
#endif /* CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF */
#ifdef __cplusplus
}
#endif

16
tools/sdk/esp32/include/espcoredump/include/port/xtensa/esp_core_dump_summary_extra_info.h → tools/sdk/esp32/include/espcoredump/include/port/xtensa/esp_core_dump_summary_port.h
View File

@ -12,6 +12,7 @@
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include "sdkconfig.h"
#include <stdint.h>
#include <xtensa/config/core-isa.h>
@ -20,8 +21,21 @@ extern "C"
{
#endif
#if CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF
#define EPCx_REGISTER_COUNT XCHAL_NUM_INTLEVELS
/**
* @brief Backtrace information.
*
* For Xtensa, backtrace can be generated on device due to windowed register ABI.
*/
typedef struct {
uint32_t bt[16]; /*!< Backtrace (array of PC) */
uint32_t depth; /*!< Number of backtrace entries */
bool corrupted; /*!< Status flag for backtrace is corrupt or not */
} esp_core_dump_bt_info_t;
/**
* @brief Xtensa architecture specific extra information
*/
@ -33,6 +47,8 @@ typedef struct {
uint8_t epcx_reg_bits; /*!< Bit mask of available EPCx registers */
} esp_core_dump_summary_extra_info_t;
#endif /* CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH && CONFIG_ESP_COREDUMP_DATA_FORMAT_ELF */
#ifdef __cplusplus
}
#endif

4
tools/sdk/esp32/include/freertos/include/freertos/FreeRTOSConfig.h
View File

@ -136,11 +136,7 @@
#define configTICK_RATE_HZ ( CONFIG_FREERTOS_HZ )
/* This has impact on speed of search for highest priority */
#ifdef SMALL_TEST
#define configMAX_PRIORITIES ( 7 )
#else
#define configMAX_PRIORITIES ( 25 )
#endif
/* Various things that impact minimum stack sizes */

6
tools/sdk/esp32/include/hal/esp32/include/hal/spi_flash_ll.h
View File

@ -402,6 +402,12 @@ static inline void spi_flash_ll_set_hold(spi_dev_t *dev, uint32_t hold_n)
dev->user.cs_hold = (hold_n > 0? 1: 0);
}
static inline void spi_flash_ll_set_cs_setup(spi_dev_t *dev, uint32_t cs_setup_time)
{
dev->user.cs_setup = (cs_setup_time > 0 ? 1 : 0);
dev->ctrl2.setup_time = cs_setup_time - 1;
}
#ifdef __cplusplus
}
#endif

2
tools/sdk/esp32/include/hal/esp32/include/hal/touch_sensor_ll.h
View File

@ -96,7 +96,7 @@ static inline void touch_ll_set_sleep_time(uint16_t sleep_time)
*/
static inline void touch_ll_get_sleep_time(uint16_t *sleep_time)
{
*sleep_time = SENS.sar_touch_ctrl1.touch_meas_delay;
*sleep_time = SENS.sar_touch_ctrl2.touch_sleep_cycles;
}
/**

6
tools/sdk/esp32/include/hal/include/hal/adc_types.h
View File

@ -56,9 +56,9 @@ typedef enum {
*/
typedef enum {
ADC_ATTEN_DB_0 = 0, /*!<No input attenumation, ADC can measure up to approx. 800 mV. */
ADC_ATTEN_DB_2_5 = 1, /*!<The input voltage of ADC will be attenuated, extending the range of measurement to up to approx. 1100 mV. */
ADC_ATTEN_DB_6 = 2, /*!<The input voltage of ADC will be attenuated, extending the range of measurement to up to approx. 1350 mV. */
ADC_ATTEN_DB_11 = 3, /*!<The input voltage of ADC will be attenuated, extending the range of measurement to up to approx. 2600 mV. */
ADC_ATTEN_DB_2_5 = 1, /*!<The input voltage of ADC will be attenuated extending the range of measurement by about 2.5 dB (1.33 x) */
ADC_ATTEN_DB_6 = 2, /*!<The input voltage of ADC will be attenuated extending the range of measurement by about 6 dB (2 x) */
ADC_ATTEN_DB_11 = 3, /*!<The input voltage of ADC will be attenuated extending the range of measurement by about 11 dB (3.55 x) */
ADC_ATTEN_MAX,
} adc_atten_t;

3
tools/sdk/esp32/include/hal/include/hal/spi_flash_hal.h
View File

@ -42,7 +42,7 @@ typedef struct {
int cs_num; ///< Which cs pin is used, 0-2.
struct {
uint8_t extra_dummy; ///< Pre-calculated extra dummy used for compensation
uint8_t reserved1; ///< Reserved, set to 0.
uint8_t cs_setup; ///< (cycles-1) of prepare phase by spi clock.
uint8_t cs_hold; ///< CS hold time config used by the host
uint8_t reserved2; ///< Reserved, set to 0.
};
@ -63,6 +63,7 @@ typedef struct {
int input_delay_ns; ///< Input delay on the MISO pin after the launch clock, used for timing compensation.
esp_flash_speed_t speed;///< SPI flash clock speed to work at.
uint32_t cs_hold; ///< CS hold time config used by the host
uint8_t cs_setup; ///< (cycles-1) of prepare phase by spi clock
bool auto_sus_en; ///< Auto suspend feature enable bit 1: enable, 0: disable.
} spi_flash_hal_config_t;

72
tools/sdk/esp32/include/hal/include/hal/usb_types_private.h Normal file
View File

@ -0,0 +1,72 @@
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
Note: This header file contains USB2.0 related types and macros that can be used by code specific to the DWC_OTG
controller (i.e., the HW specific layers of the USB host stack). Thus, this header is only meant to be used below (and
including) the HAL layer. For types and macros that are HW implementation agnostic (i.e., HCD layer and above), add them
to the "usb.h" header instead.
*/
#pragma once
#ifdef __cplusplus
extern "C"
{
#endif
/**
* @brief USB speeds supported by the DWC OTG controller
*/
typedef enum {
USB_PRIV_SPEED_FULL,
USB_PRIV_SPEED_LOW,
} usb_priv_speed_t;
/**
* @brief USB transfer types supported by the DWC OTG controller
*/
typedef enum {
USB_PRIV_XFER_TYPE_CTRL,
USB_PRIV_XFER_TYPE_ISOCHRONOUS,
USB_PRIV_XFER_TYPE_BULK,
USB_PRIV_XFER_TYPE_INTR,
} usb_priv_xfer_type_t;
/**
* @brief Enumeration of different possible lengths of the periodic frame list
*/
typedef enum {
USB_HAL_FRAME_LIST_LEN_8 = 8,
USB_HAL_FRAME_LIST_LEN_16 = 16,
USB_HAL_FRAME_LIST_LEN_32 = 32,
USB_HAL_FRAME_LIST_LEN_64 = 64,
} usb_hal_frame_list_len_t;
/**
* @brief Support intervals in number of USB frames (i.e., 1ms)
*/
typedef enum {
USB_HAL_INTERVAL_1 = 1,
USB_HAL_INTERVAL_2 = 2,
USB_HAL_INTERVAL_4 = 4,
USB_HAL_INTERVAL_8 = 8,
USB_HAL_INTERVAL_16 = 16,
USB_HAL_INTERVAL_32 = 32,
USB_HAL_INTERVAL_64 = 64,
} usb_hal_interval_t;
#ifdef __cplusplus
}
#endif

820
tools/sdk/esp32/include/hal/include/hal/usbh_hal.h Normal file
View File

@ -0,0 +1,820 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/*
NOTE: Thread safety is the responsibility fo the HAL user. All USB Host HAL
functions must be called from critical sections unless specified otherwise
*/
#include <stdlib.h>
#include <stddef.h>
#include "soc/usbh_struct.h"
#include "soc/usb_wrap_struct.h"
#include "hal/usbh_ll.h"
#include "hal/usb_types_private.h"
// ------------------------------------------------ Macros and Types ---------------------------------------------------
// ------------------ Constants/Configs --------------------
#define USBH_HAL_DMA_MEM_ALIGN 512
#define USBH_HAL_FRAME_LIST_MEM_ALIGN 512 //The frame list needs to be 512 bytes aligned (contrary to the databook)
#define USBH_HAL_NUM_CHAN 8
#define USBH_HAL_XFER_DESC_SIZE (sizeof(usbh_ll_dma_qtd_t))
#define USBH_HAL_FIFO_TOTAL_USABLE_LINES 200 //Although we have a 256 lines, only 200 lines are usuable due to EPINFO_CTL
/**
* @brief FIFO size configuration structure
*/
typedef struct {
uint32_t rx_fifo_lines; /**< Size of the RX FIFO in terms the number of FIFO lines */
uint32_t nptx_fifo_lines; /**< Size of the Non-periodic FIFO in terms the number of FIFO lines */
uint32_t ptx_fifo_lines; /**< Size of the Periodic FIFO in terms the number of FIFO lines */
} usbh_hal_fifo_config_t;
// --------------------- HAL States ------------------------
/**
* @brief Channel states
*/
typedef enum {
USBH_HAL_CHAN_STATE_HALTED = 0, /**< The channel is halted. No transfer descriptor list is being executed */
USBH_HAL_CHAN_STATE_ACTIVE, /**< The channel is active. A transfer descriptor list is being executed */
USBH_HAL_CHAN_STATE_ERROR, /**< The channel is in the error state */
} usbh_hal_chan_state_t;
// --------------------- HAL Events ------------------------
/**
* @brief Host port HAL events
*/
typedef enum {
USBH_HAL_PORT_EVENT_NONE, /**< No event occurred, or could not decode interrupt */
USBH_HAL_PORT_EVENT_CHAN, /**< A channel event has occurred. Call the the channel event handler instead */
USBH_HAL_PORT_EVENT_CONN, /**< The host port has detected a connection */
USBH_HAL_PORT_EVENT_DISCONN, /**< The host port has been disconnected */
USBH_HAL_PORT_EVENT_ENABLED, /**< The host port has been enabled (i.e., connected to a device that has been reset. Started sending SOFs) */
USBH_HAL_PORT_EVENT_DISABLED, /**< The host port has been disabled (no more SOFs). Could be due to disable/reset request, or a port error (e.g. port babble condition. See 11.8.1 of USB2.0 spec) */
USBH_HAL_PORT_EVENT_OVRCUR, /**< The host port has encountered an overcurrent condition */
USBH_HAL_PORT_EVENT_OVRCUR_CLR, /**< The host port has been cleared of the overcurrent condition */
} usbh_hal_port_event_t;
/**
* @brief Channel events
*/
typedef enum {
USBH_HAL_CHAN_EVENT_CPLT, /**< The channel has completed execution of a transfer descriptor that had the USBH_HAL_XFER_DESC_FLAG_HOC flag set. Channel is now halted */
USBH_HAL_CHAN_EVENT_ERROR, /**< The channel has encountered an error. Channel is now halted. */
USBH_HAL_CHAN_EVENT_HALT_REQ, /**< The channel has been successfully halted as requested */
USBH_HAL_CHAN_EVENT_NONE, /**< No event (interrupt ran for internal processing) */
} usbh_hal_chan_event_t;
// --------------------- HAL Errors ------------------------
/**
* @brief Channel errors
*/
typedef enum {
USBH_HAL_CHAN_ERROR_XCS_XACT = 0, /**< Excessive (three consecutive) transaction errors (e.g., no response, bad CRC etc */
USBH_HAL_CHAN_ERROR_BNA, /**< Buffer Not Available error (i.e., An inactive transfer descriptor was fetched by the channel) */
USBH_HAL_CHAN_ERROR_PKT_BBL, /**< Packet babbler error (packet exceeded MPS) */
USBH_HAL_CHAN_ERROR_STALL, /**< STALL response received */
} usbh_hal_chan_error_t;
// ------------- Transfer Descriptor Related ---------------
/**
* @brief Flags used to describe the type of transfer descriptor to fill
*/
#define USBH_HAL_XFER_DESC_FLAG_IN 0x01 /**< Indicates this transfer descriptor is of the IN direction */
#define USBH_HAL_XFER_DESC_FLAG_SETUP 0x02 /**< Indicates this transfer descriptor is an OUT setup */
#define USBH_HAL_XFER_DESC_FLAG_HOC 0x04 /**< Indicates that the channel will be halted after this transfer descriptor completes */
/**
* @brief Status value of a transfer descriptor
*
* A transfer descriptor's status remains unexecuted until the entire transfer descriptor completes (either successfully
* or an error). Therefore, if a channel halt is requested before a transfer descriptor completes, the transfer
* descriptor remains unexecuted.
*/
#define USBH_HAL_XFER_DESC_STS_SUCCESS USBH_LL_QTD_STATUS_SUCCESS
#define USBH_HAL_XFER_DESC_STS_PKTERR USBH_LL_QTD_STATUS_PKTERR
#define USBH_HAL_XFER_DESC_STS_BUFFER_ERR USBH_LL_QTD_STATUS_BUFFER
#define USBH_HAL_XFER_DESC_STS_NOT_EXECUTED USBH_LL_QTD_STATUS_NOT_EXECUTED
// -------------------- Object Types -----------------------
/**
* @brief Endpoint characteristics structure
*/
typedef struct {
union {
struct {
usb_priv_xfer_type_t type: 2; /**< The type of endpoint */
uint32_t bEndpointAddress: 8; /**< Endpoint address (containing endpoint number and direction) */
uint32_t mps: 11; /**< Maximum Packet Size */
uint32_t dev_addr: 8; /**< Device Address */
uint32_t ls_via_fs_hub: 1; /**< The endpoint is on a LS device that is routed through an FS hub.
Setting this bit will lead to the addition of the PREamble packet */
uint32_t reserved2: 2;
};
uint32_t val;
};
struct {
usb_hal_interval_t interval; /**< The interval of the endpoint */
uint32_t phase_offset_frames; /**< Phase offset in number of frames */
} periodic; /**< Characteristic for periodic (interrupt/isochronous) endpoints only */
} usbh_hal_ep_char_t;
/**
* @brief Channel object
*/
typedef struct {
//Channel control, status, and information
union {
struct {
uint32_t active: 1; /**< The channel is enabled */
uint32_t halt_requested: 1; /**< A halt has been requested */
uint32_t error_pending: 1; /**< The channel is waiting for the error to be handled */
uint32_t reserved: 1;
uint32_t chan_idx: 4; /**< The index number of the channel */
uint32_t reserved24: 24;
};
uint32_t val;
} flags; /**< Flags regarding channel's status and information */
usb_host_chan_regs_t *regs; /**< Pointer to the channel's register set */
usbh_hal_chan_error_t error; /**< The last error that occurred on the channel */
usb_priv_xfer_type_t type; /**< The transfer type of the channel */
void *chan_ctx; /**< Context variable for the owner of the channel */
} usbh_hal_chan_t;
/**
* @brief HAL context structure
*/
typedef struct {
//Context
usbh_dev_t *dev; /**< Pointer to base address of DWC_OTG registers */
usb_wrap_dev_t *wrap_dev; /**< Pointer to base address of USB Wrapper registers */
//Host Port related
uint32_t *periodic_frame_list; /**< Pointer to scheduling frame list */
usb_hal_frame_list_len_t frame_list_len; /**< Length of the periodic scheduling frame list */
union {
struct {
uint32_t dbnc_lock_enabled: 1; /**< Debounce lock enabled */
uint32_t fifo_sizes_set: 1; /**< Whether the FIFO sizes have been set or not */
uint32_t periodic_sched_enabled: 1; /**< Periodic scheduling (for interrupt and isochronous transfers) is enabled */
uint32_t reserved: 5;
uint32_t reserved24: 24;
};
uint32_t val;
} flags;
//Channel related
struct {
int num_allocd; /**< Number of channels currently allocated */
uint32_t chan_pend_intrs_msk; /**< Bit mask of channels with pending interrupts */
usbh_hal_chan_t *hdls[USBH_HAL_NUM_CHAN]; /**< Handles of each channel. Set to NULL if channel has not been allocated */
} channels;
} usbh_hal_context_t;
// -------------------------------------------------- Core (Global) ----------------------------------------------------
/**
* @brief Initialize the HAL context and check if DWC_OTG is alive
*
* Entry:
* - The peripheral must have been reset and clock un-gated
* - GPIO pins configured
* - Interrupt allocated but DISABLED (in case of an unknown interupt state)
* Exit:
* - Checks to see if DWC_OTG is alive, and if HW version/config is correct
* - HAl context initialized
* - Sets default values to some global and OTG registers (GAHBCFG and GUSBCFG)
* - Umask global interrupt signal
* - Put DWC_OTG into host mode. Require 25ms delay before this takes effect.
* - State -> USBH_HAL_PORT_STATE_OTG
* - Interrupts cleared. Users can now enable their ISR
*
* @param[inout] hal Context of the HAL layer
*/
void usbh_hal_init(usbh_hal_context_t *hal);
/**
* @brief Deinitialize the HAL context
*
* Entry:
* - All channels must be properly disabled, and any pending events handled
* Exit:
* - DWC_OTG global interrupt disabled
* - HAL context deinitialized
*
* @param hal Context of the HAL layer
*/
void usbh_hal_deinit(usbh_hal_context_t *hal);
/**
* @brief Issue a soft reset to the controller
*
* This should be called when the host port encounters an error event or has been disconnected. Before calling this,
* users are responsible for safely freeing all channels as a soft reset will wipe all host port and channel registers.
* This function will result in the host port being put back into same state as after calling usbh_hal_init().
*
* @note This has nothing to do with a USB bus reset. It simply resets the peripheral
*
* @param hal Context of the HAL layer
*/
void usbh_hal_core_soft_reset(usbh_hal_context_t *hal);
/**
* @brief Set FIFO sizes
*
* This function will set the sizes of each of the FIFOs (RX FIFO, Non-periodic TX FIFO, Periodic TX FIFO) and must be
* called at least once before allocating the channel. Based on the type of endpoints (and the endpionts' MPS), there
* may be situations where this function may need to be called again to resize the FIFOs. If resizing FIFOs dynamically,
* it is the user's responsibility to ensure there are no active channels when this function is called.
*
* @note The totol size of all the FIFOs must be less than or equal to USBH_HAL_FIFO_TOTAL_USABLE_LINES
* @note After a port reset, the FIFO size registers will reset to their default values, so this function must be called
* again post reset.
*
* @param hal Context of the HAL layer
* @param fifo_config FIFO configuration
*/
void usbh_hal_set_fifo_size(usbh_hal_context_t *hal, const usbh_hal_fifo_config_t *fifo_config);
// ---------------------------------------------------- Host Port ------------------------------------------------------
// ------------------ Host Port Control --------------------
/**
* @brief Initialize the host port
*
* - Will enable the host port's interrupts allowing port and channel events to occur
*
* @param hal Context of the HAL layer
*/
static inline void usbh_hal_port_init(usbh_hal_context_t *hal)
{
//Configure Host related interrupts
usbh_ll_haintmsk_dis_chan_intr(hal->dev, 0xFFFFFFFF); //Disable interrupts for all channels
usb_ll_en_intrs(hal->dev, USB_LL_INTR_CORE_PRTINT | USB_LL_INTR_CORE_HCHINT);
}
/**
* @brief Deinitialize the host port
*
* - Will disable the host port's interrupts preventing further port aand channel events from ocurring
*
* @param hal Context of the HAL layer
*/
static inline void usbh_hal_port_deinit(usbh_hal_context_t *hal)
{
//Disable Host port and channel interrupts
usb_ll_dis_intrs(hal->dev, USB_LL_INTR_CORE_PRTINT | USB_LL_INTR_CORE_HCHINT);
}
/**
* @brief Toggle the host port's power
*
* @param hal Context of the HAL layer
* @param power_on Whether to power ON or OFF the port
*/
static inline void usbh_hal_port_toggle_power(usbh_hal_context_t *hal, bool power_on)
{
if (power_on) {
usbh_ll_hprt_en_pwr(hal->dev);
} else {
usbh_ll_hprt_dis_pwr(hal->dev);
}
}
/**
* @brief Toggle reset signal on the bus
*
* The reset signal should be held for at least 10ms
* Entry:
* - Host port detects a device connection or Host port is already enabled
* Exit:
* - On release of the reset signal, a USBH_HAL_PORT_EVENT_ENABLED will be generated
*
* @note If the host port is already enabled, then issuing a reset will cause it be disabled and generate a
* USBH_HAL_PORT_EVENT_DISABLED event. The host port will not be enabled until the reset signal is released (thus
* generating the USBH_HAL_PORT_EVENT_ENABLED event)
*
* @param hal Context of the HAL layer
* @param enable Enable/disable reset signal
*/
static inline void usbh_hal_port_toggle_reset(usbh_hal_context_t *hal, bool enable)
{
assert(hal->channels.num_allocd == 0); //Cannot reset if there are still allocated channels
usbh_ll_hprt_set_port_reset(hal->dev, enable);
}
/**
* @brief Enable the host port
*
* Entry:
* - Host port enabled event triggered following a reset
* Exit:
* - Host port enabled to operate in scatter/gather DMA mode
* - DMA fifo sizes configured
*
* @param hal Context of the HAL layer
*/
void usbh_hal_port_enable(usbh_hal_context_t *hal);
/**
* @brief Disable the host port
*
* Exit:
* - Host port disabled event triggered
*
* @param hal Context of the HAL layer
*/
static inline void usbh_hal_port_disable(usbh_hal_context_t *hal)
{
usbh_ll_hprt_port_dis(hal->dev);
}
/**
* @brief Suspend the host port
*
* @param hal Context of the HAL layers
*/
static inline void usbh_hal_port_suspend(usbh_hal_context_t *hal)
{
usbh_ll_hprt_set_port_suspend(hal->dev);
}
/**
* @brief Toggle resume signal on the bus
*
* Hosts should hold the resume signal for at least 20ms
*
* @note If a remote wakeup event occurs, the resume signal is driven and cleared automatically.
*
* @param hal Context of the HAL layer
* @param enable Enable/disable resume signal
*/
static inline void usbh_hal_port_toggle_resume(usbh_hal_context_t *hal, bool enable)
{
if (enable) {
usbh_ll_hprt_set_port_resume(hal->dev);
} else {
usbh_ll_hprt_clr_port_resume(hal->dev);
}
}
/**
* @brief Check whether the resume signal is being driven
*
* If a remote wakeup event occurs, the core will automatically drive and clear the resume signal for the required
* amount of time. Call this function to check whether the resume signal has completed.
*
* @param hal Context of the HAL layer
* @return true Resume signal is still being driven
* @return false Resume signal is no longer driven
*/
static inline bool usbh_hal_port_check_resume(usbh_hal_context_t *hal)
{
return usbh_ll_hprt_get_port_resume(hal->dev);
}
// ---------------- Host Port Scheduling -------------------
/**
* @brief Sets the periodic scheduling frame list
*
* @note This function must be called before attempting configuring any channels to be period via
* usbh_hal_chan_set_ep_char()
*
* @param hal Context of the HAL layer
* @param frame_list Base address of the frame list
* @param frame_list_len Number of entries in the frame list (can only be 8, 16, 32, 64)
*/
static inline void usbh_hal_port_set_frame_list(usbh_hal_context_t *hal, uint32_t *frame_list, usb_hal_frame_list_len_t len)
{
assert(!hal->flags.periodic_sched_enabled);
//Clear and save frame list
hal->periodic_frame_list = frame_list;
hal->frame_list_len = len;
}
/**
* @brief Get the pointer to the periodic scheduling frame list
*
* @param hal Context of the HAL layer
* @return uint32_t* Base address of the periodic scheduling frame list
*/
static inline uint32_t *usbh_hal_port_get_frame_list(usbh_hal_context_t *hal)
{
return hal->periodic_frame_list;
}
/**
* @brief Enable periodic scheduling
*
* @note The periodic frame list must be set via usbh_hal_port_set_frame_list() should be set before calling this
* function
* @note This function must be called before activating any periodic channels
*
* @param hal Context of the HAL layer
*/
static inline void usbh_hal_port_periodic_enable(usbh_hal_context_t *hal)
{
assert(hal->periodic_frame_list != NULL && !hal->flags.periodic_sched_enabled);
usbh_ll_set_frame_list_base_addr(hal->dev, (uint32_t)hal->periodic_frame_list);
usbh_ll_hcfg_set_num_frame_list_entries(hal->dev, hal->frame_list_len);
usbh_ll_hcfg_en_perio_sched(hal->dev);
hal->flags.periodic_sched_enabled = 1;
}
/**
* @brief Disable periodic scheduling
*
* Disabling periodic scheduling will save a bit of DMA bandwith (as the controller will no longer fetch the schedule
* from the frame list).
*
* @note Before disabling periodic scheduling, it is the user's responsibility to ensure that all periodic channels have
* halted safely.
*
* @param hal Context of the HAL layer
*/
static inline void usbh_hal_port_periodic_disable(usbh_hal_context_t *hal)
{
assert(hal->flags.periodic_sched_enabled);
usbh_ll_hcfg_dis_perio_sched(hal->dev);
hal->flags.periodic_sched_enabled = 0;
}
static inline uint32_t usbh_hal_port_get_cur_frame_num(usbh_hal_context_t *hal)
{
return usbh_ll_get_frm_num(hal->dev);
}
// --------------- Host Port Status/State ------------------
/**
* @brief Check if a device is currently connected to the host port
*
* This function is intended to be called after one of the following events followed by an adequate debounce delay
* - USBH_HAL_PORT_EVENT_CONN
* - USBH_HAL_PORT_EVENT_DISCONN
*
* @note No other connection/disconnection event will occur again until the debounce lock is disabled via
* usbh_hal_disable_debounce_lock()
*
* @param hal Context of the HAL layer
* @return true A device is connected to the host port
* @return false A device is not connected to the host port
*/
static inline bool usbh_hal_port_check_if_connected(usbh_hal_context_t *hal)
{
return usbh_ll_hprt_get_conn_status(hal->dev);
}
/**
* @brief Check the speed (LS/FS) of the device connected to the host port
*
* @note This function should only be called after confirming that a device is connected to the host port
*
* @param hal Context of the HAL layer
* @return usb_priv_speed_t Speed of the connected device (FS or LS only on the esp32-s2 and esp32-s3)
*/
static inline usb_priv_speed_t usbh_hal_port_get_conn_speed(usbh_hal_context_t *hal)
{
return usbh_ll_hprt_get_speed(hal->dev);
}
/**
* @brief Disable the debounce lock
*
* This function must be called after calling usbh_hal_port_check_if_connected() and will allow connection/disconnection
* events to occur again. Any pending connection or disconenction interrupts are cleared.
*
* @param hal Context of the HAL layer
*/
static inline void usbh_hal_disable_debounce_lock(usbh_hal_context_t *hal)
{
hal->flags.dbnc_lock_enabled = 0;
//Clear Conenction and disconenction interrupt in case it triggered again
usb_ll_intr_clear(hal->dev, USB_LL_INTR_CORE_DISCONNINT);
usbh_ll_hprt_intr_clear(hal->dev, USBH_LL_INTR_HPRT_PRTENCHNG);
//Reenable the hprt (connection) and disconnection interrupts
usb_ll_en_intrs(hal->dev, USB_LL_INTR_CORE_PRTINT | USB_LL_INTR_CORE_DISCONNINT);
}
// ----------------------------------------------------- Channel -------------------------------------------------------
// ----------------- Channel Allocation --------------------
/**
* @brief Allocate a channel
*
* @param[in] hal Context of the HAL layer
* @param[inout] chan_obj Empty channel object
* @param[in] chan_ctx Context variable for the allocator of the channel
* @return true Channel successfully allocated
* @return false Failed to allocate channel
*/
bool usbh_hal_chan_alloc(usbh_hal_context_t *hal, usbh_hal_chan_t *chan_obj, void *chan_ctx);
/**
* @brief Free a channel
*
* @param[in] hal Context of the HAL layer
* @param[in] chan_obj Channel object
*/
void usbh_hal_chan_free(usbh_hal_context_t *hal, usbh_hal_chan_t *chan_obj);
// ---------------- Channel Configuration ------------------
/**
* @brief Get the context variable of the channel
*
* @param[in] chan_obj Channel object
* @return void* The context variable of the channel
*/
static inline void *usbh_hal_chan_get_context(usbh_hal_chan_t *chan_obj)
{
return chan_obj->chan_ctx;
}
/**
* @brief Get the current state of a channel
*
* @param chan_obj Channel object
* @return usbh_hal_chan_state_t State of the channel
*/
static inline usbh_hal_chan_state_t usbh_hal_chan_get_state(usbh_hal_chan_t *chan_obj)
{
if (chan_obj->flags.error_pending) {
return USBH_HAL_CHAN_STATE_ERROR;
} else if (chan_obj->flags.active) {
return USBH_HAL_CHAN_STATE_ACTIVE;
} else {
return USBH_HAL_CHAN_STATE_HALTED;
}
}
/**
* @brief Set the endpoint information for a particular channel
*
* This should be called when a channel switches target from one EP to another
*
* @note the channel must be in the disabled state in order to change its EP
* information
*
* @param hal Context of the HAL layer
* @param chan_obj Channel object
* @param ep_char Endpoint characteristics
*/
void usbh_hal_chan_set_ep_char(usbh_hal_context_t *hal, usbh_hal_chan_t *chan_obj, usbh_hal_ep_char_t *ep_char);
/**
* @brief Set the direction of the channel
*
* This is a convenience function to flip the direction of a channel without
* needing to reconfigure all of the channel's EP info. This is used primarily
* for control transfers.
*
* @note This function should only be called when the channel is halted
*
* @param chan_obj Channel object
* @param is_in Whether the direction is IN
*/
static inline void usbh_hal_chan_set_dir(usbh_hal_chan_t *chan_obj, bool is_in)
{
//Cannot change direction whilst channel is still active or in error
assert(!chan_obj->flags.active && !chan_obj->flags.error_pending);
usbh_ll_chan_set_dir(chan_obj->regs, is_in);
}
/**
* @brief Set the next Packet ID of the channel (e.g., DATA0/DATA1)
*
* This should be called when a channel switches target from one EP to another
* or when change stages for a control transfer
*
* @note The channel should only be called when the channel is in the
* halted state.
*
* @param chan_obj Channel object
* @param pid PID of the next DATA packet (DATA0 or DATA1)
*/
static inline void usbh_hal_chan_set_pid(usbh_hal_chan_t *chan_obj, int pid)
{
//Cannot change pid whilst channel is still active or in error
assert(!chan_obj->flags.active && !chan_obj->flags.error_pending);
//Update channel object and set the register
usbh_ll_chan_set_pid(chan_obj->regs, pid);
}
/**
* @brief Get the next PID of a channel
*
* Returns the next PID (DATA0 or DATA1) of the channel. This function should be
* used when the next PID of a pipe needs to be saved (e.g., when switching pipes
* on a channel)
*
* @param chan_obj Channel object
* @return uint32_t Starting PID of the next transfer (DATA0 or DATA1)
*/
static inline uint32_t usbh_hal_chan_get_pid(usbh_hal_chan_t *chan_obj)
{
assert(!chan_obj->flags.active && !chan_obj->flags.error_pending);
return usbh_ll_chan_get_pid(chan_obj->regs);
}
// ------------------- Channel Control ---------------------
/**
* @brief Activate a channel
*
* Activating a channel will cause the channel to start executing transfer descriptors.
*
* @note This function should only be called on channels that were previously halted
* @note An event will be generated when the channel is halted
*
* @param chan_obj Channel object
* @param xfer_desc_list A filled transfer descriptor list
* @param desc_list_len Transfer descriptor list length
* @param start_idx Index of the starting transfer descriptor in the list
*/
void usbh_hal_chan_activate(usbh_hal_chan_t *chan_obj, void *xfer_desc_list, int desc_list_len, int start_idx);
/**
* @brief Get the index of the current transfer descriptor
*
* @param chan_obj Channel object
* @return int Descriptor index
*/
static inline int usbh_hal_chan_get_qtd_idx(usbh_hal_chan_t *chan_obj)
{
return usbh_ll_chan_get_ctd(chan_obj->regs);
}
/**
* @brief Request to halt a channel
*
* This function should be called in order to halt a channel. If the channel is already halted, this function will
* return true. If the channel is still active, this function will return false and users must wait for the
* USBH_HAL_CHAN_EVENT_HALT_REQ event before treating the channel as halted.
*
* @note When a transfer is in progress (i.e., the channel is active) and a halt is requested, the channel will halt
* after the next USB packet is completed. If the transfer has more pending packets, the transfer will just be
* marked as USBH_HAL_XFER_DESC_STS_NOT_EXECUTED.
*
* @param chan_obj Channel object
* @return true The channel is already halted
* @return false The halt was requested, wait for USBH_HAL_CHAN_EVENT_HALT_REQ
*/
bool usbh_hal_chan_request_halt(usbh_hal_chan_t *chan_obj);
/**
* @brief Get a channel's error
*
* @param chan_obj Channel object
* @return usbh_hal_chan_error_t The type of error the channel has encountered
*/
static inline usbh_hal_chan_error_t usbh_hal_chan_get_error(usbh_hal_chan_t *chan_obj)
{
assert(chan_obj->flags.error_pending);
return chan_obj->error;
}
/**
* @brief Clear a channel of it's error
*
* @param chan_obj Channel object
*/
static inline void usbh_hal_chan_clear_error(usbh_hal_chan_t *chan_obj)
{
//Can only clear error when an error has occurred
assert(chan_obj->flags.error_pending);
chan_obj->flags.error_pending = 0;
}
// -------------------------------------------- Transfer Descriptor List -----------------------------------------------
/**
* @brief Fill a single entry in a transfer descriptor list
*
* - Depending on the transfer type, a single transfer descriptor may corresponds
* - A stage of a transfer (for control transfers)
* - A frame of a transfer interval (for interrupt and isoc)
* - An entire transfer (for bulk transfers)
* - Check the various USBH_HAL_XFER_DESC_FLAG_ flags for filling a specific type of descriptor
* - For IN transfer entries, set the USBH_HAL_XFER_DESC_FLAG_IN. The transfer size must also be an integer multiple of
* the endpoint's MPS
*
* @note Critical section is not required for this function
*
* @param desc_list Transfer descriptor list
* @param desc_idx Transfer descriptor index
* @param xfer_data_buff Transfer data buffer
* @param xfer_len Transfer length
* @param flags Transfer flags
*/
static inline void usbh_hal_xfer_desc_fill(void *desc_list, uint32_t desc_idx, uint8_t *xfer_data_buff, int xfer_len, uint32_t flags)
{
usbh_ll_dma_qtd_t *qtd_list = (usbh_ll_dma_qtd_t *)desc_list;
if (flags & USBH_HAL_XFER_DESC_FLAG_IN) {
usbh_ll_set_qtd_in(&qtd_list[desc_idx],
xfer_data_buff, xfer_len,
flags & USBH_HAL_XFER_DESC_FLAG_HOC);
} else {
usbh_ll_set_qtd_out(&qtd_list[desc_idx],
xfer_data_buff,
xfer_len,
flags & USBH_HAL_XFER_DESC_FLAG_HOC,
flags & USBH_HAL_XFER_DESC_FLAG_SETUP);
}
}
/**
* @brief Clear a transfer descriptor (sets all its fields to NULL)
*
* @param desc_list Transfer descriptor list
* @param desc_idx Transfer descriptor index
*/
static inline void usbh_hal_xfer_desc_clear(void *desc_list, uint32_t desc_idx)
{
usbh_ll_dma_qtd_t *qtd_list = (usbh_ll_dma_qtd_t *)desc_list;
usbh_ll_set_qtd_null(&qtd_list[desc_idx]);
}
/**
* @brief Parse a transfer decriptor's results
*
* @param desc_list Transfer descriptor list
* @param desc_idx Transfer descriptor index
* @param[out] xfer_rem_len Remaining length of the transfer in bytes
* @param[out] xfer_status Status of the transfer
*
* @note Critical section is not required for this function
*/
static inline void usbh_hal_xfer_desc_parse(void *desc_list, uint32_t desc_idx, int *xfer_rem_len, int *xfer_status)
{
usbh_ll_dma_qtd_t *qtd_list = (usbh_ll_dma_qtd_t *)desc_list;
usbh_ll_get_qtd_status(&qtd_list[desc_idx], xfer_rem_len, xfer_status);
//Clear the QTD to prevent it from being read again
usbh_ll_set_qtd_null(&qtd_list[desc_idx]);
}
// ------------------------------------------------- Event Handling ----------------------------------------------------
/**
* @brief Decode global and host port interrupts
*
* - Reads and clears global and host port interrupt registers
* - Decodes the interrupt bits to determine what host port event occurred
*
* @note This should be the first interrupt decode function to be run
*
* @param hal Context of the HAL layer
* @return usbh_hal_port_event_t Host port event
*/
usbh_hal_port_event_t usbh_hal_decode_intr(usbh_hal_context_t *hal);
/**
* @brief Gets the next channel with a pending interrupt
*
* If no channel is pending an interrupt, this function will return NULL. If one or more channels are pending an
* interrupt, this function returns one of the channel's objects. Call this function repeatedly until it returns NULL.
*
* @param hal Context of the HAL layer
* @return usbh_hal_chan_t* Channel object. NULL if no channel are pending an interrupt.
*/
usbh_hal_chan_t *usbh_hal_get_chan_pending_intr(usbh_hal_context_t *hal);
/**
* @brief Decode a particular channel's interrupt
*
* - Reads and clears the interrupt register of the channel
* - Returns the corresponding event for that channel
*
* @param chan_obj Channel object
* @return usbh_hal_chan_event_t Channel event
*/
usbh_hal_chan_event_t usbh_hal_chan_decode_intr(usbh_hal_chan_t *chan_obj);
#ifdef __cplusplus
}
#endif

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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stdbool.h>
#include "soc/usbh_struct.h"
#include "soc/usb_wrap_struct.h"
#include "hal/usb_types_private.h"
/* -----------------------------------------------------------------------------
------------------------------- Global Registers -------------------------------
----------------------------------------------------------------------------- */
/*
* Interrupt bit masks of the GINTSTS and GINTMSK registers
*/
#define USB_LL_INTR_CORE_WKUPINT (1 << 31)
#define USB_LL_INTR_CORE_SESSREQINT (1 << 30)
#define USB_LL_INTR_CORE_DISCONNINT (1 << 29)
#define USB_LL_INTR_CORE_CONIDSTSCHNG (1 << 28)
#define USB_LL_INTR_CORE_PTXFEMP (1 << 26)
#define USB_LL_INTR_CORE_HCHINT (1 << 25)
#define USB_LL_INTR_CORE_PRTINT (1 << 24)
#define USB_LL_INTR_CORE_RESETDET (1 << 23)
#define USB_LL_INTR_CORE_FETSUSP (1 << 22)
#define USB_LL_INTR_CORE_INCOMPIP (1 << 21)
#define USB_LL_INTR_CORE_INCOMPISOIN (1 << 20)
#define USB_LL_INTR_CORE_OEPINT (1 << 19)
#define USB_LL_INTR_CORE_IEPINT (1 << 18)
#define USB_LL_INTR_CORE_EPMIS (1 << 17)
#define USB_LL_INTR_CORE_EOPF (1 << 15)
#define USB_LL_INTR_CORE_ISOOUTDROP (1 << 14)
#define USB_LL_INTR_CORE_ENUMDONE (1 << 13)
#define USB_LL_INTR_CORE_USBRST (1 << 12)
#define USB_LL_INTR_CORE_USBSUSP (1 << 11)
#define USB_LL_INTR_CORE_ERLYSUSP (1 << 10)
#define USB_LL_INTR_CORE_GOUTNAKEFF (1 << 7)
#define USB_LL_INTR_CORE_GINNAKEFF (1 << 6)
#define USB_LL_INTR_CORE_NPTXFEMP (1 << 5)
#define USB_LL_INTR_CORE_RXFLVL (1 << 4)
#define USB_LL_INTR_CORE_SOF (1 << 3)
#define USB_LL_INTR_CORE_OTGINT (1 << 2)
#define USB_LL_INTR_CORE_MODEMIS (1 << 1)
#define USB_LL_INTR_CORE_CURMOD (1 << 0)
/*
* Bit mask of interrupt generating bits of the the HPRT register. These bits
* are ORd into the USB_LL_INTR_CORE_PRTINT interrupt.
*
* Note: Some fields of the HPRT are W1C (write 1 clear), this we cannot do a
* simple read and write-back to clear the HPRT interrupt bits. Instead we need
* a W1C mask the non-interrupt related bits
*/
#define USBH_LL_HPRT_W1C_MSK (0x2E)
#define USBH_LL_HPRT_ENA_MSK (0x04)
#define USBH_LL_INTR_HPRT_PRTOVRCURRCHNG (1 << 5)
#define USBH_LL_INTR_HPRT_PRTENCHNG (1 << 3)
#define USBH_LL_INTR_HPRT_PRTCONNDET (1 << 1)
/*
* Bit mask of channel interrupts (HCINTi and HCINTMSKi registers)
*
* Note: Under Scatter/Gather DMA mode, only the following interrupts can be unmasked
* - DESC_LS_ROLL
* - XCS_XACT_ERR (always unmasked)
* - BNAINTR
* - CHHLTD
* - XFERCOMPL
* The remaining interrupt bits will still be set (when the corresponding event occurs)
* but will not generate an interrupt. Therefore we must proxy through the
* USBH_LL_INTR_CHAN_CHHLTD interrupt to check the other interrupt bits.
*/
#define USBH_LL_INTR_CHAN_DESC_LS_ROLL (1 << 13)
#define USBH_LL_INTR_CHAN_XCS_XACT_ERR (1 << 12)
#define USBH_LL_INTR_CHAN_BNAINTR (1 << 11)
#define USBH_LL_INTR_CHAN_DATATGLERR (1 << 10)
#define USBH_LL_INTR_CHAN_FRMOVRUN (1 << 9)
#define USBH_LL_INTR_CHAN_BBLEER (1 << 8)
#define USBH_LL_INTR_CHAN_XACTERR (1 << 7)
#define USBH_LL_INTR_CHAN_NYET (1 << 6)
#define USBH_LL_INTR_CHAN_ACK (1 << 5)
#define USBH_LL_INTR_CHAN_NAK (1 << 4)
#define USBH_LL_INTR_CHAN_STALL (1 << 3)
#define USBH_LL_INTR_CHAN_AHBERR (1 << 2)
#define USBH_LL_INTR_CHAN_CHHLTD (1 << 1)
#define USBH_LL_INTR_CHAN_XFERCOMPL (1 << 0)
/*
* QTD (Queue Transfer Descriptor) structure used in Scatter/Gather DMA mode.
* Each QTD describes one transfer. Scatter gather mode will automatically split
* a transfer into multiple MPS packets. Each QTD is 64bits in size
*
* Note: The status information part of the QTD is interpreted differently depending
* on IN or OUT, and ISO or non-ISO
*/
typedef struct {
union {
struct {
uint32_t xfer_size: 17;
uint32_t aqtd_offset: 6;
uint32_t aqtd_valid: 1;
uint32_t reserved_24: 1;
uint32_t intr_cplt: 1;
uint32_t eol: 1;
uint32_t reserved_27: 1;
uint32_t rx_status: 2;
uint32_t reserved_30: 1;
uint32_t active: 1;
} in_non_iso;
struct {
uint32_t xfer_size: 12;
uint32_t reserved_12_24: 13;
uint32_t intr_cplt: 1;
uint32_t reserved_26_27: 2;
uint32_t rx_status: 2;
uint32_t reserved_30: 1;
uint32_t active: 1;
} in_iso;
struct {
uint32_t xfer_size: 17;
uint32_t reserved_17_23: 7;
uint32_t is_setup: 1;
uint32_t intr_cplt: 1;
uint32_t eol: 1;
uint32_t reserved_27: 1;
uint32_t tx_status: 2;
uint32_t reserved_30: 1;
uint32_t active: 1;
} out_non_iso;
struct {
uint32_t xfer_size: 12;
uint32_t reserved_12_24: 13;
uint32_t intr_cplt: 1;
uint32_t eol: 1;
uint32_t reserved_27: 1;
uint32_t tx_status: 2;
uint32_t reserved_30: 1;
uint32_t active: 1;
} out_iso;
uint32_t buffer_status_val;
};
uint8_t *buffer;
} usbh_ll_dma_qtd_t;
/* -----------------------------------------------------------------------------
------------------------------ USB Wrap Registers ------------------------------
----------------------------------------------------------------------------- */
/**
* @brief Configures the internal PHY to operate as HOST
*
* @param hw Start address of the USB Wrap registers
*/
static inline void usbh_ll_internal_phy_conf(usb_wrap_dev_t *hw)
{
//Enable internal PHY
hw->otg_conf.pad_enable = 1;
hw->otg_conf.phy_sel = 0;
//Set pulldowns on D+ and D-
hw->otg_conf.pad_pull_override = 1;
hw->otg_conf.dp_pulldown = 1;
hw->otg_conf.dm_pulldown = 1;
}
/* -----------------------------------------------------------------------------
------------------------------- Global Registers -------------------------------
----------------------------------------------------------------------------- */
// --------------------------- GAHBCFG Register --------------------------------
static inline void usb_ll_en_dma_mode(usbh_dev_t *hw)
{
hw->gahbcfg_reg.dmaen = 1;
}
static inline void usb_ll_en_slave_mode(usbh_dev_t *hw)
{
hw->gahbcfg_reg.dmaen = 0;
}
static inline void usb_ll_set_hbstlen(usbh_dev_t *hw, uint32_t burst_len)
{
hw->gahbcfg_reg.hbstlen = burst_len;
}
static inline void usb_ll_en_global_intr(usbh_dev_t *hw)
{
hw->gahbcfg_reg.glbllntrmsk = 1;
}
static inline void usb_ll_dis_global_intr(usbh_dev_t *hw)
{
hw->gahbcfg_reg.glbllntrmsk = 0;
}
// --------------------------- GUSBCFG Register --------------------------------
static inline void usb_ll_set_host_mode(usbh_dev_t *hw)
{
hw->gusbcfg_reg.forcehstmode = 1;
}
static inline void usb_ll_dis_hnp_cap(usbh_dev_t *hw)
{
hw->gusbcfg_reg.hnpcap = 0;
}
static inline void usb_ll_dis_srp_cap(usbh_dev_t *hw)
{
hw->gusbcfg_reg.srpcap = 0;
}
// --------------------------- GRSTCTL Register --------------------------------
static inline bool usb_ll_check_ahb_idle(usbh_dev_t *hw)
{
return hw->grstctl_reg.ahbidle;
}
static inline bool usb_ll_check_dma_req_in_progress(usbh_dev_t *hw)
{
return hw->grstctl_reg.dmareq;
}
static inline void usb_ll_flush_nptx_fifo(usbh_dev_t *hw)
{
hw->grstctl_reg.txfnum = 0; //Set the TX FIFO number to 0 to select the non-periodic TX FIFO
hw->grstctl_reg.txfflsh = 1; //Flush the selected TX FIFO
//Wait for the flushing to complete
while (hw->grstctl_reg.txfflsh) {
;
}
}
static inline void usb_ll_flush_ptx_fifo(usbh_dev_t *hw)
{
hw->grstctl_reg.txfnum = 1; //Set the TX FIFO number to 1 to select the periodic TX FIFO
hw->grstctl_reg.txfflsh = 1; //FLush the select TX FIFO
//Wait for the flushing to complete
while (hw->grstctl_reg.txfflsh) {
;
}
}
static inline void usb_ll_flush_rx_fifo(usbh_dev_t *hw)
{
hw->grstctl_reg.rxfflsh = 1;
//Wait for the flushing to complete
while (hw->grstctl_reg.rxfflsh) {
;
}
}
static inline void usb_ll_reset_frame_counter(usbh_dev_t *hw)
{
hw->grstctl_reg.frmcntrrst = 1;
}
static inline void usb_ll_core_soft_reset(usbh_dev_t *hw)
{
hw->grstctl_reg.csftrst = 1;
}
static inline bool usb_ll_check_core_soft_reset(usbh_dev_t *hw)
{
return hw->grstctl_reg.csftrst;
}
// --------------------------- GINTSTS Register --------------------------------
/**
* @brief Reads and clears the global interrupt register
*
* @param hw Start address of the DWC_OTG registers
* @return uint32_t Mask of interrupts
*/
static inline uint32_t usb_ll_intr_read_and_clear(usbh_dev_t *hw)
{
usb_gintsts_reg_t gintsts;
gintsts.val = hw->gintsts_reg.val;
hw->gintsts_reg.val = gintsts.val; //Write back to clear
return gintsts.val;
}
/**
* @brief Clear specific interrupts
*
* @param hw Start address of the DWC_OTG registers
* @param intr_msk Mask of interrupts to clear
*/
static inline void usb_ll_intr_clear(usbh_dev_t *hw, uint32_t intr_msk)
{
//All GINTSTS fields are either W1C or read only. So safe to write directly
hw->gintsts_reg.val = intr_msk;
}
// --------------------------- GINTMSK Register --------------------------------
static inline void usb_ll_en_intrs(usbh_dev_t *hw, uint32_t intr_mask)
{
hw->gintmsk_reg.val |= intr_mask;
}
static inline void usb_ll_dis_intrs(usbh_dev_t *hw, uint32_t intr_mask)
{
hw->gintmsk_reg.val &= ~intr_mask;
}
// --------------------------- GRXFSIZ Register --------------------------------
static inline void usb_ll_set_rx_fifo_size(usbh_dev_t *hw, uint32_t num_lines)
{
//Set size in words
hw->grxfsiz_reg.rxfdep = num_lines;
}
// -------------------------- GNPTXFSIZ Register -------------------------------
static inline void usb_ll_set_nptx_fifo_size(usbh_dev_t *hw, uint32_t addr, uint32_t num_lines)
{
usb_gnptxfsiz_reg_t gnptxfsiz;
gnptxfsiz.val = hw->gnptxfsiz_reg.val;
gnptxfsiz.nptxfstaddr = addr;
gnptxfsiz.nptxfdep = num_lines;
hw->gnptxfsiz_reg.val = gnptxfsiz.val;
}
static inline uint32_t usb_ll_get_controller_core_id(usbh_dev_t *hw)
{
return hw->gsnpsid_reg.val;
}
/**
* @brief Get the hardware configuration regiters of the DWC_OTG controller
*
* The hardware configuraiton regitsers are read only and indicate the various
* features of the DWC_OTG core.
*
* @param hw Start address of the DWC_OTG registers
* @param[out] ghwcfg1 Hardware configuration registesr 1
* @param[out] ghwcfg2 Hardware configuration registesr 2
* @param[out] ghwcfg3 Hardware configuration registesr 3
* @param[out] ghwcfg4 Hardware configuration registesr 4
*/
static inline void usb_ll_get_hardware_config(usbh_dev_t *hw, uint32_t *ghwcfg1, uint32_t *ghwcfg2, uint32_t *ghwcfg3, uint32_t *ghwcfg4)
{
*ghwcfg1 = hw->ghwcfg1_reg.val;
*ghwcfg2 = hw->ghwcfg2_reg.val;
*ghwcfg3 = hw->ghwcfg3_reg.val;
*ghwcfg4 = hw->ghwcfg4_reg.val;
}
// --------------------------- HPTXFSIZ Register -------------------------------
static inline void usbh_ll_set_ptx_fifo_size(usbh_dev_t *hw, uint32_t addr, uint32_t num_lines)
{
usb_hptxfsiz_reg_t hptxfsiz;
hptxfsiz.val = hw->hptxfsiz_reg.val;
hptxfsiz.ptxfstaddr = addr;
hptxfsiz.ptxfsize = num_lines;
hw->hptxfsiz_reg.val = hptxfsiz.val;
}
/* -----------------------------------------------------------------------------
-------------------------------- Host Registers --------------------------------
----------------------------------------------------------------------------- */
// ----------------------------- HCFG Register ---------------------------------
static inline void usbh_ll_hcfg_en_perio_sched(usbh_dev_t *hw)
{
hw->hcfg_reg.perschedena = 1;
}
static inline void usbh_ll_hcfg_dis_perio_sched(usbh_dev_t *hw)
{
hw->hcfg_reg.perschedena = 0;
}
/**
* Sets the length of the frame list
*
* @param num_entires Number of entires in the frame list
*/
static inline void usbh_ll_hcfg_set_num_frame_list_entries(usbh_dev_t *hw, usb_hal_frame_list_len_t num_entries)
{
uint32_t frlisten;
switch (num_entries) {
case USB_HAL_FRAME_LIST_LEN_8:
frlisten = 0;
break;
case USB_HAL_FRAME_LIST_LEN_16:
frlisten = 1;
break;
case USB_HAL_FRAME_LIST_LEN_32:
frlisten = 2;
break;
default: //USB_HAL_FRAME_LIST_LEN_64
frlisten = 3;
break;
}
hw->hcfg_reg.frlisten = frlisten;
}
static inline void usbh_ll_hcfg_en_scatt_gatt_dma(usbh_dev_t *hw)
{
hw->hcfg_reg.descdma = 1;
}
static inline void usbh_ll_hcfg_set_fsls_supp_only(usbh_dev_t *hw)
{
hw->hcfg_reg.fslssupp = 1;
}
static inline void usbh_ll_hcfg_set_fsls_pclk_sel(usbh_dev_t *hw)
{
hw->hcfg_reg.fslspclksel = 1;
}
/**
* @brief Sets some default values to HCFG to operate in Host mode with scatter/gather DMA
*
* @param hw Start address of the USB Wrap registers
* @param speed Speed to initialize the host port at
*/
static inline void usbh_ll_hcfg_set_defaults(usbh_dev_t *hw, usb_priv_speed_t speed)
{
hw->hcfg_reg.descdma = 1; //Enable scatt/gatt
hw->hcfg_reg.fslssupp = 1; //FS/LS support only
/*
Indicate to the OTG core what speed the PHY clock is at
Note: It seems like our PHY has an implicit 8 divider applied when in LS mode,
so the values of FSLSPclkSel and FrInt have to be adjusted accordingly.
*/
hw->hcfg_reg.fslspclksel = (speed == USB_PRIV_SPEED_FULL) ? 1 : 2; //PHY clock on esp32-sx for FS/LS-only
hw->hcfg_reg.perschedena = 0; //Disable perio sched
}
// ----------------------------- HFIR Register ---------------------------------
static inline void usbh_ll_hfir_set_defaults(usbh_dev_t *hw, usb_priv_speed_t speed)
{
usb_hfir_reg_t hfir;
hfir.val = hw->hfir_reg.val;
hfir.hfirrldctrl = 0; //Disable dynamic loading
/*
Set frame interval to be equal to 1ms
Note: It seems like our PHY has an implicit 8 divider applied when in LS mode,
so the values of FSLSPclkSel and FrInt have to be adjusted accordingly.
*/
hfir.frint = (speed == USB_PRIV_SPEED_FULL) ? 48000 : 6000; //esp32-sx targets only support FS or LS
hw->hfir_reg.val = hfir.val;
}
// ----------------------------- HFNUM Register --------------------------------
static inline uint32_t usbh_ll_get_frm_time_rem(usbh_dev_t *hw)
{
return hw->hfnum_reg.frrem;
}
static inline uint32_t usbh_ll_get_frm_num(usbh_dev_t *hw)
{
return hw->hfnum_reg.frnum;
}
// ---------------------------- HPTXSTS Register -------------------------------
static inline uint32_t usbh_ll_get_p_tx_queue_top(usbh_dev_t *hw)
{
return hw->hptxsts_reg.ptxqtop;
}
static inline uint32_t usbh_ll_get_p_tx_queue_space_avail(usbh_dev_t *hw)
{
return hw->hptxsts_reg.ptxqspcavail;
}
static inline uint32_t usbh_ll_get_p_tx_fifo_space_avail(usbh_dev_t *hw)
{
return hw->hptxsts_reg.ptxfspcavail;
}
// ----------------------------- HAINT Register --------------------------------
static inline uint32_t usbh_ll_get_chan_intrs_msk(usbh_dev_t *hw)
{
return hw->haint_reg.haint;
}
// --------------------------- HAINTMSK Register -------------------------------
static inline void usbh_ll_haintmsk_en_chan_intr(usbh_dev_t *hw, uint32_t mask)
{
hw->haintmsk_reg.val |= mask;
}
static inline void usbh_ll_haintmsk_dis_chan_intr(usbh_dev_t *hw, uint32_t mask)
{
hw->haintmsk_reg.val &= ~mask;
}
// --------------------------- HFLBAddr Register -------------------------------
/**
* @brief Set the base address of the scheduling frame list
*
* @note For some reason, this address must be 512 bytes aligned or else a bunch of frames will not be scheduled when
* the frame list rolls over. However, according to the databook, there is no mention of the HFLBAddr needing to
* be aligned.
*
* @param hw Start address of the DWC_OTG registers
* @param addr Base address of the scheduling frame list
*/
static inline void usbh_ll_set_frame_list_base_addr(usbh_dev_t *hw, uint32_t addr)
{
hw->hflbaddr_reg.hflbaddr = addr;
}
/**
* @brief Get the base address of the scheduling frame list
*
* @param hw Start address of the DWC_OTG registers
* @return uint32_t Base address of the scheduling frame list
*/
static inline uint32_t usbh_ll_get_frame_list_base_addr(usbh_dev_t *hw)
{
return hw->hflbaddr_reg.hflbaddr;
}
// ----------------------------- HPRT Register ---------------------------------
static inline usb_priv_speed_t usbh_ll_hprt_get_speed(usbh_dev_t *hw)
{
usb_priv_speed_t speed;
//esp32-s2 and esp32-s3 only support FS or LS
switch (hw->hprt_reg.prtspd) {
case 1:
speed = USB_PRIV_SPEED_FULL;
break;
default:
speed = USB_PRIV_SPEED_LOW;
break;
}
return speed;
}
static inline uint32_t usbh_ll_hprt_get_test_ctl(usbh_dev_t *hw)
{
return hw->hprt_reg.prttstctl;
}
static inline void usbh_ll_hprt_set_test_ctl(usbh_dev_t *hw, uint32_t test_mode)
{
usb_hprt_reg_t hprt;
hprt.val = hw->hprt_reg.val;
hprt.prttstctl = test_mode;
hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_W1C_MSK);
}
static inline void usbh_ll_hprt_en_pwr(usbh_dev_t *hw)
{
usb_hprt_reg_t hprt;
hprt.val = hw->hprt_reg.val;
hprt.prtpwr = 1;
hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_W1C_MSK);
}
static inline void usbh_ll_hprt_dis_pwr(usbh_dev_t *hw)
{
usb_hprt_reg_t hprt;
hprt.val = hw->hprt_reg.val;
hprt.prtpwr = 0;
hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_W1C_MSK);
}
static inline uint32_t usbh_ll_hprt_get_pwr_line_status(usbh_dev_t *hw)
{
return hw->hprt_reg.prtlnsts;
}
static inline void usbh_ll_hprt_set_port_reset(usbh_dev_t *hw, bool reset)
{
usb_hprt_reg_t hprt;
hprt.val = hw->hprt_reg.val;
hprt.prtrst = reset;
hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_W1C_MSK);
}
static inline bool usbh_ll_hprt_get_port_reset(usbh_dev_t *hw)
{
return hw->hprt_reg.prtrst;
}
static inline void usbh_ll_hprt_set_port_suspend(usbh_dev_t *hw)
{
usb_hprt_reg_t hprt;
hprt.val = hw->hprt_reg.val;
hprt.prtsusp = 1;
hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_W1C_MSK);
}
static inline bool usbh_ll_hprt_get_port_suspend(usbh_dev_t *hw)
{
return hw->hprt_reg.prtsusp;
}
static inline void usbh_ll_hprt_set_port_resume(usbh_dev_t *hw)
{
usb_hprt_reg_t hprt;
hprt.val = hw->hprt_reg.val;
hprt.prtres = 1;
hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_W1C_MSK);
}
static inline void usbh_ll_hprt_clr_port_resume(usbh_dev_t *hw)
{
usb_hprt_reg_t hprt;
hprt.val = hw->hprt_reg.val;
hprt.prtres = 0;
hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_W1C_MSK);
}
static inline bool usbh_ll_hprt_get_port_resume(usbh_dev_t *hw)
{
return hw->hprt_reg.prtres;
}
static inline bool usbh_ll_hprt_get_port_overcur(usbh_dev_t *hw)
{
return hw->hprt_reg.prtovrcurract;
}
static inline bool usbh_ll_hprt_get_port_en(usbh_dev_t *hw)
{
return hw->hprt_reg.prtena;
}
static inline void usbh_ll_hprt_port_dis(usbh_dev_t *hw)
{
usb_hprt_reg_t hprt;
hprt.val = hw->hprt_reg.val;
hprt.prtena = 1; //W1C to disable
//we want to W1C ENA but not W1C the interrupt bits
hw->hprt_reg.val = hprt.val & ((~USBH_LL_HPRT_W1C_MSK) | USBH_LL_HPRT_ENA_MSK);
}
static inline bool usbh_ll_hprt_get_conn_status(usbh_dev_t *hw)
{
return hw->hprt_reg.prtconnsts;
}
static inline uint32_t usbh_ll_hprt_intr_read_and_clear(usbh_dev_t *hw)
{
usb_hprt_reg_t hprt;
hprt.val = hw->hprt_reg.val;
//We want to W1C the interrupt bits but not that ENA
hw->hprt_reg.val = hprt.val & (~USBH_LL_HPRT_ENA_MSK);
//Return only the interrupt bits
return (hprt.val & (USBH_LL_HPRT_W1C_MSK & ~(USBH_LL_HPRT_ENA_MSK)));
}
static inline void usbh_ll_hprt_intr_clear(usbh_dev_t *hw, uint32_t intr_mask)
{
usb_hprt_reg_t hprt;
hprt.val = hw->hprt_reg.val;
hw->hprt_reg.val = ((hprt.val & ~USBH_LL_HPRT_ENA_MSK) & ~USBH_LL_HPRT_W1C_MSK) | intr_mask;
}
//Per Channel registers
// --------------------------- HCCHARi Register --------------------------------
static inline void usbh_ll_chan_start(volatile usb_host_chan_regs_t *chan)
{
chan->hcchar_reg.chena = 1;
}
static inline bool usbh_ll_chan_is_active(volatile usb_host_chan_regs_t *chan)
{
return chan->hcchar_reg.chena;
}
static inline void usbh_ll_chan_halt(volatile usb_host_chan_regs_t *chan)
{
chan->hcchar_reg.chdis = 1;
}
static inline void usbh_ll_chan_xfer_odd_frame(volatile usb_host_chan_regs_t *chan)
{
chan->hcchar_reg.oddfrm = 1;
}
static inline void usbh_ll_chan_xfer_even_frame(volatile usb_host_chan_regs_t *chan)
{
chan->hcchar_reg.oddfrm = 0;
}
static inline void usbh_ll_chan_set_dev_addr(volatile usb_host_chan_regs_t *chan, uint32_t addr)
{
chan->hcchar_reg.devaddr = addr;
}
static inline void usbh_ll_chan_set_ep_type(volatile usb_host_chan_regs_t *chan, usb_priv_xfer_type_t type)
{
uint32_t ep_type;
switch (type) {
case USB_PRIV_XFER_TYPE_CTRL:
ep_type = 0;
break;
case USB_PRIV_XFER_TYPE_ISOCHRONOUS:
ep_type = 1;
break;
case USB_PRIV_XFER_TYPE_BULK:
ep_type = 2;
break;
default: //USB_PRIV_XFER_TYPE_INTR
ep_type = 3;
break;
}
chan->hcchar_reg.eptype = ep_type;
}
//Indicates whether channel is commuunicating with a LS device connected via a FS hub. Setting this bit to 1 will cause
//each packet to be preceded by a PREamble packet
static inline void usbh_ll_chan_set_lspddev(volatile usb_host_chan_regs_t *chan, bool is_ls)
{
chan->hcchar_reg.lspddev = is_ls;
}
static inline void usbh_ll_chan_set_dir(volatile usb_host_chan_regs_t *chan, bool is_in)
{
chan->hcchar_reg.epdir = is_in;
}
static inline void usbh_ll_chan_set_ep_num(volatile usb_host_chan_regs_t *chan, uint32_t num)
{
chan->hcchar_reg.epnum = num;
}
static inline void usbh_ll_chan_set_mps(volatile usb_host_chan_regs_t *chan, uint32_t mps)
{
chan->hcchar_reg.mps = mps;
}
static inline void usbh_ll_chan_hcchar_init(volatile usb_host_chan_regs_t *chan, int dev_addr, int ep_num, int mps, usb_priv_xfer_type_t type, bool is_in, bool is_ls)
{
//Sets all persistent fields of the channel over its lifetimez
usbh_ll_chan_set_dev_addr(chan, dev_addr);
usbh_ll_chan_set_ep_type(chan, type);
usbh_ll_chan_set_lspddev(chan, is_ls);
usbh_ll_chan_set_dir(chan, is_in);
usbh_ll_chan_set_ep_num(chan, ep_num);
usbh_ll_chan_set_mps(chan, mps);
}
// ---------------------------- HCINTi Register --------------------------------
static inline uint32_t usbh_ll_chan_intr_read_and_clear(volatile usb_host_chan_regs_t *chan)
{
usb_hcint_reg_t hcint;
hcint.val = chan->hcint_reg.val;
chan->hcint_reg.val = hcint.val;
return hcint.val;
}
// --------------------------- HCINTMSKi Register ------------------------------
static inline void usbh_ll_chan_set_intr_mask(volatile usb_host_chan_regs_t *chan, uint32_t mask)
{
chan->hcintmsk_reg.val = mask;
}
// ---------------------- HCTSIZi and HCDMAi Registers -------------------------
static inline void usbh_ll_chan_set_pid(volatile usb_host_chan_regs_t *chan, uint32_t data_pid)
{
if (data_pid == 0) {
chan->hctsiz_reg.pid = 0;
} else {
chan->hctsiz_reg.pid = 2;
}
}
static inline uint32_t usbh_ll_chan_get_pid(volatile usb_host_chan_regs_t *chan) {
if (chan->hctsiz_reg.pid == 0) {
return 0; //DATA0
} else {
return 1; //DATA1
}
}
static inline void usbh_ll_chan_set_dma_addr_non_iso(volatile usb_host_chan_regs_t *chan,
void *dmaaddr,
uint32_t qtd_idx)
{
//Set HCDMAi
chan->hcdma_reg.val = 0;
chan->hcdma_reg.non_iso.dmaaddr = (((uint32_t)dmaaddr) >> 9) & 0x7FFFFF; //MSB of 512 byte aligned address
chan->hcdma_reg.non_iso.ctd = qtd_idx;
}
static inline void usbh_ll_chan_set_dma_addr_iso(volatile usb_host_chan_regs_t *chan,
void *dmaaddr,
uint32_t ntd)
{
int n;
if (ntd == 2) {
n = 4;
} else if (ntd == 4) {
n = 5;
} else if (ntd == 8) {
n = 6;
} else if (ntd == 16) {
n = 7;
} else if (ntd == 32) {
n = 8;
} else { //ntd == 64
n = 9;
}
//Set HCTSIZi
chan->hctsiz_reg.ntd = ntd -1;
chan->hctsiz_reg.sched_info = 0xFF; //Always set to 0xFF for FS
//Set HCDMAi
chan->hcdma_reg.iso.dmaaddr_ctd = (((uint32_t)dmaaddr) & 0x1FF) << (n-3); //ctd is set to 0
}
static inline int usbh_ll_chan_get_ctd(usb_host_chan_regs_t *chan)
{
return chan->hcdma_reg.non_iso.ctd;
}
static inline void usbh_ll_chan_hctsiz_init(volatile usb_host_chan_regs_t *chan)
{
chan->hctsiz_reg.dopng = 0; //Don't do ping
chan->hctsiz_reg.sched_info = 0xFF; //Schedinfo is always 0xFF for fullspeed. Not used in Bulk/Ctrl channels
}
static inline void usbh_ll_chan_set_qtd_list_len(volatile usb_host_chan_regs_t *chan, int qtd_list_len)
{
chan->hctsiz_reg.ntd = qtd_list_len - 1; //Set the length of the descriptor list
}
// ---------------------------- HCDMABi Register -------------------------------
static inline void *usbh_ll_chan_get_cur_buff_addr(volatile usb_host_chan_regs_t *chan)
{
return (void *)chan->hcdmab_reg.hcdmab;
}
/* -----------------------------------------------------------------------------
---------------------------- Scatter/Gather DMA QTDs ---------------------------
----------------------------------------------------------------------------- */
// ---------------------------- Helper Functions -------------------------------
/**
* @brief Get the base address of a channel's register based on the channel's index
*
* @param dev Start address of the DWC_OTG registers
* @param chan_idx The channel's index
* @return usb_host_chan_regs_t* Pointer to channel's registers
*/
static inline usb_host_chan_regs_t *usbh_ll_get_chan_regs(usbh_dev_t *dev, int chan_idx)
{
return &dev->host_chans[chan_idx];
}
// ------------------------------ QTD related ----------------------------------
#define USBH_LL_QTD_STATUS_SUCCESS 0x0 //If QTD was processed, it indicates the data was transmitted/received successfully
#define USBH_LL_QTD_STATUS_PKTERR 0x1 //Data trasnmitted/received with errors (CRC/Timeout/Stuff/False EOP/Excessive NAK).
//Note: 0x2 is reserved
#define USBH_LL_QTD_STATUS_BUFFER 0x3 //AHB error occurred.
#define USBH_LL_QTD_STATUS_NOT_EXECUTED 0x4 //QTD as never processed
/**
* @brief Set a QTD for a non isochronous IN transfer
*
* @param qtd Pointer to the QTD
* @param data_buff Pointer to buffer containing the data to transfer
* @param xfer_len Number of bytes in transfer. Setting 0 will do a zero length IN transfer.
* Non zero length must be mulitple of the endpoint's MPS.
* @param hoc Halt on complete (will generate an interrupt and halt the channel)
*/
static inline void usbh_ll_set_qtd_in(usbh_ll_dma_qtd_t *qtd, uint8_t *data_buff, int xfer_len, bool hoc)
{
qtd->buffer = data_buff; //Set pointer to data buffer
qtd->buffer_status_val = 0; //Reset all flags to zero
qtd->in_non_iso.xfer_size = xfer_len;
if (hoc) {
qtd->in_non_iso.intr_cplt = 1; //We need to set this to distinguish between a halt due to a QTD
qtd->in_non_iso.eol = 1; //Used to halt the channel at this qtd
}
qtd->in_non_iso.active = 1;
}
/**
* @brief Set a QTD for a non isochronous OUT transfer
*
* @param qtd Poitner to the QTD
* @param data_buff Pointer to buffer containing the data to transfer
* @param xfer_len Number of bytes to transfer. Setting 0 will do a zero length transfer.
* For ctrl setup packets, this should be set to 8.
* @param hoc Halt on complete (will generate an interrupt)
* @param is_setup Indicates whether this is a control transfer setup packet or a normal OUT Data transfer.
* (As per the USB protocol, setup packets cannot be STALLd or NAKd by the device)
*/
static inline void usbh_ll_set_qtd_out(usbh_ll_dma_qtd_t *qtd, uint8_t *data_buff, int xfer_len, bool hoc, bool is_setup)
{
qtd->buffer = data_buff; //Set pointer to data buffer
qtd->buffer_status_val = 0; //Reset all flags to zero
qtd->out_non_iso.xfer_size = xfer_len;
if (is_setup) {
qtd->out_non_iso.is_setup = 1;
}
if (hoc) {
qtd->in_non_iso.intr_cplt = 1; //We need to set this to distinguish between a halt due to a QTD
qtd->in_non_iso.eol = 1; //Used to halt the channel at this qtd
}
qtd->out_non_iso.active = 1;
}
/**
* @brief Set a QTD as NULL
*
* This sets the QTD to a value of 0. This is only useful when you need to insert
* blank QTDs into a list of QTDs
*
* @param qtd Pointer to the QTD
*/
static inline void usbh_ll_set_qtd_null(usbh_ll_dma_qtd_t *qtd)
{
qtd->buffer = NULL;
qtd->buffer_status_val = 0; //Disable qtd by clearing it to zero. Used by interrupt/isoc as an unscheudled frame
}
/**
* @brief Get the status of a QTD
*
* When a channel get's halted, call this to check whether each QTD was executed successfully
*
* @param qtd Poitner to the QTD
* @param[out] rem_len Number of bytes ramining in the QTD
* @param[out] status Status of the QTD
*/
static inline void usbh_ll_get_qtd_status(usbh_ll_dma_qtd_t *qtd, int *rem_len, int *status)
{
//Status is the same regardless of IN or OUT
if (qtd->in_non_iso.active) {
//QTD was never processed
*status = USBH_LL_QTD_STATUS_NOT_EXECUTED;
} else {
*status = qtd->in_non_iso.rx_status;
}
*rem_len = qtd->in_non_iso.xfer_size;
//Clear the QTD just for safety
qtd->buffer_status_val = 0;
}
#ifdef __cplusplus
}
#endif

5
tools/sdk/esp32/include/libsodium/port_include/sodium/version.h
View File

@ -1,3 +1,8 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef sodium_version_H
#define sodium_version_H

4
tools/sdk/esp32/include/log/include/esp_log.h
View File

@ -9,8 +9,10 @@
#include <stdint.h>
#include <stdarg.h>
#include "esp_rom_sys.h"
#include "sdkconfig.h"
#if !defined(CONFIG_IDF_TARGET_LINUX)
#include "esp_rom_sys.h"
#endif // !CONFIG_IDF_TARGET_LINUX
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/ets_sys.h" // will be removed in idf v5.0
#elif CONFIG_IDF_TARGET_ESP32S2

52
tools/sdk/esp32/include/lwip/port/esp32/include/netif/openthreadif.h Normal file
View File

@ -0,0 +1,52 @@
// Copyright 2021 Espressif Systems (Shanghai) CO LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License
#ifndef _OPENTHREAD_LWIP_IF_H_
#define _OPENTHREAD_LWIP_IF_H_
#include "lwip/netif.h"
#include "lwip/err.h"
#include "lwip/ip6.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief This function initializes the OpenThread lwIP network interface.
*
* @param[in] netif The lwIP interface to initialize
*
* @return
* - ERR_OK
*
*/
err_t openthread_netif_init(struct netif *netif);
/**
* @brief This function sends the buffer to the lwIP network interface
*
* @param[in] netif The lwIP interface to send to.
* @param[in] buffer The packet to send.
* @param[in] len The length of the buffer.
* @param[in] eb Unused.
*
*/
void openthread_netif_input(void *netif, void *buffer, size_t len, void *eb);
#ifdef __cplusplus
}
#endif
#endif /* _OPENTHREAD_LWIP_IF_H_ */

10
tools/sdk/esp32/include/soc/esp32/include/soc/soc_caps.h
View File

@ -102,6 +102,8 @@
#define SOC_CPU_WATCHPOINT_SIZE 64 // bytes
#define SOC_CPU_HAS_FPU 1
/*-------------------------- DAC CAPS ----------------------------------------*/
#define SOC_DAC_PERIPH_NUM 2
#define SOC_DAC_RESOLUTION 8 // DAC resolution ratio 8 bit
@ -282,3 +284,11 @@
# define CAN_BRP_DIV_SUPPORTED SOC_TWAI_BRP_DIV_SUPPORTED
# define CAN_BRP_DIV_THRESH SOC_TWAI_BRP_DIV_THRESH
#endif
/*-------------------------- SDMMC CAPS -----------------------------------------*/
/* On ESP32, clock/cmd/data pins use IO MUX.
* Card detect, write protect, interrupt use GPIO Matrix on all chips.
*/
#define SOC_SDMMC_USE_IOMUX 1
#define SOC_SDMMC_NUM_SLOTS 2

33
tools/sdk/esp32/include/soc/include/soc/lldesc.h
View File

@ -31,6 +31,24 @@
/** Maximum size of data in the buffer that a DMA descriptor can hold. */
#define LLDESC_MAX_NUM_PER_DESC (4096-4)
// Some DMA operations might impose certain alignment restrictions on the length
#define LLDESC_MAX_NUM_PER_DESC_16B_ALIGNED (4096 - 16)
#define LLDESC_MAX_NUM_PER_DESC_32B_ALIGNED (4096 - 32)
/**
* Generate a linked list pointing to a (huge) buffer in an descriptor array.
*
* The caller should ensure there is enough size to hold the array, by calling
* ``lldesc_get_required_num_constrained`` with the same max_desc_size argument.
*
* @param[out] out_desc_array Output of a descriptor array, the head should be fed to the DMA.
* @param buffer Buffer for the descriptors to point to.
* @param size Size (or length for TX) of the buffer
* @param max_desc_size Maximum length of each descriptor
* @param isrx The RX DMA may require the buffer to be word-aligned, set to true for a RX link, otherwise false.
*/
void lldesc_setup_link_constrained(lldesc_t *out_desc_array, const void *buffer, int size, int max_desc_size, bool isrx);
/**
* Generate a linked list pointing to a (huge) buffer in an descriptor array.
*
@ -42,7 +60,7 @@
* @param size Size (or length for TX) of the buffer
* @param isrx The RX DMA may require the buffer to be word-aligned, set to true for a RX link, otherwise false.
*/
void lldesc_setup_link(lldesc_t *out_desc_array, const void *buffer, int size, bool isrx);
#define lldesc_setup_link(out_desc_array, buffer, size, isrx) lldesc_setup_link_constrained(out_desc_array, buffer, size, LLDESC_MAX_NUM_PER_DESC, isrx)
/**
* @brief Get the received length of a linked list, until end of the link or eof.
@ -61,7 +79,16 @@ int lldesc_get_received_len(lldesc_t* head, lldesc_t** out_next);
*
* @return Numbers required.
*/
static inline int lldesc_get_required_num(int data_size)
static inline int lldesc_get_required_num_constrained(int data_size, int max_desc_size)
{
return (data_size + LLDESC_MAX_NUM_PER_DESC - 1) / LLDESC_MAX_NUM_PER_DESC;
return (data_size + max_desc_size - 1) / max_desc_size;
}
/**
* Get the number of descriptors required for a given buffer size.
*
* @param data_size Size to check descriptor num.
* @param max_desc_size Maximum length of each descriptor
* @return Numbers required.
*/
#define lldesc_get_required_num(data_size) lldesc_get_required_num_constrained(data_size, LLDESC_MAX_NUM_PER_DESC)

58
tools/sdk/esp32/include/soc/include/soc/sdmmc_periph.h
View File

@ -15,6 +15,7 @@
#pragma once
#include <stdint.h>
//include soc related (generated) definitions
#include "soc/soc_caps.h"
#include "soc/soc_pins.h"
#include "soc/sdmmc_reg.h"
#include "soc/sdmmc_struct.h"
@ -24,25 +25,50 @@
extern "C" {
#endif
/**
* Common SDMMC slot info, doesn't depend on SOC_SDMMC_USE_{IOMUX,GPIO_MATRIX}
*/
typedef struct {
uint8_t clk_gpio;
uint8_t cmd_gpio;
uint8_t d0_gpio;
uint8_t d1_gpio;
uint8_t d2_gpio;
uint8_t d3_gpio;
uint8_t d4_gpio;
uint8_t d5_gpio;
uint8_t d6_gpio;
uint8_t d7_gpio;
uint8_t card_detect;
uint8_t write_protect;
uint8_t card_int;
uint8_t width;
uint8_t width; /*!< Maximum supported slot width (1, 4, 8) */
uint8_t card_detect; /*!< Card detect signal in GPIO Matrix */
uint8_t write_protect; /*!< Write protect signal in GPIO Matrix */
uint8_t card_int; /*!< Card interrupt signal in GPIO Matrix */
} sdmmc_slot_info_t;
/** pin and signal information of each slot */
extern const sdmmc_slot_info_t sdmmc_slot_info[];
/** Width and GPIO matrix signal numbers for auxillary SD host signals, one structure per slot */
extern const sdmmc_slot_info_t sdmmc_slot_info[SOC_SDMMC_NUM_SLOTS];
/**
* This structure lists pin numbers (if SOC_SDMMC_USE_IOMUX is set)
* or GPIO Matrix signal numbers (if SOC_SDMMC_USE_GPIO_MATRIX is set)
* for the SD bus signals. Field names match SD bus signal names.
*/
typedef struct {
uint8_t clk;
uint8_t cmd;
uint8_t d0;
uint8_t d1;
uint8_t d2;
uint8_t d3;
uint8_t d4;
uint8_t d5;
uint8_t d6;
uint8_t d7;
} sdmmc_slot_io_info_t;
/* Note: it is in theory possible to have both IOMUX and GPIO Matrix supported
* in the same SoC. However this is not used on any SoC at this point, and would
* complicate the driver. Hence only one of these options is supported at a time.
*/
#if SOC_SDMMC_USE_IOMUX
/** GPIO pin numbers of SD bus signals, one structure per slot */
extern const sdmmc_slot_io_info_t sdmmc_slot_gpio_num[SOC_SDMMC_NUM_SLOTS];
#elif SOC_SDMMC_USE_GPIO_MATRIX
/** GPIO matrix signal numbers of SD bus signals, one structure per slot */
extern const sdmmc_slot_io_info_t sdmmc_slot_gpio_sig[SOC_SDMMC_NUM_SLOTS];
#endif // SOC_SDMMC_USE_{IOMUX,GPIO_MATRIX}
#ifdef __cplusplus
}

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