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https://github.com/0xFEEDC0DE64/arduino-esp32.git
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IDF master 1d7068e4b (#5257)
esp-dsp: master 7cc5073 esp-face: master 420fc7e esp-rainmaker: f1b82c7 esp32-camera: master 7a06a7e esp_littlefs: master b58f00c
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@ -31,6 +31,24 @@
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/** Maximum size of data in the buffer that a DMA descriptor can hold. */
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#define LLDESC_MAX_NUM_PER_DESC (4096-4)
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// Some DMA operations might impose certain alignment restrictions on the length
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#define LLDESC_MAX_NUM_PER_DESC_16B_ALIGNED (4096 - 16)
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#define LLDESC_MAX_NUM_PER_DESC_32B_ALIGNED (4096 - 32)
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/**
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* Generate a linked list pointing to a (huge) buffer in an descriptor array.
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*
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* The caller should ensure there is enough size to hold the array, by calling
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* ``lldesc_get_required_num_constrained`` with the same max_desc_size argument.
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*
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* @param[out] out_desc_array Output of a descriptor array, the head should be fed to the DMA.
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* @param buffer Buffer for the descriptors to point to.
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* @param size Size (or length for TX) of the buffer
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* @param max_desc_size Maximum length of each descriptor
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* @param isrx The RX DMA may require the buffer to be word-aligned, set to true for a RX link, otherwise false.
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*/
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void lldesc_setup_link_constrained(lldesc_t *out_desc_array, const void *buffer, int size, int max_desc_size, bool isrx);
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/**
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* Generate a linked list pointing to a (huge) buffer in an descriptor array.
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*
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@ -42,7 +60,7 @@
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* @param size Size (or length for TX) of the buffer
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* @param isrx The RX DMA may require the buffer to be word-aligned, set to true for a RX link, otherwise false.
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*/
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void lldesc_setup_link(lldesc_t *out_desc_array, const void *buffer, int size, bool isrx);
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#define lldesc_setup_link(out_desc_array, buffer, size, isrx) lldesc_setup_link_constrained(out_desc_array, buffer, size, LLDESC_MAX_NUM_PER_DESC, isrx)
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/**
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* @brief Get the received length of a linked list, until end of the link or eof.
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@ -61,7 +79,16 @@ int lldesc_get_received_len(lldesc_t* head, lldesc_t** out_next);
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*
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* @return Numbers required.
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*/
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static inline int lldesc_get_required_num(int data_size)
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static inline int lldesc_get_required_num_constrained(int data_size, int max_desc_size)
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{
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return (data_size + LLDESC_MAX_NUM_PER_DESC - 1) / LLDESC_MAX_NUM_PER_DESC;
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return (data_size + max_desc_size - 1) / max_desc_size;
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}
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/**
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* Get the number of descriptors required for a given buffer size.
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*
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* @param data_size Size to check descriptor num.
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* @param max_desc_size Maximum length of each descriptor
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* @return Numbers required.
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*/
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#define lldesc_get_required_num(data_size) lldesc_get_required_num_constrained(data_size, LLDESC_MAX_NUM_PER_DESC)
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@ -15,6 +15,7 @@
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#pragma once
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#include <stdint.h>
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//include soc related (generated) definitions
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#include "soc/soc_caps.h"
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#include "soc/soc_pins.h"
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#include "soc/sdmmc_reg.h"
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#include "soc/sdmmc_struct.h"
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@ -24,25 +25,50 @@
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extern "C" {
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#endif
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/**
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* Common SDMMC slot info, doesn't depend on SOC_SDMMC_USE_{IOMUX,GPIO_MATRIX}
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*/
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typedef struct {
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uint8_t clk_gpio;
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uint8_t cmd_gpio;
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uint8_t d0_gpio;
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uint8_t d1_gpio;
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uint8_t d2_gpio;
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uint8_t d3_gpio;
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uint8_t d4_gpio;
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uint8_t d5_gpio;
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uint8_t d6_gpio;
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uint8_t d7_gpio;
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uint8_t card_detect;
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uint8_t write_protect;
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uint8_t card_int;
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uint8_t width;
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uint8_t width; /*!< Maximum supported slot width (1, 4, 8) */
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uint8_t card_detect; /*!< Card detect signal in GPIO Matrix */
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uint8_t write_protect; /*!< Write protect signal in GPIO Matrix */
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uint8_t card_int; /*!< Card interrupt signal in GPIO Matrix */
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} sdmmc_slot_info_t;
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/** pin and signal information of each slot */
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extern const sdmmc_slot_info_t sdmmc_slot_info[];
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/** Width and GPIO matrix signal numbers for auxillary SD host signals, one structure per slot */
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extern const sdmmc_slot_info_t sdmmc_slot_info[SOC_SDMMC_NUM_SLOTS];
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/**
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* This structure lists pin numbers (if SOC_SDMMC_USE_IOMUX is set)
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* or GPIO Matrix signal numbers (if SOC_SDMMC_USE_GPIO_MATRIX is set)
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* for the SD bus signals. Field names match SD bus signal names.
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*/
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typedef struct {
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uint8_t clk;
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uint8_t cmd;
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uint8_t d0;
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uint8_t d1;
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uint8_t d2;
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uint8_t d3;
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uint8_t d4;
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uint8_t d5;
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uint8_t d6;
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uint8_t d7;
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} sdmmc_slot_io_info_t;
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/* Note: it is in theory possible to have both IOMUX and GPIO Matrix supported
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* in the same SoC. However this is not used on any SoC at this point, and would
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* complicate the driver. Hence only one of these options is supported at a time.
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*/
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#if SOC_SDMMC_USE_IOMUX
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/** GPIO pin numbers of SD bus signals, one structure per slot */
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extern const sdmmc_slot_io_info_t sdmmc_slot_gpio_num[SOC_SDMMC_NUM_SLOTS];
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#elif SOC_SDMMC_USE_GPIO_MATRIX
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/** GPIO matrix signal numbers of SD bus signals, one structure per slot */
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extern const sdmmc_slot_io_info_t sdmmc_slot_gpio_sig[SOC_SDMMC_NUM_SLOTS];
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#endif // SOC_SDMMC_USE_{IOMUX,GPIO_MATRIX}
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#ifdef __cplusplus
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}
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