IDF master 1d7068e4b (#5257)

esp-dsp: master 7cc5073
esp-face: master 420fc7e
esp-rainmaker: f1b82c7
esp32-camera: master 7a06a7e
esp_littlefs: master b58f00c
This commit is contained in:
Me No Dev
2021-06-09 13:12:47 +03:00
committed by GitHub
parent 7f87d0fc3a
commit 4f9e583b29
606 changed files with 6709 additions and 3956 deletions

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@ -31,6 +31,24 @@
/** Maximum size of data in the buffer that a DMA descriptor can hold. */
#define LLDESC_MAX_NUM_PER_DESC (4096-4)
// Some DMA operations might impose certain alignment restrictions on the length
#define LLDESC_MAX_NUM_PER_DESC_16B_ALIGNED (4096 - 16)
#define LLDESC_MAX_NUM_PER_DESC_32B_ALIGNED (4096 - 32)
/**
* Generate a linked list pointing to a (huge) buffer in an descriptor array.
*
* The caller should ensure there is enough size to hold the array, by calling
* ``lldesc_get_required_num_constrained`` with the same max_desc_size argument.
*
* @param[out] out_desc_array Output of a descriptor array, the head should be fed to the DMA.
* @param buffer Buffer for the descriptors to point to.
* @param size Size (or length for TX) of the buffer
* @param max_desc_size Maximum length of each descriptor
* @param isrx The RX DMA may require the buffer to be word-aligned, set to true for a RX link, otherwise false.
*/
void lldesc_setup_link_constrained(lldesc_t *out_desc_array, const void *buffer, int size, int max_desc_size, bool isrx);
/**
* Generate a linked list pointing to a (huge) buffer in an descriptor array.
*
@ -42,7 +60,7 @@
* @param size Size (or length for TX) of the buffer
* @param isrx The RX DMA may require the buffer to be word-aligned, set to true for a RX link, otherwise false.
*/
void lldesc_setup_link(lldesc_t *out_desc_array, const void *buffer, int size, bool isrx);
#define lldesc_setup_link(out_desc_array, buffer, size, isrx) lldesc_setup_link_constrained(out_desc_array, buffer, size, LLDESC_MAX_NUM_PER_DESC, isrx)
/**
* @brief Get the received length of a linked list, until end of the link or eof.
@ -61,7 +79,16 @@ int lldesc_get_received_len(lldesc_t* head, lldesc_t** out_next);
*
* @return Numbers required.
*/
static inline int lldesc_get_required_num(int data_size)
static inline int lldesc_get_required_num_constrained(int data_size, int max_desc_size)
{
return (data_size + LLDESC_MAX_NUM_PER_DESC - 1) / LLDESC_MAX_NUM_PER_DESC;
return (data_size + max_desc_size - 1) / max_desc_size;
}
/**
* Get the number of descriptors required for a given buffer size.
*
* @param data_size Size to check descriptor num.
* @param max_desc_size Maximum length of each descriptor
* @return Numbers required.
*/
#define lldesc_get_required_num(data_size) lldesc_get_required_num_constrained(data_size, LLDESC_MAX_NUM_PER_DESC)

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@ -15,6 +15,7 @@
#pragma once
#include <stdint.h>
//include soc related (generated) definitions
#include "soc/soc_caps.h"
#include "soc/soc_pins.h"
#include "soc/sdmmc_reg.h"
#include "soc/sdmmc_struct.h"
@ -24,25 +25,50 @@
extern "C" {
#endif
/**
* Common SDMMC slot info, doesn't depend on SOC_SDMMC_USE_{IOMUX,GPIO_MATRIX}
*/
typedef struct {
uint8_t clk_gpio;
uint8_t cmd_gpio;
uint8_t d0_gpio;
uint8_t d1_gpio;
uint8_t d2_gpio;
uint8_t d3_gpio;
uint8_t d4_gpio;
uint8_t d5_gpio;
uint8_t d6_gpio;
uint8_t d7_gpio;
uint8_t card_detect;
uint8_t write_protect;
uint8_t card_int;
uint8_t width;
uint8_t width; /*!< Maximum supported slot width (1, 4, 8) */
uint8_t card_detect; /*!< Card detect signal in GPIO Matrix */
uint8_t write_protect; /*!< Write protect signal in GPIO Matrix */
uint8_t card_int; /*!< Card interrupt signal in GPIO Matrix */
} sdmmc_slot_info_t;
/** pin and signal information of each slot */
extern const sdmmc_slot_info_t sdmmc_slot_info[];
/** Width and GPIO matrix signal numbers for auxillary SD host signals, one structure per slot */
extern const sdmmc_slot_info_t sdmmc_slot_info[SOC_SDMMC_NUM_SLOTS];
/**
* This structure lists pin numbers (if SOC_SDMMC_USE_IOMUX is set)
* or GPIO Matrix signal numbers (if SOC_SDMMC_USE_GPIO_MATRIX is set)
* for the SD bus signals. Field names match SD bus signal names.
*/
typedef struct {
uint8_t clk;
uint8_t cmd;
uint8_t d0;
uint8_t d1;
uint8_t d2;
uint8_t d3;
uint8_t d4;
uint8_t d5;
uint8_t d6;
uint8_t d7;
} sdmmc_slot_io_info_t;
/* Note: it is in theory possible to have both IOMUX and GPIO Matrix supported
* in the same SoC. However this is not used on any SoC at this point, and would
* complicate the driver. Hence only one of these options is supported at a time.
*/
#if SOC_SDMMC_USE_IOMUX
/** GPIO pin numbers of SD bus signals, one structure per slot */
extern const sdmmc_slot_io_info_t sdmmc_slot_gpio_num[SOC_SDMMC_NUM_SLOTS];
#elif SOC_SDMMC_USE_GPIO_MATRIX
/** GPIO matrix signal numbers of SD bus signals, one structure per slot */
extern const sdmmc_slot_io_info_t sdmmc_slot_gpio_sig[SOC_SDMMC_NUM_SLOTS];
#endif // SOC_SDMMC_USE_{IOMUX,GPIO_MATRIX}
#ifdef __cplusplus
}