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Fixes UART pin setting + adds CTS/RTS HW Flow Control (#6272)

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* fixes setPins and begin to keep rx/tx unmodified

* adds Hardware Flow Control mode and CTS/RTS pin setting

* adds Hardware Flow Control mode and CTS/RTS pin setting

* adds Hardware Flow Control mode and CTS/RTS pin setting

* adds Hardware Flow Control mode and CTS/RTS pin setting

* Code Review
This commit is contained in:
Rodrigo Garcia
2022-02-16 22:28:46 -03:00
committed by GitHub
parent 01303b700d
commit 50e9772ecf
4 changed files with 75 additions and 30 deletions
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26
cores/esp32/esp32-hal-uart.c
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@ -155,15 +155,27 @@ bool uartIsDriverInstalled(uart_t* uart)
return false;
}
void uartSetPins(uart_t* uart, uint8_t rxPin, uint8_t txPin)
// Valid pin UART_PIN_NO_CHANGE is defined to (-1)
// Negative Pin Number will keep it unmodified, thus this function can set individual pins
void uartSetPins(uart_t* uart, int8_t rxPin, int8_t txPin, int8_t ctsPin, int8_t rtsPin)
{
if(uart == NULL || rxPin >= SOC_GPIO_PIN_COUNT || txPin >= SOC_GPIO_PIN_COUNT) {
if(uart == NULL) {
return;
}
UART_MUTEX_LOCK();
ESP_ERROR_CHECK(uart_set_pin(uart->num, txPin, rxPin, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
UART_MUTEX_UNLOCK();
// IDF uart_set_pin() will issue necessary Error Message and take care of all GPIO Number validation.
uart_set_pin(uart->num, txPin, rxPin, ctsPin, rtsPin);
UART_MUTEX_UNLOCK();
}
//
void uartSetHwFlowCtrlMode(uart_t *uart, uint8_t mode, uint8_t threshold) {
if(uart == NULL) {
return;
}
// IDF will issue corresponding error message when mode or threshold are wrong and prevent crashing
// IDF will check (mode > HW_FLOWCTRL_CTS_RTS || threshold >= SOC_UART_FIFO_LEN)
uart_set_hw_flow_ctrl(uart->num, (uart_hw_flowcontrol_t) mode, threshold);
}
@ -173,10 +185,6 @@ uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rx
return NULL;
}
if(rxPin == -1 && txPin == -1) {
return NULL;
}
uart_t* uart = &_uart_bus_array[uart_nr];
if (uart_is_driver_installed(uart_nr)) {