mirror of
https://github.com/0xFEEDC0DE64/arduino-esp32.git
synced 2025-07-01 21:10:58 +02:00
update idf libs
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@ -29,6 +29,16 @@
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#define EFUSE_RD_EFUSE_RD_DIS_M ((EFUSE_RD_EFUSE_RD_DIS_V)<<(EFUSE_RD_EFUSE_RD_DIS_S))
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#define EFUSE_RD_EFUSE_RD_DIS_V 0xF
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#define EFUSE_RD_EFUSE_RD_DIS_S 16
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/* Read disable bits for efuse blocks 1-3 */
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#define EFUSE_RD_DIS_BLK1 (1<<16)
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#define EFUSE_RD_DIS_BLK2 (1<<17)
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#define EFUSE_RD_DIS_BLK3 (1<<18)
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/* Read disable FLASH_CRYPT_CONFIG, CODING_SCHEME & KEY_STATUS
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in efuse block 0
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*/
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#define EFUSE_RD_DIS_BLK0_PARTIAL (1<<19)
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/* EFUSE_RD_EFUSE_WR_DIS : RO ;bitpos:[15:0] ;default: 16'b0 ; */
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/*description: read for efuse_wr_disable*/
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#define EFUSE_RD_EFUSE_WR_DIS 0x0000FFFF
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@ -36,6 +46,22 @@
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#define EFUSE_RD_EFUSE_WR_DIS_V 0xFFFF
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#define EFUSE_RD_EFUSE_WR_DIS_S 0
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/* Write disable bits */
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#define EFUSE_WR_DIS_RD_DIS (1<<0) /*< disable writing read disable reg */
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#define EFUSE_WR_DIS_WR_DIS (1<<1) /*< disable writing write disable reg */
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#define EFUSE_WR_DIS_FLASH_CRYPT_CNT (1<<2)
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#define EFUSE_WR_DIS_MAC_SPI_CONFIG_HD (1<<3) /*< disable writing MAC & SPI config hd efuses */
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#define EFUSE_WR_DIS_XPD_SDIO (1<<5) /*< disable writing SDIO config efuses */
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#define EFUSE_WR_DIS_SPI_PAD_CONFIG (1<<6) /*< disable writing SPI_PAD_CONFIG efuses */
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#define EFUSE_WR_DIS_BLK1 (1<<7) /*< disable writing BLK1 efuses */
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#define EFUSE_WR_DIS_BLK2 (1<<8) /*< disable writing BLK2 efuses */
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#define EFUSE_WR_DIS_BLK3 (1<<9) /*< disable writing BLK3 efuses */
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#define EFUSE_WR_DIS_FLASH_CRYPT_CODING_SCHEME (1<<10) /*< disable writing FLASH_CRYPT_CONFIG and CODING_SCHEME efuses */
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#define EFUSE_WR_DIS_ABS_DONE_0 (1<<12) /*< disable writing ABS_DONE_0 efuse */
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#define EFUSE_WR_DIS_ABS_DONE_1 (1<<13) /*< disable writing ABS_DONE_1 efuse */
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#define EFUSE_WR_DIS_JTAG_DISABLE (1<<14) /*< disable writing JTAG_DISABLE efuse */
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#define EFUSE_WR_DIS_CONSOLE_DL_DISABLE (1<<15) /*< disable writing CONSOLE_DEBUG_DISABLE, DISABLE_DL_ENCRYPT, DISABLE_DL_DECRYPT and DISABLE_DL_CACHE efuses */
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#define EFUSE_BLK0_RDATA1_REG (DR_REG_EFUSE_BASE + 0x004)
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/* EFUSE_RD_WIFI_MAC_CRC_LOW : RO ;bitpos:[31:0] ;default: 32'b0 ; */
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/*description: read for low 32bit WIFI_MAC_Address*/
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@ -34,10 +34,41 @@
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#define PIN_INPUT_ENABLE(PIN_NAME) SET_PERI_REG_MASK(PIN_NAME,FUN_IE)
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#define PIN_INPUT_DISABLE(PIN_NAME) CLEAR_PERI_REG_MASK(PIN_NAME,FUN_IE)
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#define PIN_SET_DRV(PIN_NAME, drv) REG_SET_FIELD(PIN_NAME, FUN_DRV, (drv));
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#define PIN_PULLUP_DIS(PIN_NAME) REG_CLR_BIT(PIN_NAME, FUN_PU)
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#define PIN_PULLUP_EN(PIN_NAME) REG_SET_BIT(PIN_NAME, FUN_PU)
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#define PIN_PULLDWN_DIS(PIN_NAME) REG_CLR_BIT(PIN_NAME, FUN_PD)
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#define PIN_PULLDWN_EN(PIN_NAME) REG_SET_BIT(PIN_NAME, FUN_PD)
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/*
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* @attention
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* The PIN_PULL[UP|DWN]_[EN|DIS]() functions used to exist as macros in previous SDK versions.
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* Unfortunately, however, they do not work for some GPIOs on the ESP32 chip, which needs pullups
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* and -downs turned on and off through RTC registers. The functions still exist for compatibility
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* with older code, but are marked as deprecated in order to generate a warning.
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* Please replace them in this fashion: (make sure to include driver/gpio.h as well)
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* PIN_PULLUP_EN(GPIO_PIN_MUX_REG[x]) -> gpio_pullup_en(x)
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* PIN_PULLUP_DIS(GPIO_PIN_MUX_REG[x]) -> gpio_pullup_dis(x)
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* PIN_PULLDWN_EN(GPIO_PIN_MUX_REG[x]) -> gpio_pulldown_en(x)
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* PIN_PULLDWN_DIS(GPIO_PIN_MUX_REG[x]) -> gpio_pulldown_dis(x)
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*
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*/
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static inline void __attribute__ ((deprecated)) PIN_PULLUP_DIS(uint32_t PIN_NAME)
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{
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REG_CLR_BIT(PIN_NAME, FUN_PU);
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}
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static inline void __attribute__ ((deprecated)) PIN_PULLUP_EN(uint32_t PIN_NAME)
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{
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REG_SET_BIT(PIN_NAME, FUN_PU);
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}
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static inline void __attribute__ ((deprecated)) PIN_PULLDWN_DIS(uint32_t PIN_NAME)
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{
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REG_CLR_BIT(PIN_NAME, FUN_PD);
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}
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static inline void __attribute__ ((deprecated)) PIN_PULLDWN_EN(uint32_t PIN_NAME)
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{
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REG_SET_BIT(PIN_NAME, FUN_PD);
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}
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#define PIN_FUNC_SELECT(PIN_NAME, FUNC) REG_SET_FIELD(PIN_NAME, MCU_SEL, FUNC)
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#define PIN_FUNC_GPIO 2
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