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https://github.com/0xFEEDC0DE64/arduino-esp32.git
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Update IDF to 1c3dd23
* Update mDNS and LEDC * update toolchain * Update IDF to 1c3dd23 * Advertise the board variant for Arduino OTA * Add generic variant definition for mDNS
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@ -37,13 +37,13 @@ extern "C" {
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*/
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//Keep the LEVELx values as they are here; they match up with (1<<level)
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#define ESP_INTR_FLAG_LEVEL1 (1<<1) ///< Accept a Level 1 interrupt vector
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#define ESP_INTR_FLAG_LEVEL1 (1<<1) ///< Accept a Level 1 interrupt vector (lowest priority)
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#define ESP_INTR_FLAG_LEVEL2 (1<<2) ///< Accept a Level 2 interrupt vector
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#define ESP_INTR_FLAG_LEVEL3 (1<<3) ///< Accept a Level 3 interrupt vector
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#define ESP_INTR_FLAG_LEVEL4 (1<<4) ///< Accept a Level 4 interrupt vector
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#define ESP_INTR_FLAG_LEVEL5 (1<<5) ///< Accept a Level 5 interrupt vector
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#define ESP_INTR_FLAG_LEVEL6 (1<<6) ///< Accept a Level 6 interrupt vector
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#define ESP_INTR_FLAG_NMI (1<<7) ///< Accept a Level 7 interrupt vector
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#define ESP_INTR_FLAG_NMI (1<<7) ///< Accept a Level 7 interrupt vector (highest priority)
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#define ESP_INTR_FLAG_SHARED (1<<8) ///< Interrupt can be shared between ISRs
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#define ESP_INTR_FLAG_EDGE (1<<9) ///< Edge-triggered interrupt
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#define ESP_INTR_FLAG_IRAM (1<<10) ///< ISR can be called if cache is disabled
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@ -248,8 +248,8 @@ int esp_intr_get_intno(intr_handle_t handle);
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esp_err_t esp_intr_disable(intr_handle_t handle);
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/**
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* @brief Ensable the interrupt associated with the handle
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*
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* @brief Enable the interrupt associated with the handle
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*
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* @note For local interrupts (ESP_INTERNAL_* sources), this function has to be called on the
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* CPU the interrupt is allocated on. Other interrupts have no such restriction.
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*
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@ -260,6 +260,19 @@ esp_err_t esp_intr_disable(intr_handle_t handle);
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*/
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esp_err_t esp_intr_enable(intr_handle_t handle);
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/**
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* @brief Set the "in IRAM" status of the handler.
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*
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* @note Does not work on shared interrupts.
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*
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* @param handle The handle, as obtained by esp_intr_alloc or esp_intr_alloc_intrstatus
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* @param is_in_iram Whether the handler associated with this handle resides in IRAM.
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* Handlers residing in IRAM can be called when cache is disabled.
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*
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* @return ESP_ERR_INVALID_ARG if the combination of arguments is invalid.
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* ESP_OK otherwise
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*/
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esp_err_t esp_intr_set_in_iram(intr_handle_t handle, bool is_in_iram);
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/**
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* @brief Disable interrupts that aren't specifically marked as running from IRAM
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@ -20,11 +20,11 @@
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @cond */
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typedef void (*esp_ipc_func_t)(void* arg);
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/**
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* @brief Inter-processor call APIs
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/** @endcond */
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/*
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* Inter-processor call APIs
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*
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* FreeRTOS provides several APIs which can be used to communicate between
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* different tasks, including tasks running on different CPUs.
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@ -34,8 +34,9 @@ typedef void (*esp_ipc_func_t)(void* arg);
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*/
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/**
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* @brief Initialize inter-processor call module.
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/*
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* Initialize inter-processor call module. This function is called automatically
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* on CPU start and should not be called from the application.
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*
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* This function start two tasks, one on each CPU. These tasks are started
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* with high priority. These tasks are normally inactive, waiting until one of
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@ -43,51 +44,59 @@ typedef void (*esp_ipc_func_t)(void* arg);
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* woken up to execute the callback provided to esp_ipc_call_nonblocking or
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* esp_ipc_call_blocking.
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*/
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/** @cond */
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void esp_ipc_init();
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/** @endcond */
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/**
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* @brief Execute function on the given CPU
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* @brief Execute a function on the given CPU
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*
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* This will wake a high-priority task on CPU indicated by cpu_id argument,
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* and run func(arg) in the context of that task.
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* This function returns as soon as the high-priority task is woken up.
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* If another IPC call is already being executed, this function will also wait
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* for it to complete.
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* Run a given function on a particular CPU. The given function must accept a
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* void* argument and return void. The given function is run in the context of
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* the IPC task of the CPU specified by the cpu_id parameter. The calling task
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* will be blocked until the IPC task begins executing the given function. If
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* another IPC call is ongoing, the calling task will block until the other IPC
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* call completes. The stack size allocated for the IPC task can be configured
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* in the "Inter-Processor Call (IPC) task stack size" setting in menuconfig.
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* Increase this setting if the given function requires more stack than default.
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*
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* In single-core mode, returns ESP_ERR_INVALID_ARG for cpu_id 1.
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* @note In single-core mode, returns ESP_ERR_INVALID_ARG for cpu_id 1.
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*
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* For complex functions, you may need to increase the stack size of the "IPC task"
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* which runs the function must be sufficient. See the "Inter-Processor Call (IPC)
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* task stack size" setting in menuconfig.
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* @param[in] cpu_id CPU where the given function should be executed (0 or 1)
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* @param[in] func Pointer to a function of type void func(void* arg) to be executed
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* @param[in] arg Arbitrary argument of type void* to be passed into the function
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*
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* @param cpu_id CPU where function should be executed (0 or 1)
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* @param func pointer to a function which should be executed
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* @param arg arbitrary argument to be passed into function
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*
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* @return ESP_ERR_INVALID_ARG if cpu_id is invalid
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* ESP_ERR_INVALID_STATE if FreeRTOS scheduler is not running
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* ESP_OK otherwise
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* @return
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* - ESP_ERR_INVALID_ARG if cpu_id is invalid
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* - ESP_ERR_INVALID_STATE if the FreeRTOS scheduler is not running
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* - ESP_OK otherwise
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*/
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esp_err_t esp_ipc_call(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
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/**
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* @brief Execute function on the given CPU and wait for it to finish
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* @brief Execute a function on the given CPU and blocks until it completes
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*
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* This will wake a high-priority task on CPU indicated by cpu_id argument,
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* and run func(arg) in the context of that task.
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* This function waits for func to return.
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* Run a given function on a particular CPU. The given function must accept a
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* void* argument and return void. The given function is run in the context of
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* the IPC task of the CPU specified by the cpu_id parameter. The calling task
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* will be blocked until the IPC task completes execution of the given function.
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* If another IPC call is ongoing, the calling task will block until the other
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* IPC call completes. The stack size allocated for the IPC task can be
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* configured in the "Inter-Processor Call (IPC) task stack size" setting in
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* menuconfig. Increase this setting if the given function requires more stack
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* than default.
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*
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* In single-core mode, returns ESP_ERR_INVALID_ARG for cpu_id 1.
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* @note In single-core mode, returns ESP_ERR_INVALID_ARG for cpu_id 1.
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*
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* @param cpu_id CPU where function should be executed (0 or 1)
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* @param func pointer to a function which should be executed
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* @param arg arbitrary argument to be passed into function
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* @param[in] cpu_id CPU where the given function should be executed (0 or 1)
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* @param[in] func Pointer to a function of type void func(void* arg) to be executed
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* @param[in] arg Arbitrary argument of type void* to be passed into the function
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*
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* @return ESP_ERR_INVALID_ARG if cpu_id is invalid
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* ESP_ERR_INVALID_STATE if FreeRTOS scheduler is not running
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* ESP_OK otherwise
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* @return
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* - ESP_ERR_INVALID_ARG if cpu_id is invalid
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* - ESP_ERR_INVALID_STATE if the FreeRTOS scheduler is not running
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* - ESP_OK otherwise
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*/
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esp_err_t esp_ipc_call_blocking(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
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@ -29,11 +29,11 @@
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* use RTOS notification mechanisms (queues, semaphores, event groups, etc.) to
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* pass information to other tasks.
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*
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* <to be implemented> It should be possible to request the callback to be called
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* To be implemented: it should be possible to request the callback to be called
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* directly from the ISR. This reduces the latency, but has potential impact on
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* all other callbacks which need to be dispatched. This option should only be
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* used for simple callback functions, which do not take longer than a few
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* microseconds to run. </to be implemented>
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* microseconds to run.
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*
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* Implementation note: on the ESP32, esp_timer APIs use the "legacy" FRC2
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* timer. Timer callbacks are called from a task running on the PRO CPU.
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