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IDF release/v4.4 f3e0c8bc41 (#6075)

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esp-dsp: master 6b25cbb
esp-face: master 925c72e
esp-rainmaker: f1b82c7
esp32-camera: master 221d24d
esp_littlefs: master 5a13cd6

fixes: #5948
This commit is contained in:
Me No Dev
2022-01-18 17:28:10 +02:00
committed by GitHub
parent 77756d8a06
commit 78b2df74f5
460 changed files with 6448 additions and 5463 deletions
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19
tools/sdk/esp32/include/soc/esp32/include/soc/periph_defs.h
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@ -1,16 +1,8 @@
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _SOC_PERIPH_DEFS_H_
#define _SOC_PERIPH_DEFS_H_
@ -54,6 +46,7 @@ typedef enum {
PERIPH_AES_MODULE,
PERIPH_SHA_MODULE,
PERIPH_RSA_MODULE,
PERIPH_SARADC_MODULE,
PERIPH_MODULE_MAX
} periph_module_t;

8
tools/sdk/esp32/include/soc/esp32/include/soc/soc_caps.h
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@ -52,6 +52,7 @@
/*-------------------------- COMMON CAPS ---------------------------------------*/
#define SOC_CAPS_ECO_VER_MAX 3
#define SOC_ADC_SUPPORTED 1
#define SOC_DAC_SUPPORTED 1
#define SOC_MCPWM_SUPPORTED 1
#define SOC_SDMMC_HOST_SUPPORTED 1
@ -69,7 +70,7 @@
/*-------------------------- ADC CAPS ----------------------------------------*/
/**
* TO BE REMOVED in !14278
* TO BE REMOVED
* Check if adc support digital controller (DMA) mode.
* @value
* - 1 : support;
@ -79,6 +80,7 @@
/*!< SAR ADC Module*/
#define SOC_ADC_RTC_CTRL_SUPPORTED 1
#define SOC_ADC_DIG_CTRL_SUPPORTED 1
#define SOC_ADC_PERIPH_NUM (2)
#define SOC_ADC_CHANNEL_NUM(PERIPH_NUM) ((PERIPH_NUM==0)? 8: 10)
#define SOC_ADC_MAX_CHANNEL_NUM (10)
@ -89,8 +91,8 @@
#define SOC_ADC_DIGI_MIN_BITWIDTH (9)
#define SOC_ADC_DIGI_MAX_BITWIDTH (12)
/*!< F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interva <= 4095 */
#define SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333
#define SOC_ADC_SAMPLE_FREQ_THRES_LOW 611
#define SOC_ADC_SAMPLE_FREQ_THRES_HIGH (2*1000*1000)
#define SOC_ADC_SAMPLE_FREQ_THRES_LOW (2000)
/*!< RTC */
#define SOC_ADC_MAX_BITWIDTH (12)