mirror of
https://github.com/0xFEEDC0DE64/arduino-esp32.git
synced 2025-07-01 21:10:58 +02:00
update IDF libs and esptool.py
adds autoreset after firmware upload
This commit is contained in:
514
tools/sdk/include/driver/driver/i2c.h
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514
tools/sdk/include/driver/driver/i2c.h
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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _DRIVER_I2C_H_
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#define _DRIVER_I2C_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <esp_types.h>
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#include "esp_err.h"
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#include "esp_intr_alloc.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/semphr.h"
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#include "freertos/xtensa_api.h"
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#include "freertos/task.h"
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#include "freertos/queue.h"
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#include "freertos/ringbuf.h"
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#include "driver/gpio.h"
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#define I2C_APB_CLK_FREQ APB_CLK_FREQ /*!< I2C source clock is APB clock, 80MHz */
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#define I2C_FIFO_LEN (32) /*!< I2C hardware fifo length */
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typedef enum{
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I2C_MODE_SLAVE = 0, /*!< I2C slave mode */
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I2C_MODE_MASTER, /*!< I2C master mode */
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I2C_MODE_MAX,
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}i2c_mode_t;
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typedef enum {
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I2C_MASTER_WRITE = 0, /*!< I2C write data */
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I2C_MASTER_READ, /*!< I2C read data */
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} i2c_rw_t;
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typedef enum {
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I2C_DATA_MODE_MSB_FIRST = 0, /*!< I2C data msb first */
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I2C_DATA_MODE_LSB_FIRST = 1, /*!< I2C data lsb first */
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I2C_DATA_MODE_MAX
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} i2c_trans_mode_t;
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typedef enum{
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I2C_CMD_RESTART = 0, /*!<I2C restart command */
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I2C_CMD_WRITE, /*!<I2C write command */
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I2C_CMD_READ, /*!<I2C read command */
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I2C_CMD_STOP, /*!<I2C stop command */
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I2C_CMD_END /*!<I2C end command */
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}i2c_opmode_t;
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typedef enum{
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I2C_NUM_0 = 0, /*!< I2C port 0 */
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I2C_NUM_1 , /*!< I2C port 1 */
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I2C_NUM_MAX
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} i2c_port_t;
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typedef enum {
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I2C_ADDR_BIT_7 = 0, /*!< I2C 7bit address for slave mode */
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I2C_ADDR_BIT_10, /*!< I2C 10bit address for slave mode */
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I2C_ADDR_BIT_MAX,
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} i2c_addr_mode_t;
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/**
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* @brief I2C initialization parameters
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*/
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typedef struct{
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i2c_mode_t mode; /*!< I2C mode */
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gpio_num_t sda_io_num; /*!< GPIO number for I2C sda signal */
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gpio_pullup_t sda_pullup_en; /*!< Internal GPIO pull mode for I2C sda signal*/
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gpio_num_t scl_io_num; /*!< GPIO number for I2C scl signal */
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gpio_pullup_t scl_pullup_en; /*!< Internal GPIO pull mode for I2C scl signal*/
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union {
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struct {
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uint32_t clk_speed; /*!< I2C clock frequency for master mode, (no higher than 1MHz for now) */
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} master;
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struct {
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uint8_t addr_10bit_en; /*!< I2C 10bit address mode enable for slave mode */
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uint16_t slave_addr; /*!< I2C address for slave mode */
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} slave;
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};
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}i2c_config_t;
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typedef void* i2c_cmd_handle_t; /*!< I2C command handle */
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/**
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* @brief I2C driver install
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*
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* @param i2c_num I2C port number
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* @param mode I2C mode( master or slave )
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* @param slv_rx_buf_len receiving buffer size for slave mode
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* @note
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* Only slave mode will use this value, driver will ignore this value in master mode.
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* @param slv_tx_buf_len sending buffer size for slave mode
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* @note
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* Only slave mode will use this value, driver will ignore this value in master mode.
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* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
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* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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* - ESP_FAIL Driver install error
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*/
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esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode, size_t slv_rx_buf_len, size_t slv_tx_buf_len, int intr_alloc_flags);
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/**
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* @brief I2C driver delete
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*
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* @param i2c_num I2C port number
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_driver_delete(i2c_port_t i2c_num);
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/**
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* @brief I2C parameter initialization
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*
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* @param i2c_num I2C port number
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* @param i2c_conf pointer to I2C parameter settings
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_param_config(i2c_port_t i2c_num, i2c_config_t* i2c_conf);
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/**
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* @brief reset I2C tx hardware fifo
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*
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* @param i2c_num I2C port number
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_reset_tx_fifo(i2c_port_t i2c_num);
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/**
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* @brief reset I2C rx fifo
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*
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* @param i2c_num I2C port number
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_reset_rx_fifo(i2c_port_t i2c_num);
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/**
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* @brief I2C isr handler register
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*
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* @param i2c_num I2C port number
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* @param fn isr handler function
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* @param arg parameter for isr handler function
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* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
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* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
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* @param handle handle return from esp_intr_alloc.
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_isr_register(i2c_port_t i2c_num, void (*fn)(void*), void * arg, int intr_alloc_flags, intr_handle_t *handle);
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/**
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* @brief to delete and free I2C isr.
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*
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* @param handle handle of isr.
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_isr_free(intr_handle_t handle);
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/**
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* @brief Configure GPIO signal for I2C sck and sda
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*
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* @param i2c_num I2C port number
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* @param sda_io_num GPIO number for I2C sda signal
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* @param scl_io_num GPIO number for I2C scl signal
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* @param sda_pullup_en Whether to enable the internal pullup for sda pin
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* @param scl_pullup_en Whether to enable the internal pullup for scl pin
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* @param mode I2C mode
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_set_pin(i2c_port_t i2c_num, gpio_num_t sda_io_num, gpio_num_t scl_io_num,
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gpio_pullup_t sda_pullup_en, gpio_pullup_t scl_pullup_en, i2c_mode_t mode);
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/**
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* @brief Create and init I2C command link
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* @note
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* Before we build I2C command link, we need to call i2c_cmd_link_create() to create
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* a command link.
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* After we finish sending the commands, we need to call i2c_cmd_link_delete() to
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* release and return the resources.
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*
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* @return i2c command link handler
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*/
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i2c_cmd_handle_t i2c_cmd_link_create();
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/**
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* @brief Free I2C command link
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* @note
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* Before we build I2C command link, we need to call i2c_cmd_link_create() to create
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* a command link.
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* After we finish sending the commands, we need to call i2c_cmd_link_delete() to
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* release and return the resources.
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*
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* @param cmd_handle I2C command handle
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*/
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void i2c_cmd_link_delete(i2c_cmd_handle_t cmd_handle);
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/**
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* @brief Queue command for I2C master to generate a start signal
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* @note
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* Only call this function in I2C master mode
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* Call i2c_master_cmd_begin() to send all queued commands
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*
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* @param cmd_handle I2C cmd link
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_master_start(i2c_cmd_handle_t cmd_handle);
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/**
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* @brief Queue command for I2C master to write one byte to I2C bus
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* @note
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* Only call this function in I2C master mode
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* Call i2c_master_cmd_begin() to send all queued commands
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*
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* @param cmd_handle I2C cmd link
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* @param data I2C one byte command to write to bus
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* @param ack_en enable ack check for master
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_master_write_byte(i2c_cmd_handle_t cmd_handle, uint8_t data, bool ack_en);
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/**
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* @brief Queue command for I2C master to write buffer to I2C bus
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* @note
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* Only call this function in I2C master mode
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* Call i2c_master_cmd_begin() to send all queued commands
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*
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* @param cmd_handle I2C cmd link
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* @param data data to send
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* @param data_len data length
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* @param ack_en enable ack check for master
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_master_write(i2c_cmd_handle_t cmd_handle, uint8_t* data, size_t data_len, bool ack_en);
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/**
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* @brief Queue command for I2C master to read one byte from I2C bus
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* @note
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* Only call this function in I2C master mode
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* Call i2c_master_cmd_begin() to send all queued commands
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*
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* @param cmd_handle I2C cmd link
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* @param data pointer accept the data byte
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* @param ack ack value for read command
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_master_read_byte(i2c_cmd_handle_t cmd_handle, uint8_t* data, int ack);
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/**
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* @brief Queue command for I2C master to read data from I2C bus
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* @note
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* Only call this function in I2C master mode
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* Call i2c_master_cmd_begin() to send all queued commands
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*
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* @param cmd_handle I2C cmd link
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* @param data data buffer to accept the data from bus
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* @param data_len read data length
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* @param ack ack value for read command
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_master_read(i2c_cmd_handle_t cmd_handle, uint8_t* data, size_t data_len, int ack);
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/**
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* @brief Queue command for I2C master to generate a stop signal
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* @note
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* Only call this function in I2C master mode
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* Call i2c_master_cmd_begin() to send all queued commands
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*
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* @param cmd_handle I2C cmd link
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*
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* @return
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* - ESP_OK Success
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||||
* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_master_stop(i2c_cmd_handle_t cmd_handle);
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/**
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* @brief I2C master send queued commands.
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* This function will trigger sending all queued commands.
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* The task will be blocked until all the commands have been sent out.
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* The I2C APIs are not thread-safe, if you want to use one I2C port in different tasks,
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* you need to take care of the multi-thread issue.
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* @note
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* Only call this function in I2C master mode
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*
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* @param i2c_num I2C port number
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* @param cmd_handle I2C command handler
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* @param ticks_to_wait maximum wait ticks.
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*
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* @return
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* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
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* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
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* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
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* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
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*/
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esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle, portBASE_TYPE ticks_to_wait);
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||||
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/**
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* @brief I2C slave write data to internal ringbuffer, when tx fifo empty, isr will fill the hardware
|
||||
* fifo from the internal ringbuffer
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||||
* @note
|
||||
* Only call this function in I2C slave mode
|
||||
*
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||||
* @param i2c_num I2C port number
|
||||
* @param data data pointer to write into internal buffer
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||||
* @param size data size
|
||||
* @param ticks_to_wait Maximum waiting ticks
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||||
*
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||||
* @return
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||||
* - ESP_FAIL(-1) Parameter error
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||||
* - Others(>=0) The number of data bytes that pushed to the I2C slave buffer.
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||||
*/
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int i2c_slave_write_buffer(i2c_port_t i2c_num, uint8_t* data, int size, portBASE_TYPE ticks_to_wait);
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||||
|
||||
/**
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||||
* @brief I2C slave read data from internal buffer. When I2C slave receive data, isr will copy received data
|
||||
* from hardware rx fifo to internal ringbuffer. Then users can read from internal ringbuffer.
|
||||
* @note
|
||||
* Only call this function in I2C slave mode
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param data data pointer to write into internal buffer
|
||||
* @param max_size Maximum data size to read
|
||||
* @param ticks_to_wait Maximum waiting ticks
|
||||
*
|
||||
* @return
|
||||
* - ESP_FAIL(-1) Parameter error
|
||||
* - Others(>=0) The number of data bytes that read from I2C slave buffer.
|
||||
*/
|
||||
int i2c_slave_read_buffer(i2c_port_t i2c_num, uint8_t* data, size_t max_size, portBASE_TYPE ticks_to_wait);
|
||||
|
||||
/**
|
||||
* @brief set I2C master clock period
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param high_period clock cycle number during SCL is high level, high_period is a 14 bit value
|
||||
* @param low_period clock cycle number during SCL is low level, low_period is a 14 bit value
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_set_period(i2c_port_t i2c_num, int high_period, int low_period);
|
||||
|
||||
/**
|
||||
* @brief get I2C master clock period
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param high_period pointer to get clock cycle number during SCL is high level, will get a 14 bit value
|
||||
* @param low_period pointer to get clock cycle number during SCL is low level, will get a 14 bit value
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2s_get_period(i2c_port_t i2c_num, int* high_period, int* low_period);
|
||||
|
||||
/**
|
||||
* @brief set I2C master start signal timing
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param setup_time clock number between the falling-edge of SDA and rising-edge of SCL for start mark, it's a 10-bit value.
|
||||
* @param hold_time clock num between the falling-edge of SDA and falling-edge of SCL for start mark, it's a 10-bit value.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_set_start_timing(i2c_port_t i2c_num, int setup_time, int hold_time);
|
||||
|
||||
/**
|
||||
* @brief get I2C master start signal timing
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param setup_time pointer to get setup time
|
||||
* @param hold_time pointer to get hold time
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_get_start_timing(i2c_port_t i2c_num, int* setup_time, int* hold_time);
|
||||
|
||||
/**
|
||||
* @brief set I2C master stop signal timing
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param setup_time clock num between the rising-edge of SCL and the rising-edge of SDA, it's a 10-bit value.
|
||||
* @param hold_time clock number after the STOP bit's rising-edge, it's a 14-bit value.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_set_stop_timing(i2c_port_t i2c_num, int setup_time, int hold_time);
|
||||
|
||||
/**
|
||||
* @brief get I2C master stop signal timing
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param setup_time pointer to get setup time.
|
||||
* @param hold_time pointer to get hold time.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_get_stop_timing(i2c_port_t i2c_num, int* setup_time, int* hold_time);
|
||||
|
||||
/**
|
||||
* @brief set I2C data signal timing
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param sample_time clock number I2C used to sample data on SDA after the rising-edge of SCL, it's a 10-bit value
|
||||
* @param hold_time clock number I2C used to hold the data after the falling-edge of SCL, it's a 10-bit value
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_set_data_timing(i2c_port_t i2c_num, int sample_time, int hold_time);
|
||||
|
||||
/**
|
||||
* @brief get I2C data signal timing
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param sample_time pointer to get sample time
|
||||
* @param hold_time pointer to get hold time
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_get_data_timing(i2c_port_t i2c_num, int* sample_time, int* hold_time);
|
||||
|
||||
/**
|
||||
* @brief set I2C data transfer mode
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param tx_trans_mode I2C sending data mode
|
||||
* @param rx_trans_mode I2C receving data mode
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_set_data_mode(i2c_port_t i2c_num, i2c_trans_mode_t tx_trans_mode, i2c_trans_mode_t rx_trans_mode);
|
||||
|
||||
/**
|
||||
* @brief get I2C data transfer mode
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param tx_trans_mode pointer to get I2C sending data mode
|
||||
* @param rx_trans_mode pointer to get I2C receiving data mode
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_get_data_mode(i2c_port_t i2c_num, i2c_trans_mode_t *tx_trans_mode, i2c_trans_mode_t *rx_trans_mode);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*_DRIVER_I2C_H_*/
|
380
tools/sdk/include/driver/driver/i2s.h
Normal file
380
tools/sdk/include/driver/driver/i2s.h
Normal file
@ -0,0 +1,380 @@
|
||||
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#ifndef _DRIVER_I2S_H_
|
||||
#define _DRIVER_I2S_H_
|
||||
#include "esp_err.h"
|
||||
#include <esp_types.h>
|
||||
#include "soc/gpio_reg.h"
|
||||
#include "soc/soc.h"
|
||||
#include "soc/i2s_struct.h"
|
||||
#include "soc/i2s_reg.h"
|
||||
#include "soc/rtc_io_reg.h"
|
||||
#include "soc/io_mux_reg.h"
|
||||
#include "rom/gpio.h"
|
||||
#include "esp_attr.h"
|
||||
#include "esp_intr_alloc.h"
|
||||
#include "driver/periph_ctrl.h"
|
||||
#include "freertos/semphr.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define I2S_PIN_NO_CHANGE (-1)
|
||||
|
||||
|
||||
/**
|
||||
* @brief I2S bit width per sample.
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
I2S_BITS_PER_SAMPLE_8BIT = 8, /*!< I2S bits per sample: 8-bits*/
|
||||
I2S_BITS_PER_SAMPLE_16BIT = 16, /*!< I2S bits per sample: 16-bits*/
|
||||
I2S_BITS_PER_SAMPLE_24BIT = 24, /*!< I2S bits per sample: 24-bits*/
|
||||
I2S_BITS_PER_SAMPLE_32BIT = 32, /*!< I2S bits per sample: 32-bits*/
|
||||
} i2s_bits_per_sample_t;
|
||||
|
||||
/**
|
||||
* @brief I2S communication standard format
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
I2S_COMM_FORMAT_I2S = 0x01, /*!< I2S communication format I2S*/
|
||||
I2S_COMM_FORMAT_I2S_MSB = 0x02, /*!< I2S format MSB*/
|
||||
I2S_COMM_FORMAT_I2S_LSB = 0x04, /*!< I2S format LSB*/
|
||||
I2S_COMM_FORMAT_PCM = 0x08, /*!< I2S communication format PCM*/
|
||||
I2S_COMM_FORMAT_PCM_SHORT = 0x10, /*!< PCM Short*/
|
||||
I2S_COMM_FORMAT_PCM_LONG = 0x20, /*!< PCM Long*/
|
||||
} i2s_comm_format_t;
|
||||
|
||||
|
||||
/**
|
||||
* @brief I2S channel format type
|
||||
*/
|
||||
typedef enum {
|
||||
I2S_CHANNEL_FMT_RIGHT_LEFT = 0x00,
|
||||
I2S_CHANNEL_FMT_ALL_RIGHT,
|
||||
I2S_CHANNEL_FMT_ALL_LEFT,
|
||||
I2S_CHANNEL_FMT_ONLY_RIGHT,
|
||||
I2S_CHANNEL_FMT_ONLY_LEFT,
|
||||
} i2s_channel_fmt_t;
|
||||
|
||||
/**
|
||||
* @brief PDM sample rate ratio, measured in Hz.
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
PDM_SAMPLE_RATE_RATIO_64,
|
||||
PDM_SAMPLE_RATE_RATIO_128,
|
||||
} pdm_sample_rate_ratio_t;
|
||||
|
||||
/**
|
||||
* @brief PDM PCM convter enable/disable.
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
PDM_PCM_CONV_ENABLE,
|
||||
PDM_PCM_CONV_DISABLE,
|
||||
} pdm_pcm_conv_t;
|
||||
|
||||
|
||||
/**
|
||||
* @brief I2S Peripheral, 0 & 1.
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
I2S_NUM_0 = 0x0, /*!< I2S 0*/
|
||||
I2S_NUM_1 = 0x1, /*!< I2S 1*/
|
||||
I2S_NUM_MAX,
|
||||
} i2s_port_t;
|
||||
|
||||
/**
|
||||
* @brief I2S Mode, defaut is I2S_MODE_MASTER | I2S_MODE_TX
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
I2S_MODE_MASTER = 1,
|
||||
I2S_MODE_SLAVE = 2,
|
||||
I2S_MODE_TX = 4,
|
||||
I2S_MODE_RX = 8,
|
||||
I2S_MODE_DAC_BUILT_IN = 16
|
||||
} i2s_mode_t;
|
||||
|
||||
/**
|
||||
* @brief I2S configuration parameters for i2s_param_config function
|
||||
*
|
||||
*/
|
||||
typedef struct {
|
||||
i2s_mode_t mode; /*!< I2S work mode*/
|
||||
int sample_rate; /*!< I2S sample rate*/
|
||||
i2s_bits_per_sample_t bits_per_sample; /*!< I2S bits per sample*/
|
||||
i2s_channel_fmt_t channel_format; /*!< I2S channel format */
|
||||
i2s_comm_format_t communication_format; /*!< I2S communication format */
|
||||
int intr_alloc_flags; /*!< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info */
|
||||
int dma_buf_count; /*!< I2S DMA Buffer Count */
|
||||
int dma_buf_len; /*!< I2S DMA Buffer Length */
|
||||
} i2s_config_t;
|
||||
|
||||
/**
|
||||
* @brief I2S event types
|
||||
*
|
||||
*/
|
||||
typedef enum {
|
||||
I2S_EVENT_DMA_ERROR,
|
||||
I2S_EVENT_TX_DONE, /*!< I2S DMA finish sent 1 buffer*/
|
||||
I2S_EVENT_RX_DONE, /*!< I2S DMA finish received 1 buffer*/
|
||||
I2S_EVENT_MAX, /*!< I2S event max index*/
|
||||
} i2s_event_type_t;
|
||||
|
||||
/**
|
||||
* @brief Event structure used in I2S event queue
|
||||
*
|
||||
*/
|
||||
typedef struct {
|
||||
i2s_event_type_t type; /*!< I2S event type */
|
||||
size_t size; /*!< I2S data size for I2S_DATA event*/
|
||||
} i2s_event_t;
|
||||
|
||||
/**
|
||||
* @brief I2S pin number for i2s_set_pin
|
||||
*
|
||||
*/
|
||||
typedef struct {
|
||||
int bck_io_num; /*!< BCK in out pin*/
|
||||
int ws_io_num; /*!< WS in out pin*/
|
||||
int data_out_num; /*!< DATA out pin*/
|
||||
int data_in_num; /*!< DATA in pin*/
|
||||
} i2s_pin_config_t;
|
||||
|
||||
typedef intr_handle_t i2s_isr_handle_t;
|
||||
/**
|
||||
* @brief Set I2S pin number
|
||||
*
|
||||
* @note
|
||||
* Internal signal can be output to multiple GPIO pads
|
||||
* Only one GPIO pad can connect with input signal
|
||||
*
|
||||
* @param i2s_num I2S_NUM_0 or I2S_NUM_1
|
||||
*
|
||||
* @param pin I2S Pin struct, or NULL for 2-channels, 8-bits DAC pin configuration (GPIO25 & GPIO26)
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_FAIL Parameter error
|
||||
*/
|
||||
esp_err_t i2s_set_pin(i2s_port_t i2s_num, const i2s_pin_config_t *pin);
|
||||
|
||||
/**
|
||||
* @brief i2s install and start driver
|
||||
*
|
||||
* @param i2s_num I2S_NUM_0, I2S_NUM_1
|
||||
*
|
||||
* @param i2s_config I2S configurations - see i2s_config_t struct
|
||||
*
|
||||
* @param queue_size I2S event queue size/depth.
|
||||
*
|
||||
* @param i2s_queue I2S event queue handle, if set NULL, driver will not use an event queue.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_FAIL Parameter error
|
||||
*/
|
||||
esp_err_t i2s_driver_install(i2s_port_t i2s_num, const i2s_config_t *i2s_config, int queue_size, void* i2s_queue);
|
||||
|
||||
/**
|
||||
* @brief Uninstall I2S driver.
|
||||
*
|
||||
* @param i2s_num I2S_NUM_0, I2S_NUM_1
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_FAIL Parameter error
|
||||
*/
|
||||
esp_err_t i2s_driver_uninstall(i2s_port_t i2s_num);
|
||||
|
||||
/**
|
||||
* @brief i2s read data buffer to i2s dma buffer
|
||||
*
|
||||
* @param i2s_num I2S_NUM_0, I2S_NUM_1
|
||||
*
|
||||
* @param src source address to write
|
||||
*
|
||||
* @param size size of data (size in bytes)
|
||||
*
|
||||
* @param ticks_to_wait Write timeout
|
||||
*
|
||||
* @return number of written bytes
|
||||
*/
|
||||
int i2s_write_bytes(i2s_port_t i2s_num, const char *src, size_t size, TickType_t ticks_to_wait);
|
||||
|
||||
/**
|
||||
* @brief i2s write data buffer to i2s dma buffer
|
||||
*
|
||||
* @param i2s_num I2S_NUM_0, I2S_NUM_1
|
||||
*
|
||||
* @param dest destination address to read
|
||||
*
|
||||
* @param size size of data (size in bytes)
|
||||
*
|
||||
* @param ticks_to_wait Read timeout
|
||||
*
|
||||
* @return number of read bytes
|
||||
*/
|
||||
int i2s_read_bytes(i2s_port_t i2s_num, char* dest, size_t size, TickType_t ticks_to_wait);
|
||||
|
||||
/**
|
||||
* @brief i2s push 1 sample to i2s dma buffer, with the size parameter equal to one sample's size in bytes = bits_per_sample/8.
|
||||
*
|
||||
* @param i2s_num I2S_NUM_0, I2S_NUM_1
|
||||
*
|
||||
* @param sample destination address to write (depend on bits_per_sample, size of sample (in bytes) = 2*bits_per_sample/8)
|
||||
*
|
||||
* @param ticks_to_wait Push timeout
|
||||
*
|
||||
* @return number of push bytes
|
||||
*/
|
||||
int i2s_push_sample(i2s_port_t i2s_num, const char *sample, TickType_t ticks_to_wait);
|
||||
|
||||
/**
|
||||
* @brief Pop 1 sample to i2s dma buffer, with the size parameter equal to one sample's size in bytes = bits_per_sample/8.
|
||||
*
|
||||
* @param i2s_num I2S_NUM_0, I2S_NUM_1
|
||||
*
|
||||
* @param sample destination address to write (depend on bits_per_sample, size of sample (in bytes) = 2*bits_per_sample/8)
|
||||
*
|
||||
* @param ticks_to_wait Pop timeout
|
||||
*
|
||||
* @return number of pop bytes
|
||||
*/
|
||||
int i2s_pop_sample(i2s_port_t i2s_num, char *sample, TickType_t ticks_to_wait);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Set clock rate used for I2S RX and TX
|
||||
*
|
||||
* @param i2s_num I2S_NUM_0, I2S_NUM_1
|
||||
*
|
||||
* @param rate I2S clock (ex: 8000, 44100...)
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_FAIL Parameter error
|
||||
*/
|
||||
esp_err_t i2s_set_sample_rates(i2s_port_t i2s_num, uint32_t rate);
|
||||
|
||||
/**
|
||||
* @brief Start driver
|
||||
*
|
||||
* @param i2s_num I2S_NUM_0, I2S_NUM_1
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_FAIL Parameter error
|
||||
*/
|
||||
esp_err_t i2s_start(i2s_port_t i2s_num);
|
||||
|
||||
/**
|
||||
* @brief Stop driver
|
||||
*
|
||||
* @param i2s_num I2S_NUM_0, I2S_NUM_1
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_FAIL Parameter error
|
||||
*/
|
||||
esp_err_t i2s_stop(i2s_port_t i2s_num);
|
||||
|
||||
/**
|
||||
* @brief Set the TX DMA buffer contents to all zeroes
|
||||
*
|
||||
* @param i2s_num I2S_NUM_0, I2S_NUM_1
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_FAIL Parameter error
|
||||
*/
|
||||
esp_err_t i2s_zero_dma_buffer(i2s_port_t i2s_num);
|
||||
|
||||
/***************************EXAMPLE**********************************
|
||||
*
|
||||
*
|
||||
* ----------------EXAMPLE OF I2S SETTING ---------------------
|
||||
* @code{c}
|
||||
*
|
||||
* #include "freertos/queue.h"
|
||||
* #define I2S_INTR_NUM 17 //choose one interrupt number from soc.h
|
||||
* int i2s_num = 0; //i2s port number
|
||||
* i2s_config_t i2s_config = {
|
||||
* .mode = I2S_MODE_MASTER | I2S_MODE_TX,
|
||||
* .sample_rate = 44100,
|
||||
* .bits_per_sample = 16, //16, 32
|
||||
* .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //format LEFT_RIGHT
|
||||
* .communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
|
||||
* .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1,
|
||||
* .dma_buf_count = 8,
|
||||
* .dma_buf_len = 64
|
||||
* };
|
||||
*
|
||||
* i2s_pin_config_t pin_config = {
|
||||
* .bck_io_num = 26,
|
||||
* .ws_io_num = 25,
|
||||
* .data_out_num = 22,
|
||||
* .data_in_num = I2S_PIN_NO_CHANGE
|
||||
* };
|
||||
*
|
||||
* i2s_driver_install(i2s_num, &i2s_config, 0, NULL); //install and start i2s driver
|
||||
*
|
||||
* i2s_set_pin(i2s_num, &pin_config);
|
||||
*
|
||||
* i2s_set_sample_rates(i2s_num, 22050); //set sample rates
|
||||
*
|
||||
*
|
||||
* i2s_driver_uninstall(i2s_num); //stop & destroy i2s driver
|
||||
*@endcode
|
||||
*
|
||||
* ----------------EXAMPLE USING I2S WITH DAC ---------------------
|
||||
* @code{c}
|
||||
*
|
||||
* #include "freertos/queue.h"
|
||||
* #define I2S_INTR_NUM 17 //choose one interrupt number from soc.h
|
||||
* int i2s_num = 0; //i2s port number
|
||||
* i2s_config_t i2s_config = {
|
||||
* .mode = I2S_MODE_MASTER | I2S_MODE_TX | I2S_MODE_DAC_BUILT_IN,
|
||||
* .sample_rate = 44100,
|
||||
* .bits_per_sample = 8, // Only 8-bit DAC support
|
||||
* .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //
|
||||
* .communication_format = I2S_COMM_FORMAT_I2S_MSB,
|
||||
* .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1,
|
||||
* .dma_buf_count = 8,
|
||||
* .dma_buf_len = 64
|
||||
* };
|
||||
*
|
||||
*
|
||||
* i2s_driver_install(i2s_num, &i2s_config, 0, NULL); //install and start i2s driver
|
||||
*
|
||||
* i2s_set_pin(i2s_num, NULL); //for internal DAC
|
||||
*
|
||||
* i2s_set_sample_rates(i2s_num, 22050); //set sample rates
|
||||
*
|
||||
* i2s_driver_uninstall(i2s_num); //stop & destroy i2s driver
|
||||
*@endcode
|
||||
*-----------------------------------------------------------------------------*
|
||||
***************************END OF EXAMPLE**********************************/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _DRIVER_I2S_H_ */
|
Reference in New Issue
Block a user