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IDF master c13afea63 (#5214)

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esp-dsp: master 7cc5073
esp-face: master 420fc7e
esp-rainmaker: f1b82c7
esp32-camera: master 6f8489e
esp_littlefs: master b58f00c
This commit is contained in:
Me No Dev
2021-05-31 16:32:51 +03:00
committed by GitHub
parent 0db9e2f45b
commit a618fc1361
616 changed files with 11842 additions and 4932 deletions
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6
tools/sdk/esp32s2/include/driver/include/driver/adc_common.h
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@ -49,8 +49,8 @@ typedef enum {
ADC1_CHANNEL_5, /*!< ADC1 channel 5 is GPIO6 */
ADC1_CHANNEL_6, /*!< ADC1 channel 6 is GPIO7 */
ADC1_CHANNEL_7, /*!< ADC1 channel 7 is GPIO8 */
ADC1_CHANNEL_8, /*!< ADC1 channel 6 is GPIO9 */
ADC1_CHANNEL_9, /*!< ADC1 channel 7 is GPIO10 */
ADC1_CHANNEL_8, /*!< ADC1 channel 8 is GPIO9 */
ADC1_CHANNEL_9, /*!< ADC1 channel 9 is GPIO10 */
ADC1_CHANNEL_MAX,
} adc1_channel_t;
#elif CONFIG_IDF_TARGET_ESP32C3
@ -135,7 +135,7 @@ typedef enum {
* @brief Digital ADC DMA configuration
*/
typedef struct adc_digi_init_config_s {
uint32_t max_store_buf_size; ///< Max length of the converted data that driver can store before they are processed. When this length is reached, driver will dump out all the old data and start to store them again.
uint32_t max_store_buf_size; ///< Max length of the converted data that driver can store before they are processed.
uint32_t conv_num_each_intr; ///< Bytes of data that can be converted in 1 interrupt.
uint32_t adc1_chan_mask; ///< Channel list of ADC1 to be initialized.
uint32_t adc2_chan_mask; ///< Channel list of ADC2 to be initialized.

4
tools/sdk/esp32s2/include/driver/include/driver/gpio.h
View File

@ -35,6 +35,8 @@
#include "esp32s3/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/gpio.h"
#endif
#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
@ -215,9 +217,9 @@ esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num);
* per-GPIO ISRs.
*
* @param fn Interrupt handler function.
* @param arg Parameter for handler function
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* @param arg Parameter for handler function
* @param handle Pointer to return handle. If non-NULL, a handle for the interrupt will be returned here.
*
* \verbatim embed:rst:leading-asterisk

5
tools/sdk/esp32s2/include/driver/include/driver/ledc.h
View File

@ -76,6 +76,7 @@ esp_err_t ledc_update_duty(ledc_mode_t speed_mode, ledc_channel_t channel);
/**
* @brief Set LEDC output gpio.
* @deprecated This function is redundant, please use ledc_channel_config to set gpio pins.
*
* @param gpio_num The LEDC output gpio
* @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
@ -85,8 +86,8 @@ esp_err_t ledc_update_duty(ledc_mode_t speed_mode, ledc_channel_t channel);
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
*/
esp_err_t ledc_set_pin(int gpio_num, ledc_mode_t speed_mode, ledc_channel_t ledc_channel);
esp_err_t ledc_set_pin(int gpio_num, ledc_mode_t speed_mode, ledc_channel_t ledc_channel)
__attribute__((deprecated("use ledc_channel_config instead")));
/**
* @brief LEDC stop.
* Disable LEDC output, and set idle level

1
tools/sdk/esp32s2/include/driver/include/driver/mcpwm.h
View File

@ -568,6 +568,7 @@ esp_err_t mcpwm_fault_deinit(mcpwm_unit_t mcpwm_num, mcpwm_fault_signal_t fault_
* @param cap_edge set capture edge, BIT(0) - negative edge, BIT(1) - positive edge
* @param cap_sig capture pin, which needs to be enabled
* @param num_of_pulse count time between rising/falling edge between 2 *(pulses mentioned), counter uses APB_CLK
* [0~MCPWM_LL_MAX_PRESCALE] (MCPWM_LL_MAX_PRESCALE = 255 on ESP32);
*
* @return
* - ESP_OK Success

2
tools/sdk/esp32s2/include/driver/include/driver/spi_slave_hd.h
View File

@ -58,7 +58,9 @@ typedef enum {
typedef struct {
slave_cb_t cb_buffer_tx; ///< Callback when master reads from shared buffer
slave_cb_t cb_buffer_rx; ///< Callback when master writes to shared buffer
slave_cb_t cb_send_dma_ready; ///< Callback when TX data buffer is loaded to the hardware (DMA)
slave_cb_t cb_sent; ///< Callback when data are sent
slave_cb_t cb_recv_dma_ready; ///< Callback when RX data buffer is loaded to the hardware (DMA)
slave_cb_t cb_recv; ///< Callback when data are received
slave_cb_t cb_cmd9; ///< Callback when CMD9 received
slave_cb_t cb_cmdA; ///< Callback when CMDA received

8
tools/sdk/esp32s2/include/driver/include/driver/timer.h
View File

@ -432,6 +432,8 @@ void timer_group_clr_intr_sta_in_isr(timer_group_t group_num, timer_intr_t intr_
bool timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t timer_num);
/** @brief Take timer spinlock to enter critical protect
*
* @note Deprecated, the recommended way is to use ISR callbacks instead, see timer_group_example_main
*
* @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
*
@ -439,9 +441,11 @@ bool timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t tim
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
*/
esp_err_t timer_spinlock_take(timer_group_t group_num);
esp_err_t timer_spinlock_take(timer_group_t group_num) __attribute__ ((deprecated));
/** @brief Give timer spinlock to exit critical protect
*
* @note Deprecated, the recommended way is to use ISR callbacks instead, see timer_group_example_main
*
* @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1
*
@ -449,7 +453,7 @@ esp_err_t timer_spinlock_take(timer_group_t group_num);
* - ESP_OK Success
* - ESP_ERR_INVALID_ARG Parameter error
*/
esp_err_t timer_spinlock_give(timer_group_t group_num);
esp_err_t timer_spinlock_give(timer_group_t group_num) __attribute__ ((deprecated));
#ifdef __cplusplus
}

13
tools/sdk/esp32s2/include/driver/include/esp_private/gdma.h
View File

@ -155,6 +155,7 @@ esp_err_t gdma_new_channel(const gdma_channel_alloc_config_t *config, gdma_chann
* @brief Connect GDMA channel to trigger peripheral
*
* @note Suggest to use helper macro `GDMA_MAKE_TRIGGER` to construct parameter `trig_periph`. e.g. GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SHA,0)
* @note Connecting to a peripheral will also reset the DMA FIFO and FSM automatically
*
* @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
* @param[in] trig_periph GDMA trigger peripheral
@ -279,6 +280,18 @@ esp_err_t gdma_stop(gdma_channel_handle_t dma_chan);
*/
esp_err_t gdma_append(gdma_channel_handle_t dma_chan);
/**
* @brief Reset DMA channel FIFO and internal finite state machine
* @note Resetting a DMA channel won't break the connection with the target peripheral
*
* @param[in] dma_chan GDMA channel handle, allocated by `gdma_new_channel`
* @return
* - ESP_OK: DMA channel reset successfully
* - ESP_ERR_INVALID_ARG: DMA channel reset failed due to invalid arguments
* - ESP_FAIL: DMA channel reset failed due to other errors
*/
esp_err_t gdma_reset(gdma_channel_handle_t dma_chan);
#ifdef __cplusplus
}
#endif