mirror of
https://github.com/0xFEEDC0DE64/arduino-esp32.git
synced 2025-06-30 04:21:00 +02:00
latest IDF, 240MHz and BLE enabled libs
This commit is contained in:
@ -30,25 +30,34 @@ extern "C" {
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Set the chip to deep-sleep mode.
|
||||
*
|
||||
* The device will automatically wake up after the deep-sleep time set
|
||||
* by the users. Upon waking up, the device boots up from user_init.
|
||||
*
|
||||
* @attention The parameter time_in_us to be "uint64" is for further development.
|
||||
* Only the low 32 bits of parameter time_in_us are avalable now.
|
||||
*
|
||||
* @param uint64 time_in_us : deep-sleep time, only the low 32bits are avalable now. unit: microsecond
|
||||
*
|
||||
* @return null
|
||||
*/
|
||||
void system_deep_sleep(uint64_t time_in_us);
|
||||
* @brief Enter deep-sleep mode
|
||||
*
|
||||
* The device will automatically wake up after the deep-sleep time
|
||||
* Upon waking up, the device calls deep sleep wake stub, and then proceeds
|
||||
* to load application.
|
||||
*
|
||||
* This function does not return.
|
||||
*
|
||||
* @param time_in_us deep-sleep time, unit: microsecond
|
||||
*/
|
||||
void esp_deep_sleep(uint64_t time_in_us) __attribute__((noreturn));
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enter deep-sleep mode
|
||||
*
|
||||
* Function has been renamed to esp_deep_sleep.
|
||||
* This name is deprecated and will be removed in a future version.
|
||||
*
|
||||
* @param time_in_us deep-sleep time, unit: microsecond
|
||||
*/
|
||||
void system_deep_sleep(uint64_t time_in_us) __attribute__((noreturn, deprecated));
|
||||
|
||||
/**
|
||||
* @brief Default stub to run on wake from deep sleep.
|
||||
*
|
||||
* Allows for executing code immediately on wake from sleep, before
|
||||
* the software bootloader or esp-idf app has started up.
|
||||
* the software bootloader or ESP-IDF app has started up.
|
||||
*
|
||||
* This function is weak-linked, so you can implement your own version
|
||||
* to run code immediately when the chip wakes from
|
||||
|
@ -44,6 +44,7 @@ typedef enum {
|
||||
SYSTEM_EVENT_AP_STACONNECTED, /**< a station connected to ESP32 soft-AP */
|
||||
SYSTEM_EVENT_AP_STADISCONNECTED, /**< a station disconnected from ESP32 soft-AP */
|
||||
SYSTEM_EVENT_AP_PROBEREQRECVED, /**< Receive probe request packet in soft-AP interface */
|
||||
SYSTEM_EVENT_AP_STA_GOT_IP6, /**< ESP32 station or ap interface v6IP addr is preferred */
|
||||
SYSTEM_EVENT_MAX
|
||||
} system_event_id_t;
|
||||
|
||||
@ -79,7 +80,11 @@ typedef struct {
|
||||
|
||||
typedef struct {
|
||||
uint8_t pin_code[8]; /**< PIN code of station in enrollee mode */
|
||||
}system_event_sta_wps_er_pin_t;
|
||||
} system_event_sta_wps_er_pin_t;
|
||||
|
||||
typedef struct {
|
||||
tcpip_adapter_ip6_info_t ip6_info;
|
||||
} system_event_ap_sta_got_ip6_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t mac[6]; /**< MAC address of the station connected to ESP32 soft-AP */
|
||||
@ -106,6 +111,7 @@ typedef union {
|
||||
system_event_ap_staconnected_t sta_connected; /**< a station connected to ESP32 soft-AP */
|
||||
system_event_ap_stadisconnected_t sta_disconnected; /**< a station disconnected to ESP32 soft-AP */
|
||||
system_event_ap_probe_req_rx_t ap_probereqrecved; /**< ESP32 soft-AP receive probe request packet */
|
||||
system_event_ap_sta_got_ip6_t got_ip6; /**< ESP32 station or ap ipv6 addr state change to preferred */
|
||||
} system_event_info_t;
|
||||
|
||||
typedef struct {
|
||||
|
@ -82,126 +82,6 @@ extern "C" {
|
||||
#define ESP_INTR_DISABLE(inum) \
|
||||
xt_ints_off((1<<inum))
|
||||
|
||||
#define ESP_CCOMPARE_INTR_ENBALE() \
|
||||
ESP_INTR_ENABLE(ETS_CCOMPARE_INUM)
|
||||
|
||||
#define ESP_CCOMPARE_INTR_DISBALE() \
|
||||
ESP_INTR_DISABLE(ETS_CCOMPARE_INUM)
|
||||
|
||||
#define ESP_SPI1_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_SPI1_INUM)
|
||||
|
||||
#define ESP_SPI1_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_SPI1_INUM)
|
||||
|
||||
#define ESP_SPI2_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_SPI2_INUM)
|
||||
|
||||
#define ESP_PWM_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_PWM_INUM)
|
||||
|
||||
#define ESP_PWM_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_PWM_INUM)
|
||||
|
||||
#define ESP_SPI2_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_SPI2_INUM)
|
||||
|
||||
#define ESP_SPI3_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_SPI3_INUM)
|
||||
|
||||
#define ESP_SPI3_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_SPI3_INUM)
|
||||
|
||||
#define ESP_I2S0_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_I2S0_INUM)
|
||||
|
||||
#define ESP_I2S0_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_I2S0_INUM)
|
||||
|
||||
#define ESP_I2S1_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_I2S1_INUM)
|
||||
|
||||
#define ESP_I2S1_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_I2S1_INUM)
|
||||
|
||||
#define ESP_MPWM_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_MPWM_INUM)
|
||||
|
||||
#define ESP_EPWM_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_EPWM_INUM)
|
||||
|
||||
#define ESP_MPWM_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_MPWM_INUM)
|
||||
|
||||
#define ESP_EPWM_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_EPWM_INUM)
|
||||
|
||||
#define ESP_BB_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_BB_INUM)
|
||||
|
||||
#define ESP_BB_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_BB_INUM)
|
||||
|
||||
#define ESP_UART0_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_UART0_INUM)
|
||||
|
||||
#define ESP_UART0_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_UART0_INUM)
|
||||
|
||||
#define ESP_LEDC_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_LEDC_INUM)
|
||||
|
||||
#define ESP_LEDC_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_LEDC_INUM)
|
||||
|
||||
#define ESP_GPIO_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_GPIO_INUM)
|
||||
|
||||
#define ESP_GPIO_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_GPIO_INUM)
|
||||
|
||||
#define ESP_WDT_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_WDT_INUM)
|
||||
|
||||
#define ESP_WDT_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_WDT_INUM)
|
||||
|
||||
#define ESP_FRC1_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_FRC_TIMER1_INUM)
|
||||
|
||||
#define ESP_FRC1_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_FRC_TIMER1_INUM)
|
||||
|
||||
#define ESP_FRC2_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_FRC_TIMER2_INUM)
|
||||
|
||||
#define ESP_FRC2_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_FRC_TIMER2_INUM)
|
||||
|
||||
#define ESP_RTC_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_RTC_INUM)
|
||||
|
||||
#define ESP_RTC_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_RTC_INUM)
|
||||
|
||||
#define ESP_SLC_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_SLC_INUM)
|
||||
|
||||
#define ESP_SLC_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_SLC_INUM)
|
||||
|
||||
#define ESP_PCNT_INTR_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_PCNT_INUM)
|
||||
|
||||
#define ESP_PCNT_INTR_DISABLE() \
|
||||
ESP_INTR_DISABLE(ETS_PCNT_INUM)
|
||||
|
||||
#define ESP_RMT_CTRL_ENABLE() \
|
||||
ESP_INTR_ENABLE(ETS_RMT_CTRL_INUM)
|
||||
|
||||
#define ESP_RMT_CTRL_DIABLE() \
|
||||
ESP_INTR_DISABLE(ETS_RMT_CTRL_INUM)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
249
tools/sdk/include/esp32/esp_phy_init.h
Normal file
249
tools/sdk/include/esp32/esp_phy_init.h
Normal file
@ -0,0 +1,249 @@
|
||||
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
#include <stdint.h>
|
||||
#include "esp_err.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @file PHY init parameters and API
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief Structure holding PHY init parameters
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t param_ver_id; /*!< init_data structure version */
|
||||
uint8_t crystal_select; /*!< 0: 40MHz, 1: 26 MHz, 2: 24 MHz, 3: auto */
|
||||
uint8_t wifi_rx_gain_swp_step_1; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_2; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_3; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_4; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_5; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_6; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_7; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_8; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_9; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_10; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_11; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_12; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_13; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_14; /*!< do not change */
|
||||
uint8_t wifi_rx_gain_swp_step_15; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_1; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_2; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_3; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_4; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_5; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_6; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_7; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_8; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_9; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_10; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_11; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_12; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_13; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_14; /*!< do not change */
|
||||
uint8_t bt_rx_gain_swp_step_15; /*!< do not change */
|
||||
uint8_t gain_cmp_1; /*!< do not change */
|
||||
uint8_t gain_cmp_6; /*!< do not change */
|
||||
uint8_t gain_cmp_11; /*!< do not change */
|
||||
uint8_t gain_cmp_ext2_1; /*!< do not change */
|
||||
uint8_t gain_cmp_ext2_6; /*!< do not change */
|
||||
uint8_t gain_cmp_ext2_11; /*!< do not change */
|
||||
uint8_t gain_cmp_ext3_1; /*!< do not change */
|
||||
uint8_t gain_cmp_ext3_6; /*!< do not change */
|
||||
uint8_t gain_cmp_ext3_11; /*!< do not change */
|
||||
uint8_t gain_cmp_bt_ofs_1; /*!< do not change */
|
||||
uint8_t gain_cmp_bt_ofs_6; /*!< do not change */
|
||||
uint8_t gain_cmp_bt_ofs_11; /*!< do not change */
|
||||
uint8_t target_power_qdb_0; /*!< 78 means target power is 78/4=19.5dbm */
|
||||
uint8_t target_power_qdb_1; /*!< 76 means target power is 76/4=19dbm */
|
||||
uint8_t target_power_qdb_2; /*!< 74 means target power is 74/4=18.5dbm */
|
||||
uint8_t target_power_qdb_3; /*!< 68 means target power is 68/4=17dbm */
|
||||
uint8_t target_power_qdb_4; /*!< 64 means target power is 64/4=16dbm */
|
||||
uint8_t target_power_qdb_5; /*!< 52 means target power is 52/4=13dbm */
|
||||
uint8_t target_power_index_mcs0; /*!< target power index is 0, means target power is target_power_qdb_0 19.5dbm; (1m,2m,5.5m,11m,6m,9m) */
|
||||
uint8_t target_power_index_mcs1; /*!< target power index is 0, means target power is target_power_qdb_0 19.5dbm; (12m) */
|
||||
uint8_t target_power_index_mcs2; /*!< target power index is 1, means target power is target_power_qdb_1 19dbm; (18m) */
|
||||
uint8_t target_power_index_mcs3; /*!< target power index is 1, means target power is target_power_qdb_1 19dbm; (24m) */
|
||||
uint8_t target_power_index_mcs4; /*!< target power index is 2, means target power is target_power_qdb_2 18.5dbm; (36m) */
|
||||
uint8_t target_power_index_mcs5; /*!< target power index is 3, means target power is target_power_qdb_3 17dbm; (48m) */
|
||||
uint8_t target_power_index_mcs6; /*!< target power index is 4, means target power is target_power_qdb_4 16dbm; (54m) */
|
||||
uint8_t target_power_index_mcs7; /*!< target power index is 5, means target power is target_power_qdb_5 13dbm */
|
||||
uint8_t pwr_ind_11b_en; /*!< 0: 11b power is same as mcs0 and 6m, 1: 11b power different with OFDM */
|
||||
uint8_t pwr_ind_11b_0; /*!< 1m, 2m power index [0~5] */
|
||||
uint8_t pwr_ind_11b_1; /*!< 5.5m, 11m power index [0~5] */
|
||||
uint8_t chan_backoff_en; /*!< 0: channel backoff disable, 1:channel backoff enable */
|
||||
uint8_t chan1_power_backoff_qdb; /*!< 4 means backoff is 1db */
|
||||
uint8_t chan2_power_backoff_qdb; /*!< see chan1_power_backoff_qdb */
|
||||
uint8_t chan3_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan4_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan5_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan6_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan7_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan8_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan9_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan10_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan11_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan12_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan13_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan14_power_backoff_qdb; /*!< chan1_power_backoff_qdb */
|
||||
uint8_t chan1_rate_backoff_index; /*!< if bit i is set, backoff data rate is target_power_qdb_i */
|
||||
uint8_t chan2_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan3_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan4_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan5_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan6_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan7_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan8_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan9_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan10_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan11_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan12_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan13_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t chan14_rate_backoff_index; /*!< see chan1_rate_backoff_index */
|
||||
uint8_t spur_freq_cfg_msb_1; /*!< first spur: */
|
||||
uint8_t spur_freq_cfg_1; /*!< spur_freq_cfg = (spur_freq_cfg_msb_1 <<8) | spur_freq_cfg_1 */
|
||||
uint8_t spur_freq_cfg_div_1; /*!< spur_freq=spur_freq_cfg/spur_freq_cfg_div_1 */
|
||||
uint8_t spur_freq_en_h_1; /*!< the seventh bit for total enable */
|
||||
uint8_t spur_freq_en_l_1; /*!< each bit for 1 channel, and use [spur_freq_en_h, spur_freq_en_l] to select the spur's channel priority */
|
||||
uint8_t spur_freq_cfg_msb_2; /*!< second spur: */
|
||||
uint8_t spur_freq_cfg_2; /*!< spur_freq_cfg = (spur_freq_cfg_msb_2 <<8) | spur_freq_cfg_2 */
|
||||
uint8_t spur_freq_cfg_div_2; /*!< spur_freq=spur_freq_cfg/spur_freq_cfg_div_2 */
|
||||
uint8_t spur_freq_en_h_2; /*!< the seventh bit for total enable */
|
||||
uint8_t spur_freq_en_l_2; /*!< each bit for 1 channel, and use [spur_freq_en_h, spur_freq_en_l] to select the spur's channel priority */
|
||||
uint8_t spur_freq_cfg_msb_3; /*!< third spur: */
|
||||
uint8_t spur_freq_cfg_3; /*!< spur_freq_cfg = (spur_freq_cfg_msb_3 <<8) | spur_freq_cfg_3 */
|
||||
uint8_t spur_freq_cfg_div_3; /*!< spur_freq=spur_freq_cfg/spur_freq_cfg_div_3 */
|
||||
uint8_t spur_freq_en_h_3; /*!< the seventh bit for total enable */
|
||||
uint8_t spur_freq_en_l_3; /*!< each bit for 1 channel, and use [spur_freq_en_h, spur_freq_en_l] to select the spur's channel priority, */
|
||||
uint8_t reserved[23]; /*!< reserved for future expansion */
|
||||
} esp_phy_init_data_t;
|
||||
|
||||
/**
|
||||
* @brief Opaque PHY calibration data
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t opaque[1904]; /*!< calibration data */
|
||||
} esp_phy_calibration_data_t;
|
||||
|
||||
typedef enum {
|
||||
PHY_RF_CAL_PARTIAL = 0x00000000, /*!< Do part of RF calibration. This should be used after power-on reset. */
|
||||
PHY_RF_CAL_NONE = 0x00000001, /*!< Don't do any RF calibration. This mode is only suggested to be used after deep sleep reset. */
|
||||
PHY_RF_CAL_FULL = 0x00000002 /*!< Do full RF calibration. Produces best results, but also consumes a lot of time and current. Suggested to be used once. */
|
||||
} esp_phy_calibration_mode_t;
|
||||
|
||||
/**
|
||||
* @brief Get PHY init data
|
||||
*
|
||||
* If "Use a partition to store PHY init data" option is set in menuconfig,
|
||||
* This function will load PHY init data from a partition. Otherwise,
|
||||
* PHY init data will be compiled into the application itself, and this function
|
||||
* will return a pointer to PHY init data located in read-only memory (DROM).
|
||||
*
|
||||
* If "Use a partition to store PHY init data" option is enabled, this function
|
||||
* may return NULL if the data loaded from flash is not valid.
|
||||
*
|
||||
* @note Call esp_phy_release_init_data to release the pointer obtained using
|
||||
* this function after the call to esp_wifi_init.
|
||||
*
|
||||
* @return pointer to PHY init data structure
|
||||
*/
|
||||
const esp_phy_init_data_t* esp_phy_get_init_data();
|
||||
|
||||
/**
|
||||
* @brief Release PHY init data
|
||||
* @param data pointer to PHY init data structure obtained from
|
||||
* esp_phy_get_init_data function
|
||||
*/
|
||||
void esp_phy_release_init_data(const esp_phy_init_data_t* data);
|
||||
|
||||
/**
|
||||
* @brief Function called by esp_phy_init to load PHY calibration data
|
||||
*
|
||||
* This is a convenience function which can be used to load PHY calibration
|
||||
* data from NVS. Data can be stored to NVS using esp_phy_store_cal_data_to_nvs
|
||||
* function.
|
||||
*
|
||||
* If calibration data is not present in the NVS, or
|
||||
* data is not valid (was obtained for a chip with a different MAC address,
|
||||
* or obtained for a different version of software), this function will
|
||||
* return an error.
|
||||
*
|
||||
* If "Initialize PHY in startup code" option is set in menuconfig, this
|
||||
* function will be used to load calibration data. To provide a different
|
||||
* mechanism for loading calibration data, disable
|
||||
* "Initialize PHY in startup code" option in menuconfig and call esp_phy_init
|
||||
* function from the application. For an example usage of esp_phy_init and
|
||||
* this function, see do_phy_init function in cpu_start.c
|
||||
*
|
||||
* @param out_cal_data pointer to calibration data structure to be filled with
|
||||
* loaded data.
|
||||
* @return ESP_OK on success
|
||||
*/
|
||||
esp_err_t esp_phy_load_cal_data_from_nvs(esp_phy_calibration_data_t* out_cal_data);
|
||||
|
||||
/**
|
||||
* @brief Function called by esp_phy_init to store PHY calibration data
|
||||
*
|
||||
* This is a convenience function which can be used to store PHY calibration
|
||||
* data to the NVS. Calibration data is returned by esp_phy_init function.
|
||||
* Data saved using this function to the NVS can later be loaded using
|
||||
* esp_phy_store_cal_data_to_nvs function.
|
||||
*
|
||||
* If "Initialize PHY in startup code" option is set in menuconfig, this
|
||||
* function will be used to store calibration data. To provide a different
|
||||
* mechanism for storing calibration data, disable
|
||||
* "Initialize PHY in startup code" option in menuconfig and call esp_phy_init
|
||||
* function from the application.
|
||||
*
|
||||
* @param cal_data pointer to calibration data which has to be saved.
|
||||
* @return ESP_OK on success
|
||||
*/
|
||||
esp_err_t esp_phy_store_cal_data_to_nvs(const esp_phy_calibration_data_t* cal_data);
|
||||
|
||||
/**
|
||||
* @brief Initialize PHY module
|
||||
*
|
||||
* PHY module should be initialized in order to use WiFi or BT.
|
||||
* If "Initialize PHY in startup code" option is set in menuconfig,
|
||||
* this function will be called automatically before app_main is called,
|
||||
* using parameters obtained from esp_phy_get_init_data.
|
||||
*
|
||||
* Applications which don't need to enable PHY on every start up should
|
||||
* disable this menuconfig option and call esp_phy_init before calling
|
||||
* esp_wifi_init or bt_controller_init. See do_phy_init function in
|
||||
* cpu_start.c for an example of using this function.
|
||||
*
|
||||
* @param init_data PHY parameters. Default set of parameters can
|
||||
* be obtained by calling esp_phy_get_default_init_data
|
||||
* function.
|
||||
* @param mode Calibration mode (Full, partial, or no calibration)
|
||||
* @param[inout] calibration_data
|
||||
* @return ESP_OK on success.
|
||||
*/
|
||||
esp_err_t esp_phy_init(const esp_phy_init_data_t* init_data,
|
||||
esp_phy_calibration_mode_t mode, esp_phy_calibration_data_t* calibration_data);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
@ -16,7 +16,7 @@
|
||||
#define __ESP_SYSTEM_H__
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "esp_err.h"
|
||||
#include "esp_deepsleep.h"
|
||||
|
||||
@ -24,166 +24,107 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** \defgroup System_APIs System APIs
|
||||
* @brief System APIs
|
||||
*/
|
||||
|
||||
/** @addtogroup System_APIs
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @attention application don't need to call this function anymore. It do nothing and will
|
||||
* be removed in future version.
|
||||
*/
|
||||
void system_init(void) __attribute__ ((deprecated));
|
||||
|
||||
|
||||
/**
|
||||
* @brief Get information of the SDK version.
|
||||
*
|
||||
* @param null
|
||||
*
|
||||
* @return Information of the SDK version.
|
||||
*/
|
||||
const char *system_get_sdk_version(void);
|
||||
|
||||
/**
|
||||
* @brief Reset to default settings.
|
||||
*
|
||||
* Reset to default settings of the following APIs : wifi_station_set_auto_connect,
|
||||
* wifi_set_phy_mode, wifi_softap_set_config related, wifi_station_set_config
|
||||
* related, and wifi_set_opmode.
|
||||
*
|
||||
* @param null
|
||||
*
|
||||
* @return null
|
||||
* Function has been deprecated, please use esp_wifi_restore instead.
|
||||
* This name will be removed in a future release.
|
||||
*/
|
||||
void system_restore(void);
|
||||
void system_restore(void) __attribute__ ((deprecated));
|
||||
|
||||
/**
|
||||
* @brief Restart PRO and APP CPUs.
|
||||
*
|
||||
* This function can be called both from PRO and APP CPUs.
|
||||
* After successful restart, CPU reset reason will be SW_CPU_RESET.
|
||||
* Peripherals (except for WiFi, BT, UART0, SPI1, and legacy timers) are not reset.
|
||||
* This function does not return.
|
||||
*/
|
||||
void esp_restart(void) __attribute__ ((noreturn));
|
||||
|
||||
/**
|
||||
* @brief Restart system.
|
||||
*
|
||||
* @param null
|
||||
*
|
||||
* @return null
|
||||
* Function has been renamed to esp_restart.
|
||||
* This name will be removed in a future release.
|
||||
*/
|
||||
void system_restart(void);
|
||||
void system_restart(void) __attribute__ ((deprecated, noreturn));
|
||||
|
||||
/**
|
||||
* @brief Get system time, unit: microsecond.
|
||||
*
|
||||
* @param null
|
||||
*
|
||||
* @return System time, unit: microsecond.
|
||||
* This function is deprecated. Use 'gettimeofday' function for 64-bit precision.
|
||||
* This definition will be removed in a future release.
|
||||
*/
|
||||
uint32_t system_get_time(void);
|
||||
uint32_t system_get_time(void) __attribute__ ((deprecated));
|
||||
|
||||
/**
|
||||
* @brief Get the size of available heap.
|
||||
*
|
||||
* @param null
|
||||
* Note that the returned value may be larger than the maximum contiguous block
|
||||
* which can be allocated.
|
||||
*
|
||||
* @return Available heap size.
|
||||
* @return Available heap size, in bytes.
|
||||
*/
|
||||
uint32_t system_get_free_heap_size(void);
|
||||
uint32_t esp_get_free_heap_size(void);
|
||||
|
||||
/**
|
||||
* @brief Get RTC time, unit: RTC clock cycle.
|
||||
* @brief Get the size of available heap.
|
||||
*
|
||||
* @param null
|
||||
* Function has been renamed to esp_get_free_heap_size.
|
||||
* This name will be removed in a future release.
|
||||
*
|
||||
* @return RTC time.
|
||||
* @return Available heap size, in bytes.
|
||||
*/
|
||||
uint64_t system_get_rtc_time(void);
|
||||
uint32_t system_get_free_heap_size(void) __attribute__ ((deprecated));
|
||||
|
||||
/**
|
||||
* @brief Read user data from the RTC memory.
|
||||
*
|
||||
* The user data segment (1024 bytes, as shown below) is used to store user data.
|
||||
*
|
||||
* |<---- system data(512 bytes) ---->|<----------- user data(1024 bytes) --------->|
|
||||
*
|
||||
* @attention Read and write unit for data stored in the RTC memory is 4 bytes.
|
||||
* @attention src_addr is the block number (4 bytes per block). So when reading data
|
||||
* at the beginning of the user data segment, src_addr will be 512/4 = 128,
|
||||
* n will be data length.
|
||||
*
|
||||
* @param uint16 src : source address of rtc memory, src_addr >= 128
|
||||
* @param void *dst : data pointer
|
||||
* @param uint16 n : data length, unit: byte
|
||||
*
|
||||
* @return true : succeed
|
||||
* @return false : fail
|
||||
*/
|
||||
bool system_rtc_mem_read(uint16_t src, void *dst, uint16_t n);
|
||||
|
||||
/**
|
||||
* @brief Write user data to the RTC memory.
|
||||
*
|
||||
* During deep-sleep, only RTC is working. So users can store their data
|
||||
* in RTC memory if it is needed. The user data segment below (1024 bytes)
|
||||
* is used to store the user data.
|
||||
*
|
||||
* |<---- system data(512 bytes) ---->|<----------- user data(1024 bytes) --------->|
|
||||
*
|
||||
* @attention Read and write unit for data stored in the RTC memory is 4 bytes.
|
||||
* @attention src_addr is the block number (4 bytes per block). So when storing data
|
||||
* at the beginning of the user data segment, src_addr will be 512/4 = 128,
|
||||
* n will be data length.
|
||||
*
|
||||
* @param uint16 src : source address of rtc memory, src_addr >= 128
|
||||
* @param void *dst : data pointer
|
||||
* @param uint16 n : data length, unit: byte
|
||||
*
|
||||
* @return true : succeed
|
||||
* @return false : fail
|
||||
*/
|
||||
bool system_rtc_mem_write(uint16_t dst, const void *src, uint16_t n);
|
||||
|
||||
/** \defgroup System_boot_APIs Boot APIs
|
||||
* @brief boot APIs
|
||||
*/
|
||||
|
||||
/** @addtogroup System_boot_APIs
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** \defgroup Hardware_MAC_APIs Hardware MAC APIs
|
||||
* @brief Hardware MAC address APIs
|
||||
*
|
||||
* In WiFi MAC, only ESP32 station MAC is the hardware MAC, ESP32 softAP MAC is a software MAC
|
||||
* calculated from ESP32 station MAC.
|
||||
* So users need to call wifi_get_macaddr to query the ESP32 softAP MAC if ESP32 station MAC changed.
|
||||
*
|
||||
*/
|
||||
|
||||
/** @addtogroup Hardware_MAC_APIs
|
||||
* @{
|
||||
*/
|
||||
* @brief Get one random 32-bit word from hardware RNG
|
||||
*
|
||||
* @return random value between 0 and UINT32_MAX
|
||||
*/
|
||||
uint32_t esp_random(void);
|
||||
|
||||
/**
|
||||
* @brief Read hardware MAC address.
|
||||
*
|
||||
* @param uint8 mac[6] : the hardware MAC address, length: 6 bytes.
|
||||
* In WiFi MAC, only ESP32 station MAC is the hardware MAC, ESP32 softAP MAC is a software MAC
|
||||
* calculated from ESP32 station MAC.
|
||||
* So users need to call esp_wifi_get_macaddr to query the ESP32 softAP MAC if ESP32 station MAC changed.
|
||||
*
|
||||
* @return esp_err_t
|
||||
* @param mac hardware MAC address, length: 6 bytes.
|
||||
*
|
||||
* @return ESP_OK on success
|
||||
*/
|
||||
esp_err_t system_efuse_read_mac(uint8_t mac[6]);
|
||||
|
||||
esp_err_t esp_efuse_read_mac(uint8_t* mac);
|
||||
|
||||
/**
|
||||
* @}
|
||||
* @brief Read hardware MAC address.
|
||||
*
|
||||
* Function has been renamed to esp_efuse_read_mac.
|
||||
* This name will be removed in a future release.
|
||||
*
|
||||
* @param mac hardware MAC address, length: 6 bytes.
|
||||
* @return ESP_OK on success
|
||||
*/
|
||||
|
||||
esp_err_t system_efuse_read_mac(uint8_t mac[6]) __attribute__ ((deprecated));
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
* Get SDK version
|
||||
*
|
||||
* This function is deprecated and will be removed in a future release.
|
||||
*
|
||||
* @return constant string "master"
|
||||
*/
|
||||
const char* system_get_sdk_version(void) __attribute__ ((deprecated));
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
@ -22,52 +22,4 @@
|
||||
#include <stdbool.h>
|
||||
#include <stddef.h>
|
||||
|
||||
#define __ATTRIB_PACK __attribute__ ((packed))
|
||||
#define __ATTRIB_PRINTF __attribute__ ((format (printf, 1, 2)))
|
||||
#define __ATTRIB_NORETURN __attribute__ ((noreturn))
|
||||
#define __ATTRIB_ALIGN(x) __attribute__ ((aligned((x))))
|
||||
#define INLINE __inline__
|
||||
|
||||
#define LOCAL static
|
||||
|
||||
/* probably should not put STATUS here */
|
||||
typedef enum {
|
||||
OK = 0,
|
||||
FAIL,
|
||||
PENDING,
|
||||
BUSY,
|
||||
CANCEL,
|
||||
} STATUS;
|
||||
|
||||
//#define _LITTLE_ENDIAN 1234
|
||||
//#define _BYTE_ORDER == _LITTLE_ENDIAN
|
||||
|
||||
#define ASSERT( x ) do { \
|
||||
if (!(x)) { \
|
||||
printf("%s %u\n", __FILE__, __LINE__); \
|
||||
while (1) { \
|
||||
asm volatile("nop"); \
|
||||
}; \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
/* #if __GNUC_PREREQ__(4, 1) */
|
||||
#ifndef __GNUC__
|
||||
#if 1
|
||||
#define __offsetof(type, field) __builtin_offsetof(type, field)
|
||||
#else
|
||||
#define __offsetof(type, field) ((size_t)(&((type *)0)->field))
|
||||
#endif
|
||||
#endif /* __GNUC__ */
|
||||
|
||||
|
||||
/* Macros for counting and rounding. */
|
||||
#ifndef howmany
|
||||
#define howmany(x, y) (((x)+((y)-1))/(y))
|
||||
#endif
|
||||
|
||||
#define container_of(ptr, type, member) ({ \
|
||||
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
|
||||
(type *)( (char *)__mptr - __offsetof(type,member) );})
|
||||
|
||||
#endif /* __ESP_TYPES_H__ */
|
||||
|
@ -186,6 +186,21 @@ esp_err_t esp_wifi_start(void);
|
||||
*/
|
||||
esp_err_t esp_wifi_stop(void);
|
||||
|
||||
/**
|
||||
* @brief Restore WiFi stack persistent settings to default values
|
||||
*
|
||||
* This function will reset settings made using the following APIs:
|
||||
* - esp_wifi_get_auto_connect,
|
||||
* - esp_wifi_set_protocol,
|
||||
* - esp_wifi_set_config related
|
||||
* - esp_wifi_set_mode
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK: succeed
|
||||
* - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by eps_wifi_init
|
||||
*/
|
||||
esp_err_t esp_wifi_restore(void);
|
||||
|
||||
/**
|
||||
* @brief Connect the ESP32 WiFi station to the AP.
|
||||
*
|
||||
|
@ -43,10 +43,9 @@ extern "C" {
|
||||
/**
|
||||
* @brief get whether the wifi driver is allowed to transmit data or not
|
||||
*
|
||||
* @param none
|
||||
*
|
||||
* @return true : upper layer should stop to transmit data to wifi driver
|
||||
* @return false : upper layer can transmit data to wifi driver
|
||||
* @return
|
||||
* - true : upper layer should stop to transmit data to wifi driver
|
||||
* - false : upper layer can transmit data to wifi driver
|
||||
*/
|
||||
bool esp_wifi_internal_tx_is_stop(void);
|
||||
|
||||
@ -54,8 +53,6 @@ bool esp_wifi_internal_tx_is_stop(void);
|
||||
* @brief free the rx buffer which allocated by wifi driver
|
||||
*
|
||||
* @param void* buffer: rx buffer pointer
|
||||
*
|
||||
* @return nonoe
|
||||
*/
|
||||
void esp_wifi_internal_free_rx_buffer(void* buffer);
|
||||
|
||||
@ -78,7 +75,6 @@ int esp_wifi_internal_tx(wifi_interface_t wifi_if, void *buffer, u16_t len);
|
||||
* @brief The WiFi RX callback function
|
||||
*
|
||||
* Each time the WiFi need to forward the packets to high layer, the callback function will be called
|
||||
*
|
||||
*/
|
||||
typedef esp_err_t (*wifi_rxcb_t)(void *buffer, uint16_t len, void *eb);
|
||||
|
||||
@ -90,18 +86,18 @@ typedef esp_err_t (*wifi_rxcb_t)(void *buffer, uint16_t len, void *eb);
|
||||
* @param wifi_interface_t ifx : interface
|
||||
* @param wifi_rxcb_t fn : WiFi RX callback
|
||||
*
|
||||
* @return ESP_OK : succeed
|
||||
* @return others : fail
|
||||
* @return
|
||||
* - ESP_OK : succeed
|
||||
* - others : fail
|
||||
*/
|
||||
esp_err_t esp_wifi_internal_reg_rxcb(wifi_interface_t ifx, wifi_rxcb_t fn);
|
||||
|
||||
/**
|
||||
* @brief Notify WIFI driver that the station got ip successfully
|
||||
*
|
||||
* @param none
|
||||
*
|
||||
* @return ESP_OK : succeed
|
||||
* @return others : fail
|
||||
* @return
|
||||
* - ESP_OK : succeed
|
||||
* - others : fail
|
||||
*/
|
||||
esp_err_t esp_wifi_internal_set_sta_ip(void);
|
||||
|
||||
|
@ -605,6 +605,14 @@ void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
|
||||
|
||||
#define ETS_MEM_BAR() asm volatile ( "" : : : "memory" )
|
||||
|
||||
typedef enum {
|
||||
OK = 0,
|
||||
FAIL,
|
||||
PENDING,
|
||||
BUSY,
|
||||
CANCEL,
|
||||
} STATUS;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -17,6 +17,7 @@
|
||||
|
||||
#include "esp_types.h"
|
||||
#include "esp_attr.h"
|
||||
#include "ets_sys.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -51,7 +51,10 @@ static inline void cpu_write_itlb(unsigned vpn, unsigned attr)
|
||||
asm volatile ("witlb %1, %0; isync\n" :: "r" (vpn), "r" (attr));
|
||||
}
|
||||
|
||||
/* Make page 0 access raise an exception.
|
||||
/**
|
||||
* @brief Configure memory region protection
|
||||
*
|
||||
* Make page 0 access raise an exception.
|
||||
* Also protect some other unused pages so we can catch weirdness.
|
||||
* Useful attribute values:
|
||||
* 0 — cached, RW
|
||||
@ -70,9 +73,7 @@ static inline void cpu_configure_region_protection()
|
||||
cpu_write_itlb(0x20000000, 0);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*
|
||||
/**
|
||||
* @brief Set CPU frequency to the value defined in menuconfig
|
||||
*
|
||||
* Called from cpu_start.c, not intended to be called from other places.
|
||||
@ -81,4 +82,16 @@ static inline void cpu_configure_region_protection()
|
||||
*/
|
||||
void esp_set_cpu_freq(void);
|
||||
|
||||
/**
|
||||
* @brief Stall CPU using RTC controller
|
||||
* @param cpu_id ID of the CPU to stall (0 = PRO, 1 = APP)
|
||||
*/
|
||||
void esp_cpu_stall(int cpu_id);
|
||||
|
||||
/**
|
||||
* @brief Un-stall CPU using RTC controller
|
||||
* @param cpu_id ID of the CPU to un-stall (0 = PRO, 1 = APP)
|
||||
*/
|
||||
void esp_cpu_unstall(int cpu_id);
|
||||
|
||||
#endif
|
||||
|
@ -1028,6 +1028,7 @@
|
||||
#define DPORT_WIFI_RST_EN_REG (DR_REG_DPORT_BASE + 0x0D0)
|
||||
/* DPORT_WIFI_RST : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
|
||||
/*description: */
|
||||
#define DPORT_MAC_RST (BIT(2))
|
||||
#define DPORT_WIFI_RST 0xFFFFFFFF
|
||||
#define DPORT_WIFI_RST_M ((DPORT_WIFI_RST_V)<<(DPORT_WIFI_RST_S))
|
||||
#define DPORT_WIFI_RST_V 0xFFFFFFFF
|
||||
|
37
tools/sdk/include/esp32/soc/hwcrypto_reg.h
Normal file
37
tools/sdk/include/esp32/soc/hwcrypto_reg.h
Normal file
@ -0,0 +1,37 @@
|
||||
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
#ifndef __HWCRYPTO_REG_H__
|
||||
#define __HWCRYPTO_REG_H__
|
||||
|
||||
#include "soc.h"
|
||||
|
||||
/* registers for RSA acceleration via Multiple Precision Integer ops */
|
||||
#define RSA_MEM_M_BLOCK_BASE ((DR_REG_RSA_BASE)+0x000)
|
||||
/* RB & Z use the same memory block, depending on phase of operation */
|
||||
#define RSA_MEM_RB_BLOCK_BASE ((DR_REG_RSA_BASE)+0x200)
|
||||
#define RSA_MEM_Z_BLOCK_BASE ((DR_REG_RSA_BASE)+0x200)
|
||||
#define RSA_MEM_Y_BLOCK_BASE ((DR_REG_RSA_BASE)+0x400)
|
||||
#define RSA_MEM_X_BLOCK_BASE ((DR_REG_RSA_BASE)+0x600)
|
||||
|
||||
#define RSA_M_DASH_REG (DR_REG_RSA_BASE + 0x800)
|
||||
#define RSA_MODEXP_MODE_REG (DR_REG_RSA_BASE + 0x804)
|
||||
#define RSA_START_MODEXP_REG (DR_REG_RSA_BASE + 0x808)
|
||||
#define RSA_MULT_MODE_REG (DR_REG_RSA_BASE + 0x80c)
|
||||
#define RSA_MULT_START_REG (DR_REG_RSA_BASE + 0x810)
|
||||
|
||||
#define RSA_INTERRUPT_REG (DR_REG_RSA_BASE + 0X814)
|
||||
|
||||
#define RSA_CLEAN_ADDR (DR_REG_RSA_BASE + 0X818)
|
||||
|
||||
#endif
|
@ -1319,6 +1319,36 @@
|
||||
#define PCNT_CORE_STATUS_U0_M ((PCNT_CORE_STATUS_U0_V)<<(PCNT_CORE_STATUS_U0_S))
|
||||
#define PCNT_CORE_STATUS_U0_V 0xFFFFFFFF
|
||||
#define PCNT_CORE_STATUS_U0_S 0
|
||||
/*0: positive value to zero; 1: negative value to zero; 2: counter value negative ; 3: counter value positive*/
|
||||
#define PCNT_STATUS_CNT_MODE 0x3
|
||||
#define PCNT_STATUS_CNT_MODE_M ((PCNT_STATUS_CNT_MODE_V)<<(PCNT_STATUS_CNT_MODE_S))
|
||||
#define PCNT_STATUS_CNT_MODE_V 0x3
|
||||
#define PCNT_STATUS_CNT_MODE_S 0
|
||||
/* counter value equals to thresh1*/
|
||||
#define PCNT_STATUS_THRES1 BIT(2)
|
||||
#define PCNT_STATUS_THRES1_M BIT(2)
|
||||
#define PCNT_STATUS_THRES1_V 0x1
|
||||
#define PCNT_STATUS_THRES1_S 2
|
||||
/* counter value equals to thresh0*/
|
||||
#define PCNT_STATUS_THRES0 BIT(3)
|
||||
#define PCNT_STATUS_THRES0_M BIT(3)
|
||||
#define PCNT_STATUS_THRES0_V 0x1
|
||||
#define PCNT_STATUS_THRES0_S 3
|
||||
/* counter value reaches h_lim*/
|
||||
#define PCNT_STATUS_L_LIM BIT(4)
|
||||
#define PCNT_STATUS_L_LIM_M BIT(4)
|
||||
#define PCNT_STATUS_L_LIM_V 0x1
|
||||
#define PCNT_STATUS_L_LIM_S 4
|
||||
/* counter value reaches l_lim*/
|
||||
#define PCNT_STATUS_H_LIM BIT(5)
|
||||
#define PCNT_STATUS_H_LIM_M BIT(5)
|
||||
#define PCNT_STATUS_H_LIM_V 0x1
|
||||
#define PCNT_STATUS_H_LIM_S 5
|
||||
/* counter value equals to zero*/
|
||||
#define PCNT_STATUS_ZERO BIT(6)
|
||||
#define PCNT_STATUS_ZERO_M BIT(6)
|
||||
#define PCNT_STATUS_ZERO_V 0x1
|
||||
#define PCNT_STATUS_ZERO_S 6
|
||||
|
||||
#define PCNT_U1_STATUS_REG (DR_REG_PCNT_BASE + 0x0094)
|
||||
/* PCNT_CORE_STATUS_U1 : RO ;bitpos:[31:0] ;default: 32'h0 ; */
|
||||
|
@ -113,7 +113,18 @@ typedef volatile struct {
|
||||
};
|
||||
uint32_t val;
|
||||
} int_clr;
|
||||
uint32_t status_unit[8];
|
||||
union {
|
||||
struct {
|
||||
uint32_t cnt_mode:2; /*0: positive value to zero; 1: negative value to zero; 2: counter value negative ; 3: counter value positive*/
|
||||
uint32_t thres1_lat:1; /* counter value equals to thresh1*/
|
||||
uint32_t thres0_lat:1; /* counter value equals to thresh0*/
|
||||
uint32_t l_lim_lat:1; /* counter value reaches h_lim*/
|
||||
uint32_t h_lim_lat:1; /* counter value reaches l_lim*/
|
||||
uint32_t zero_lat:1; /* counter value equals zero*/
|
||||
uint32_t reserved7:25;
|
||||
};
|
||||
uint32_t val;
|
||||
} status_unit[8];
|
||||
union {
|
||||
struct {
|
||||
uint32_t cnt_rst_u0: 1; /*Set this bit to clear unit0's counter.*/
|
||||
|
@ -2163,7 +2163,8 @@
|
||||
#define RMT_DATE_V 0xFFFFFFFF
|
||||
#define RMT_DATE_S 0
|
||||
|
||||
|
||||
/* RMT memory block address */
|
||||
#define RMT_CHANNEL_MEM(i) (DR_REG_RMT_BASE + 0x800 + 64 * 4 * (i))
|
||||
|
||||
|
||||
#endif /*_SOC_RMT_REG_H_ */
|
||||
|
@ -226,18 +226,35 @@ typedef volatile struct {
|
||||
} rmt_dev_t;
|
||||
extern rmt_dev_t RMT;
|
||||
|
||||
//Allow access to RMT memory using RMTMEM.chan[0].data[8]
|
||||
typedef struct {
|
||||
union {
|
||||
struct {
|
||||
uint32_t duration0 :15;
|
||||
uint32_t level0 :1;
|
||||
uint32_t duration1 :15;
|
||||
uint32_t level1 :1;
|
||||
};
|
||||
uint32_t val;
|
||||
};
|
||||
} rmt_item32_t;
|
||||
|
||||
typedef struct {
|
||||
union {
|
||||
struct {
|
||||
uint16_t duration :15;
|
||||
uint16_t level :1;
|
||||
};
|
||||
uint16_t val;
|
||||
};
|
||||
} rmt_item16_t;
|
||||
|
||||
//Allow access to RMT memory using RMTMEM.chan[0].data32[8]
|
||||
typedef volatile struct {
|
||||
struct {
|
||||
union {
|
||||
struct {
|
||||
uint32_t duration0: 15;
|
||||
uint32_t level0: 1;
|
||||
uint32_t duration1: 15;
|
||||
uint32_t level1: 1;
|
||||
};
|
||||
uint32_t val;
|
||||
} data[64];
|
||||
rmt_item32_t data32[64];
|
||||
rmt_item16_t data16[128];
|
||||
};
|
||||
} chan[8];
|
||||
} rmt_mem_t;
|
||||
extern rmt_mem_t RMTMEM;
|
||||
|
@ -129,10 +129,10 @@
|
||||
//}}
|
||||
|
||||
//Periheral Clock {{
|
||||
#define APB_CLK_FREQ_ROM 26*1000000
|
||||
#define APB_CLK_FREQ_ROM ( 26*1000000 )
|
||||
#define CPU_CLK_FREQ_ROM APB_CLK_FREQ_ROM
|
||||
#define CPU_CLK_FREQ APB_CLK_FREQ
|
||||
#define APB_CLK_FREQ 80*1000000 //unit: Hz
|
||||
#define APB_CLK_FREQ ( 80*1000000 ) //unit: Hz
|
||||
#define UART_CLK_FREQ APB_CLK_FREQ
|
||||
#define WDT_CLK_FREQ APB_CLK_FREQ
|
||||
#define TIMER_CLK_FREQ (80000000>>4) //80MHz divided by 16
|
||||
@ -141,6 +141,7 @@
|
||||
//}}
|
||||
|
||||
#define DR_REG_DPORT_BASE 0x3ff00000
|
||||
#define DR_REG_RSA_BASE 0x3ff02000
|
||||
#define DR_REG_UART_BASE 0x3ff40000
|
||||
#define DR_REG_SPI1_BASE 0x3ff42000
|
||||
#define DR_REG_SPI0_BASE 0x3ff43000
|
||||
|
18
tools/sdk/include/esp32/soc/wdev_reg.h
Normal file
18
tools/sdk/include/esp32/soc/wdev_reg.h
Normal file
@ -0,0 +1,18 @@
|
||||
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
|
||||
/* Hardware random number generator register */
|
||||
#define WDEV_RND_REG 0x60035144
|
@ -42,7 +42,7 @@
|
||||
* share the name with the existing functions from hal.h.
|
||||
* Including this header file will define XTHAL_USE_CACHE_MACROS
|
||||
* which directs hal.h not to use the functions.
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
* Single-cache-line operations in C-callable inline assembly.
|
||||
|
Reference in New Issue
Block a user