mirror of
https://github.com/0xFEEDC0DE64/arduino-esp32.git
synced 2025-07-02 05:20:59 +02:00
Update IDF to 9a26296
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@ -189,11 +189,7 @@ extern "C" {
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#endif
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#ifndef INCLUDE_pcTaskGetTaskName
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#if ( configENABLE_MEMORY_DEBUG == 1)
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#define INCLUDE_pcTaskGetTaskName 1
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#else
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#define INCLUDE_pcTaskGetTaskName 0
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#endif
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#endif
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#ifndef configUSE_APPLICATION_TASK_TAG
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@ -978,13 +974,14 @@ typedef struct xSTATIC_QUEUE
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uint8_t ucDummy9;
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#endif
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struct {
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volatile uint32_t ucDummy10;
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#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
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void *pvDummy8;
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UBaseType_t uxDummy11;
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#endif
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} sDummy12;
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struct {
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volatile uint32_t ucDummy10;
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uint32_t ucDummy11;
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#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
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void *pvDummy8;
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UBaseType_t uxDummy12;
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#endif
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} sDummy1;
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} StaticQueue_t;
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typedef StaticQueue_t StaticSemaphore_t;
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@ -231,12 +231,6 @@
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#define INCLUDE_pcTaskGetTaskName 1
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#define INCLUDE_xTaskGetIdleTaskHandle 1
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#if CONFIG_ENABLE_MEMORY_DEBUG
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#define configENABLE_MEMORY_DEBUG 1
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#else
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#define configENABLE_MEMORY_DEBUG 0
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#endif
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#define INCLUDE_xSemaphoreGetMutexHolder 1
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/* The priority at which the tick interrupt runs. This should probably be
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@ -123,6 +123,7 @@ extern "C" {
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#endif
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#include "mpu_wrappers.h"
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#include "esp_system.h"
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/*
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* Setup the stack of a new task so it is ready to be placed under the
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@ -143,11 +144,10 @@ extern "C" {
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* non-FreeRTOS-specific code, and behave the same as
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* pvPortMalloc()/vPortFree().
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*/
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void *pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
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void vPortFree( void *pv ) PRIVILEGED_FUNCTION;
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void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
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size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
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size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
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#define pvPortMalloc malloc
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#define vPortFree free
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#define xPortGetFreeHeapSize esp_get_free_heap_size
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#define xPortGetMinimumEverFreeHeapSize esp_get_minimum_free_heap_size
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/*
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* Setup the hardware ready for the scheduler to take control. This generally
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@ -197,9 +197,9 @@ BaseType_t xPortInIsrContext();
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#endif
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/* Multi-core: get current core ID */
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static inline uint32_t xPortGetCoreID() {
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static inline uint32_t IRAM_ATTR xPortGetCoreID() {
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int id;
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asm volatile(
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asm (
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"rsr.prid %0\n"
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" extui %0,%0,13,1"
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:"=r"(id));
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@ -121,12 +121,14 @@ typedef unsigned portBASE_TYPE UBaseType_t;
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#include "portbenchmark.h"
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#include "sdkconfig.h"
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#include "esp_attr.h"
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#define portFIRST_TASK_HOOK CONFIG_FREERTOS_BREAK_ON_SCHEDULER_START_JTAG
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typedef struct {
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volatile uint32_t mux;
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uint32_t owner;
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uint32_t count;
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#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
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const char *lastLockedFn;
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int lastLockedLine;
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@ -142,24 +144,23 @@ typedef struct {
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* The magic number in the top 16 bits is there so we can detect uninitialized and corrupted muxes.
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*/
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#define portMUX_MAGIC_VAL 0xB33F0000
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#define portMUX_FREE_VAL 0xB33FFFFF
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#define portMUX_MAGIC_MASK 0xFFFF0000
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#define portMUX_MAGIC_SHIFT 16
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#define portMUX_CNT_MASK 0x0000FF00
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#define portMUX_CNT_SHIFT 8
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#define portMUX_VAL_MASK 0x000000FF
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#define portMUX_VAL_SHIFT 0
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/* Special constants for vPortCPUAcquireMutexTimeout() */
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#define portMUX_NO_TIMEOUT (-1) /* When passed for 'timeout_cycles', spin forever if necessary */
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#define portMUX_TRY_LOCK 0 /* Try to acquire the spinlock a single time only */
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//Keep this in sync with the portMUX_TYPE struct definition please.
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#ifndef CONFIG_FREERTOS_PORTMUX_DEBUG
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#define portMUX_INITIALIZER_UNLOCKED { \
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.mux = portMUX_MAGIC_VAL|portMUX_FREE_VAL \
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#define portMUX_INITIALIZER_UNLOCKED { \
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.owner = portMUX_FREE_VAL, \
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.count = 0, \
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}
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#else
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#define portMUX_INITIALIZER_UNLOCKED { \
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.mux = portMUX_MAGIC_VAL|portMUX_FREE_VAL, \
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.lastLockedFn = "(never locked)", \
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#define portMUX_INITIALIZER_UNLOCKED { \
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.owner = portMUX_FREE_VAL, \
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.count = 0, \
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.lastLockedFn = "(never locked)", \
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.lastLockedLine = -1 \
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}
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#endif
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@ -172,8 +173,7 @@ typedef struct {
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#define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
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void vPortAssertIfInISR();
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#define portCRITICAL_NESTING_IN_TCB 1
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#define portCRITICAL_NESTING_IN_TCB 1
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/*
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Modifications to portENTER_CRITICAL:
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@ -202,7 +202,10 @@ behaviour; please keep this in mind if you need any compatibility with other Fre
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void vPortCPUInitializeMutex(portMUX_TYPE *mux);
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#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
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void vPortCPUAcquireMutex(portMUX_TYPE *mux, const char *function, int line);
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bool vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout_cycles, const char *function, int line);
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portBASE_TYPE vPortCPUReleaseMutex(portMUX_TYPE *mux, const char *function, int line);
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void vTaskEnterCritical( portMUX_TYPE *mux, const char *function, int line );
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void vTaskExitCritical( portMUX_TYPE *mux, const char *function, int line );
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#define portENTER_CRITICAL(mux) vTaskEnterCritical(mux, __FUNCTION__, __LINE__)
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@ -213,7 +216,18 @@ void vTaskExitCritical( portMUX_TYPE *mux, const char *function, int line );
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void vTaskExitCritical( portMUX_TYPE *mux );
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void vTaskEnterCritical( portMUX_TYPE *mux );
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void vPortCPUAcquireMutex(portMUX_TYPE *mux);
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portBASE_TYPE vPortCPUReleaseMutex(portMUX_TYPE *mux);
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/** @brief Acquire a portmux spinlock with a timeout
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*
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* @param mux Pointer to portmux to acquire.
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* @param timeout_cycles Timeout to spin, in CPU cycles. Pass portMUX_NO_TIMEOUT to wait forever,
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* portMUX_TRY_LOCK to try a single time to acquire the lock.
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*
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* @return true if mutex is successfully acquired, false on timeout.
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*/
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bool vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout_cycles);
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void vPortCPUReleaseMutex(portMUX_TYPE *mux);
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#define portENTER_CRITICAL(mux) vTaskEnterCritical(mux)
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#define portEXIT_CRITICAL(mux) vTaskExitCritical(mux)
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#define portENTER_CRITICAL_ISR(mux) vTaskEnterCritical(mux)
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@ -242,9 +256,8 @@ static inline unsigned portENTER_CRITICAL_NESTED() { unsigned state = XTOS_SET_I
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* ESP32, though. (Would show up directly if it did because the magic wouldn't match.)
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*/
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static inline void uxPortCompareSet(volatile uint32_t *addr, uint32_t compare, uint32_t *set) {
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__asm__ __volatile__(
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__asm__ __volatile__ (
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"WSR %2,SCOMPARE1 \n"
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"ISYNC \n"
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"S32C1I %0, %1, 0 \n"
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:"=r"(*set)
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:"r"(addr), "r"(compare), "0"(*set)
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@ -314,11 +314,10 @@ STRUCT_END(XtSolFrame)
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/*
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Macro to get the current core ID. Only uses the reg given as an argument.
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Reading PRID on the ESP108 architecture gives us 0xCDCD on the PRO processor
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and 0xABAB on the APP CPU. We distinguish between the two by simply checking
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bit 1: it's 1 on the APP and 0 on the PRO processor.
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Reading PRID on the ESP32 gives us 0xCDCD on the PRO processor (0)
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and 0xABAB on the APP CPU (1). We distinguish between the two by simply checking
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bit 13: it's 1 on the APP and 0 on the PRO processor.
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*/
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#ifdef __ASSEMBLER__
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.macro getcoreid reg
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rsr.prid \reg
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@ -326,7 +325,8 @@ STRUCT_END(XtSolFrame)
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.endm
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#endif
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#define CORE_ID_PRO 0xCDCD
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#define CORE_ID_APP 0xABAB
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/*
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-------------------------------------------------------------------------------
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