mirror of
https://github.com/0xFEEDC0DE64/arduino-esp32.git
synced 2025-07-01 21:10:58 +02:00
Update IDF libs to 9314bf0
This commit is contained in:
me-no-dev
@ -109,6 +109,17 @@ esp_err_t adc1_config_channel_atten(adc1_channel_t channel, adc_atten_t atten);
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*/
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int adc1_get_voltage(adc1_channel_t channel);
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/**
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* @brief Configure ADC1 to be usable by the ULP
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*
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* This function reconfigures ADC1 to be controlled by the ULP.
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* Effect of this function can be reverted using adc1_get_voltage function.
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*
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* Note that adc1_config_channel_atten, adc1_config_width functions need
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* to be called to configure ADC1 channels, before ADC1 is used by the ULP.
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*/
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void adc1_ulp_enable();
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/**
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* @brief Read Hall Sensor
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*
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@ -28,7 +28,7 @@ typedef enum {
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DAC_CHANNEL_MAX,
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} dac_channel_t;
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/** @cond */
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/**
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* @brief Set DAC output voltage.
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*
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@ -45,6 +45,7 @@ typedef enum {
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t dac_out_voltage(dac_channel_t channel, uint8_t dac_value) __attribute__ ((deprecated));
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/** @endcond */
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/**
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* @brief Set DAC output voltage.
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@ -31,7 +31,13 @@ extern "C" {
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#define GPIO_SEL_0 (BIT(0)) /*!< Pin 0 selected */
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#define GPIO_SEL_1 (BIT(1)) /*!< Pin 1 selected */
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#define GPIO_SEL_2 (BIT(2)) /*!< Pin 2 selected */
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#define GPIO_SEL_2 (BIT(2)) /*!< Pin 2 selected
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@note There are more macros
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like that up to pin 39,
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excluding pins 20, 24 and 28..31.
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They are not shown here
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to reduce redundant information. */
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/** @cond */
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#define GPIO_SEL_3 (BIT(3)) /*!< Pin 3 selected */
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#define GPIO_SEL_4 (BIT(4)) /*!< Pin 4 selected */
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#define GPIO_SEL_5 (BIT(5)) /*!< Pin 5 selected */
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@ -114,14 +120,21 @@ extern "C" {
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#define GPIO_MODE_DEF_OD (BIT2)
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#define GPIO_PIN_COUNT 40
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/** @endcond */
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extern const uint32_t GPIO_PIN_MUX_REG[GPIO_PIN_COUNT];
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#define GPIO_IS_VALID_GPIO(gpio_num) ((gpio_num < GPIO_PIN_COUNT && GPIO_PIN_MUX_REG[gpio_num] != 0)) //to decide whether it is a valid GPIO number
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#define GPIO_IS_VALID_OUTPUT_GPIO(gpio_num) ((GPIO_IS_VALID_GPIO(gpio_num)) && (gpio_num < 34)) //to decide whether it can be a valid GPIO number of output mode
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#define GPIO_IS_VALID_GPIO(gpio_num) ((gpio_num < GPIO_PIN_COUNT && GPIO_PIN_MUX_REG[gpio_num] != 0)) /*!< Check whether it is a valid GPIO number */
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#define GPIO_IS_VALID_OUTPUT_GPIO(gpio_num) ((GPIO_IS_VALID_GPIO(gpio_num)) && (gpio_num < 34)) /*!< Check whether it can be a valid GPIO number of output mode */
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typedef enum {
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GPIO_NUM_0 = 0, /*!< GPIO0, input and output */
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GPIO_NUM_1 = 1, /*!< GPIO1, input and output */
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GPIO_NUM_2 = 2, /*!< GPIO2, input and output */
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GPIO_NUM_2 = 2, /*!< GPIO2, input and output
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@note There are more enumerations like that
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up to GPIO39, excluding GPIO20, GPIO24 and GPIO28..31.
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They are not shown here to reduce redundant information.
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@note GPIO34..39 are input mode only. */
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/** @cond */
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GPIO_NUM_3 = 3, /*!< GPIO3, input and output */
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GPIO_NUM_4 = 4, /*!< GPIO4, input and output */
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GPIO_NUM_5 = 5, /*!< GPIO5, input and output */
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@ -157,6 +170,7 @@ typedef enum {
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GPIO_NUM_38 = 38, /*!< GPIO38, input mode only */
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GPIO_NUM_39 = 39, /*!< GPIO39, input mode only */
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GPIO_NUM_MAX = 40,
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/** @endcond */
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} gpio_num_t;
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typedef enum {
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@ -412,7 +426,7 @@ esp_err_t gpio_pulldown_dis(gpio_num_t gpio_num);
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/**
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* @brief Install the driver's GPIO ISR handler service, which allows per-pin GPIO interrupt handlers.
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*
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* This function is incompatible with gpio_isr_register() - if that function is used, a single global ISR is registered for all GPIO interrupts. If this function is used, the ISR service provides a global GPIO ISR and individual pin handlers are registered via the gpio_isr_register() function.
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* This function is incompatible with gpio_isr_register() - if that function is used, a single global ISR is registered for all GPIO interrupts. If this function is used, the ISR service provides a global GPIO ISR and individual pin handlers are registered via the gpio_isr_handler_add() function.
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*
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* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
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* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
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48
tools/sdk/include/driver/driver/rtc_cntl.h
Normal file
48
tools/sdk/include/driver/driver/rtc_cntl.h
Normal file
@ -0,0 +1,48 @@
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// Copyright 2016-2017 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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||||
// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include <stdint.h>
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#include "esp_err.h"
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#include "esp_intr_alloc.h"
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/**
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* @brief Register a handler for specific RTC_CNTL interrupts
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*
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* Multiple handlers can be registered using this function. Whenever an
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* RTC interrupt happens, all handlers with matching rtc_intr_mask values
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* will be called.
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*
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* @param handler handler function to call
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* @param handler_arg argument to be passed to the handler
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* @param rtc_intr_mask combination of RTC_CNTL_*_INT_ENA bits indicating the
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* sources to call the handler for
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* @return
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* - ESP_OK on success
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* - ESP_ERR_NO_MEM not enough memory to allocate handler structure
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* - other errors returned by esp_intr_alloc
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*/
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esp_err_t rtc_isr_register(intr_handler_t handler, void* handler_arg,
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uint32_t rtc_intr_mask);
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/**
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* @brief Deregister the handler previously registered using rtc_isr_register
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* @param handler handler function to call (as passed to rtc_isr_register)
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* @param handler_arg argument of the handler (as passed to rtc_isr_register)
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* @return
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* - ESP_OK on success
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* - ESP_ERR_INVALID_STATE if a handler matching both handler and
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* handler_arg isn't registered
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*/
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esp_err_t rtc_isr_deregister(intr_handler_t handler, void* handler_arg);
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@ -30,6 +30,7 @@
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#define MMC_SELECT_CARD 7 /* R1 */
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#define MMC_SEND_EXT_CSD 8 /* R1 */
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#define MMC_SEND_CSD 9 /* R2 */
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#define MMC_SEND_CID 10 /* R1 */
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#define MMC_STOP_TRANSMISSION 12 /* R1B */
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#define MMC_SEND_STATUS 13 /* R1 */
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#define MMC_SET_BLOCKLEN 16 /* R1 */
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@ -44,9 +45,12 @@
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#define SD_SEND_RELATIVE_ADDR 3 /* R6 */
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#define SD_SEND_SWITCH_FUNC 6 /* R1 */
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#define SD_SEND_IF_COND 8 /* R7 */
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#define SD_READ_OCR 58 /* R3 */
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#define SD_CRC_ON_OFF 59 /* R1 */
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/* SD application commands */ /* response type */
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#define SD_APP_SET_BUS_WIDTH 6 /* R1 */
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#define SD_APP_SD_STATUS 13 /* R2 */
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#define SD_APP_OP_COND 41 /* R3 */
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#define SD_APP_SEND_SCR 51 /* R1 */
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@ -76,16 +80,26 @@
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#define SD_OCR_SDHC_CAP (1<<30)
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#define SD_OCR_VOL_MASK 0xFF8000 /* bits 23:15 */
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/* R1 response type bits */
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/* SD mode R1 response type bits */
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#define MMC_R1_READY_FOR_DATA (1<<8) /* ready for next transfer */
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#define MMC_R1_APP_CMD (1<<5) /* app. commands supported */
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/* SPI mode R1 response type bits */
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#define SD_SPI_R1_IDLE_STATE (1<<0)
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#define SD_SPI_R1_CMD_CRC_ERR (1<<3)
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/* 48-bit response decoding (32 bits w/o CRC) */
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#define MMC_R1(resp) ((resp)[0])
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#define MMC_R3(resp) ((resp)[0])
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#define SD_R6(resp) ((resp)[0])
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#define MMC_R1_CURRENT_STATE(resp) (((resp)[0] >> 9) & 0xf)
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/* SPI mode response decoding */
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#define SD_SPI_R1(resp) ((resp)[0] & 0xff)
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#define SD_SPI_R2(resp) ((resp)[0] & 0xffff)
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#define SD_SPI_R3(resp) ((resp)[0])
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#define SD_SPI_R7(resp) ((resp)[0])
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/* RCA argument and response */
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#define MMC_ARG_RCA(rca) ((rca) << 16)
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#define SD_R6_RCA(resp) (SD_R6((resp)) >> 16)
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@ -113,7 +113,7 @@ typedef struct {
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int max_freq_khz; /*!< max frequency supported by the host */
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#define SDMMC_FREQ_DEFAULT 20000 /*!< SD/MMC Default speed (limited by clock divider) */
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#define SDMMC_FREQ_HIGHSPEED 40000 /*!< SD High speed (limited by clock divider) */
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#define SDMMC_FREQ_PROBING 4000 /*!< SD/MMC probing speed */
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#define SDMMC_FREQ_PROBING 400 /*!< SD/MMC probing speed */
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float io_voltage; /*!< I/O voltage used by the controller (voltage switching is not supported) */
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esp_err_t (*init)(void); /*!< Host function to initialize the driver */
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esp_err_t (*set_bus_width)(int slot, size_t width); /*!< host function to set bus width */
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156
tools/sdk/include/driver/driver/sdspi_host.h
Normal file
156
tools/sdk/include/driver/driver/sdspi_host.h
Normal file
@ -0,0 +1,156 @@
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// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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||||
// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
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#pragma once
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#include <stdint.h>
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#include <stddef.h>
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#include "esp_err.h"
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#include "sdmmc_types.h"
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#include "driver/gpio.h"
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#include "driver/spi_master.h"
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#include "driver/sdmmc_host.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Default sdmmc_host_t structure initializer for SD over SPI driver
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*
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* Uses SPI mode and max frequency set to 20MHz
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*
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* 'slot' can be set to one of HSPI_HOST, VSPI_HOST.
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*/
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#define SDSPI_HOST_DEFAULT() {\
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.flags = SDMMC_HOST_FLAG_SPI, \
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.slot = HSPI_HOST, \
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.max_freq_khz = SDMMC_FREQ_DEFAULT, \
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.io_voltage = 3.3f, \
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.init = &sdspi_host_init, \
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.set_bus_width = NULL, \
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.set_card_clk = &sdspi_host_set_card_clk, \
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.do_transaction = &sdspi_host_do_transaction, \
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.deinit = &sdspi_host_deinit, \
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}
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/**
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* Extra configuration for SPI host
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*/
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typedef struct {
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gpio_num_t gpio_miso; ///< GPIO number of MISO signal
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gpio_num_t gpio_mosi; ///< GPIO number of MOSI signal
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gpio_num_t gpio_sck; ///< GPIO number of SCK signal
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gpio_num_t gpio_cs; ///< GPIO number of CS signal
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gpio_num_t gpio_cd; ///< GPIO number of card detect signal
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gpio_num_t gpio_wp; ///< GPIO number of write protect signal
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int dma_channel; ///< DMA channel to be used by SPI driver (1 or 2)
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} sdspi_slot_config_t;
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#define SDSPI_SLOT_NO_CD ((gpio_num_t) -1) ///< indicates that card detect line is not used
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#define SDSPI_SLOT_NO_WP ((gpio_num_t) -1) ///< indicates that write protect line is not used
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/**
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* Macro defining default configuration of SPI host
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*/
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#define SDSPI_SLOT_CONFIG_DEFAULT() {\
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.gpio_miso = GPIO_NUM_2, \
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.gpio_mosi = GPIO_NUM_15, \
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.gpio_sck = GPIO_NUM_14, \
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.gpio_cs = GPIO_NUM_13, \
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.gpio_cd = SDMMC_SLOT_NO_CD, \
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.gpio_wp = SDMMC_SLOT_NO_WP, \
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.dma_channel = 1 \
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}
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|
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/**
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* @brief Initialize SD SPI driver
|
||||
*
|
||||
* @note This function is not thread safe
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK on success
|
||||
* - other error codes may be returned in future versions
|
||||
*/
|
||||
esp_err_t sdspi_host_init();
|
||||
|
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/**
|
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* @brief Initialize SD SPI driver for the specific SPI controller
|
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*
|
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* @note This function is not thread safe
|
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*
|
||||
* @param slot SPI controller to use (HSPI_HOST or VSPI_HOST)
|
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* @param slot_config pointer to slot configuration structure
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*
|
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* @return
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||||
* - ESP_OK on success
|
||||
* - ESP_ERR_INVALID_ARG if sdspi_init_slot has invalid arguments
|
||||
* - ESP_ERR_NO_MEM if memory can not be allocated
|
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* - other errors from the underlying spi_master and gpio drivers
|
||||
*/
|
||||
esp_err_t sdspi_host_init_slot(int slot, const sdspi_slot_config_t* slot_config);
|
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|
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/**
|
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* @brief Send command to the card and get response
|
||||
*
|
||||
* This function returns when command is sent and response is received,
|
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* or data is transferred, or timeout occurs.
|
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*
|
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* @note This function is not thread safe w.r.t. init/deinit functions,
|
||||
* and bus width/clock speed configuration functions. Multiple tasks
|
||||
* can call sdspi_host_do_transaction as long as other sdspi_host_*
|
||||
* functions are not called.
|
||||
*
|
||||
* @param slot SPI controller (HSPI_HOST or VSPI_HOST)
|
||||
* @param cmdinfo pointer to structure describing command and data to transfer
|
||||
* @return
|
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* - ESP_OK on success
|
||||
* - ESP_ERR_TIMEOUT if response or data transfer has timed out
|
||||
* - ESP_ERR_INVALID_CRC if response or data transfer CRC check has failed
|
||||
* - ESP_ERR_INVALID_RESPONSE if the card has sent an invalid response
|
||||
*/
|
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esp_err_t sdspi_host_do_transaction(int slot, sdmmc_command_t *cmdinfo);
|
||||
|
||||
/**
|
||||
* @brief Set card clock frequency
|
||||
*
|
||||
* Currently only integer fractions of 40MHz clock can be used.
|
||||
* For High Speed cards, 40MHz can be used.
|
||||
* For Default Speed cards, 20MHz can be used.
|
||||
*
|
||||
* @note This function is not thread safe
|
||||
*
|
||||
* @param slot SPI controller (HSPI_HOST or VSPI_HOST)
|
||||
* @param freq_khz card clock frequency, in kHz
|
||||
* @return
|
||||
* - ESP_OK on success
|
||||
* - other error codes may be returned in the future
|
||||
*/
|
||||
esp_err_t sdspi_host_set_card_clk(int slot, uint32_t freq_khz);
|
||||
|
||||
|
||||
/**
|
||||
* @brief Release resources allocated using sdspi_host_init
|
||||
*
|
||||
* @note This function is not thread safe
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK on success
|
||||
* - ESP_ERR_INVALID_STATE if sdspi_host_init function has not been called
|
||||
*/
|
||||
esp_err_t sdspi_host_deinit();
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
@ -48,6 +48,8 @@ typedef enum {
|
||||
* You can use this structure to specify the GPIO pins of the bus. Normally, the driver will use the
|
||||
* GPIO matrix to route the signals. An exception is made when all signals either can be routed through
|
||||
* the IO_MUX or are -1. In that case, the IO_MUX is used, allowing for >40MHz speeds.
|
||||
*
|
||||
* @note Be advised that the slave driver does not use the quadwp/quadhd lines and fields in spi_bus_config_t refering to these lines will be ignored and can thus safely be left uninitialized.
|
||||
*/
|
||||
typedef struct {
|
||||
int mosi_io_num; ///< GPIO pin for Master Out Slave In (=spi_d) signal, or -1 if not used.
|
||||
@ -230,4 +232,4 @@ void spicommon_dmaworkaround_transfer_active(int dmachan);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@ -62,7 +62,7 @@ typedef struct {
|
||||
|
||||
#define SPI_TRANS_MODE_DIO (1<<0) ///< Transmit/receive data in 2-bit mode
|
||||
#define SPI_TRANS_MODE_QIO (1<<1) ///< Transmit/receive data in 4-bit mode
|
||||
#define SPI_TRANS_MODE_DIOQIO_ADDR (1<<2) ///< Also transmit address in mode selected by SPI_MODE_DIO/SPI_MODE_QIO
|
||||
#define SPI_TRANS_MODE_DIOQIO_ADDR (1<<4) ///< Also transmit address in mode selected by SPI_MODE_DIO/SPI_MODE_QIO
|
||||
#define SPI_TRANS_USE_RXDATA (1<<2) ///< Receive into rx_data member of spi_transaction_t instead into memory at rx_buffer.
|
||||
#define SPI_TRANS_USE_TXDATA (1<<3) ///< Transmit tx_data member of spi_transaction_t instead of data at tx_buffer. Do not set tx_buffer when using this.
|
||||
|
||||
|
||||
@ -129,8 +129,8 @@ typedef enum {
|
||||
UART_FRAME_ERR, /*!< UART RX frame error event*/
|
||||
UART_PARITY_ERR, /*!< UART RX parity event*/
|
||||
UART_DATA_BREAK, /*!< UART TX data and break event*/
|
||||
UART_PATTERN_DET, /*!< UART pattern detected */
|
||||
UART_EVENT_MAX, /*!< UART event max index*/
|
||||
UART_PATTERN_DET, /*!< UART pattern detected */
|
||||
} uart_event_type_t;
|
||||
|
||||
/**
|
||||
@ -474,6 +474,8 @@ esp_err_t uart_intr_config(uart_port_t uart_num, const uart_intr_config_t *intr_
|
||||
* @param rx_buffer_size UART RX ring buffer size, rx_buffer_size should be greater than UART_FIFO_LEN.
|
||||
* @param tx_buffer_size UART TX ring buffer size.
|
||||
* If set to zero, driver will not use TX buffer, TX function will block task until all data have been sent out..
|
||||
* @note tx_buffer_size should be greater than UART_FIFO_LEN.
|
||||
*
|
||||
* @param queue_size UART event queue size/depth.
|
||||
* @param uart_queue UART event queue handle (out param). On success, a new queue handle is written here to provide
|
||||
* access to UART events. If set to NULL, driver will not use an event queue.
|
||||
|
||||
Reference in New Issue
Block a user