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https://github.com/0xFEEDC0DE64/arduino-esp32.git
synced 2025-07-01 04:50:58 +02:00
Update IDF libs to 9314bf0
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@ -20,13 +20,13 @@ extern "C" {
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#include "esp_eth.h"
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/* Common PHY-management functions.
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/** Common PHY-management functions.
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These are not enough to drive any particular Ethernet PHY, but they provide a common configuration structure and
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management functions.
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*/
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/* Configure fixed pins for RMII data interface.
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/** Configure fixed pins for RMII data interface.
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This configures GPIOs 0, 19, 22, 25, 26, 27 for use with RMII
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data interface. These pins cannot be changed, and must be wired to
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@ -38,7 +38,7 @@ extern "C" {
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*/
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void phy_rmii_configure_data_interface_pins(void);
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/* Configure variable pins for SMI (MDIO) ethernet functions.
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/** Configure variable pins for SMI (MDIO) ethernet functions.
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Calling this function along with mii_configure_default_pins() will
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fully configure the GPIOs for the ethernet PHY.
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@ -46,7 +46,7 @@ void phy_rmii_configure_data_interface_pins(void);
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void phy_rmii_smi_configure_pins(uint8_t mdc_gpio, uint8_t mdio_gpio);
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/* Enable flow control in standard PHY MII register.
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/** Enable flow control in standard PHY MII register.
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*/
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void phy_mii_enable_flow_ctrl(void);
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@ -21,26 +21,26 @@ extern "C" {
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#include "phy.h"
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/* @brief Dump all LAN8720 PHY SMI configuration registers
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/** @brief Dump all LAN8720 PHY SMI configuration registers
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*
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* @note These registers are dumped at 'debug' level, so output
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* may not be visible depending on default log levels.
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*/
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void phy_lan8720_dump_registers();
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/* @brief Default LAN8720 phy_check_init function.
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/** @brief Default LAN8720 phy_check_init function.
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*/
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void phy_lan8720_check_phy_init(void);
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/* @brief Default LAN8720 phy_get_speed_mode function.
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/** @brief Default LAN8720 phy_get_speed_mode function.
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*/
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eth_speed_mode_t phy_lan8720_get_speed_mode(void);
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/* @brief Default LAN8720 phy_get_duplex_mode function.
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/** @brief Default LAN8720 phy_get_duplex_mode function.
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*/
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eth_duplex_mode_t phy_lan8720_get_duplex_mode(void);
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/* @brief Default LAN8720 phy_power_enable function.
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/** @brief Default LAN8720 phy_power_enable function.
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*
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* @note This function may need to be replaced with a custom function
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* if the PHY has a GPIO to enable power or start a clock.
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@ -49,11 +49,11 @@ eth_duplex_mode_t phy_lan8720_get_duplex_mode(void);
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*/
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void phy_lan8720_power_enable(bool);
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/* @brief Default LAN8720 phy_init function.
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/** @brief Default LAN8720 phy_init function.
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*/
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void phy_lan8720_init(void);
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/* @brief Default LAN8720 PHY configuration
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/** @brief Default LAN8720 PHY configuration
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*
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* This configuration is not suitable for use as-is, it will need
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* to be modified for your particular PHY hardware setup.
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@ -20,26 +20,26 @@ extern "C" {
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#include "phy.h"
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/* @brief Dump all TLK110 PHY SMI configuration registers
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/** @brief Dump all TLK110 PHY SMI configuration registers
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*
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* @note These registers are dumped at 'debug' level, so output
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* may not be visible depending on default log levels.
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*/
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void phy_tlk110_dump_registers();
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/* @brief Default TLK110 phy_check_init function.
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/** @brief Default TLK110 phy_check_init function.
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*/
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void phy_tlk110_check_phy_init(void);
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/* @brief Default TLK110 phy_get_speed_mode function.
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/** @brief Default TLK110 phy_get_speed_mode function.
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*/
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eth_speed_mode_t phy_tlk110_get_speed_mode(void);
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/* @brief Default TLK110 phy_get_duplex_mode function.
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/** @brief Default TLK110 phy_get_duplex_mode function.
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*/
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eth_duplex_mode_t phy_tlk110_get_duplex_mode(void);
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/* @brief Default TLK110 phy_power_enable function.
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/** @brief Default TLK110 phy_power_enable function.
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*
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* @note This function may need to be replaced with a custom function
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* if the PHY has a GPIO to enable power or start a clock.
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@ -48,11 +48,11 @@ eth_duplex_mode_t phy_tlk110_get_duplex_mode(void);
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*/
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void phy_tlk110_power_enable(bool);
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/* @brief Default TLK110 phy_init function.
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/** @brief Default TLK110 phy_init function.
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*/
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void phy_tlk110_init(void);
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/* @brief Default TLK110 PHY configuration
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/** @brief Default TLK110 PHY configuration
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*
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* This configuration is not suitable for use as-is, it will need
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* to be modified for your particular PHY hardware setup.
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