mirror of
				https://github.com/0xFEEDC0DE64/arduino-esp32.git
				synced 2025-10-31 06:01:39 +01:00 
			
		
		
		
	They are all broadly similar, all being based on the ESP32-D0WD core, but have some subtle differences between variants around PSRAM inclusion and camera pin mappings. The ESP32CAM "unit" product (SKU: U007) has no PSRAM and maps the "Pixel Data 0" (Y2 GPIO/OV2640 D2) camera pin to IO17 rather than IO32 as is the case with most other M5Stack ESP32 camera devices. The ESP32CAM also requires the "hmirror" and "vflip" camera configuration bits setting in order to capture a true image. The relevant M5Stack pin configuration documentation can be found here: https://docs.m5stack.com/#/en/unit/esp32cam?id=pinmap
		
			
				
	
	
		
			157 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			157 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| 
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| #if defined(CAMERA_MODEL_WROVER_KIT)
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| #define PWDN_GPIO_NUM    -1
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| #define RESET_GPIO_NUM   -1
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| #define XCLK_GPIO_NUM    21
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| #define SIOD_GPIO_NUM    26
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| #define SIOC_GPIO_NUM    27
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| 
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| #define Y9_GPIO_NUM      35
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| #define Y8_GPIO_NUM      34
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| #define Y7_GPIO_NUM      39
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| #define Y6_GPIO_NUM      36
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| #define Y5_GPIO_NUM      19
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| #define Y4_GPIO_NUM      18
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| #define Y3_GPIO_NUM       5
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| #define Y2_GPIO_NUM       4
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| #define VSYNC_GPIO_NUM   25
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| #define HREF_GPIO_NUM    23
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| #define PCLK_GPIO_NUM    22
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| 
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| #elif defined(CAMERA_MODEL_ESP_EYE)
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| #define PWDN_GPIO_NUM    -1
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| #define RESET_GPIO_NUM   -1
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| #define XCLK_GPIO_NUM    4
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| #define SIOD_GPIO_NUM    18
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| #define SIOC_GPIO_NUM    23
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| 
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| #define Y9_GPIO_NUM      36
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| #define Y8_GPIO_NUM      37
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| #define Y7_GPIO_NUM      38
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| #define Y6_GPIO_NUM      39
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| #define Y5_GPIO_NUM      35
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| #define Y4_GPIO_NUM      14
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| #define Y3_GPIO_NUM      13
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| #define Y2_GPIO_NUM      34
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| #define VSYNC_GPIO_NUM   5
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| #define HREF_GPIO_NUM    27
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| #define PCLK_GPIO_NUM    25
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| 
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| #elif defined(CAMERA_MODEL_M5STACK_PSRAM)
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| #define PWDN_GPIO_NUM     -1
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| #define RESET_GPIO_NUM    15
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| #define XCLK_GPIO_NUM     27
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| #define SIOD_GPIO_NUM     25
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| #define SIOC_GPIO_NUM     23
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| 
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| #define Y9_GPIO_NUM       19
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| #define Y8_GPIO_NUM       36
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| #define Y7_GPIO_NUM       18
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| #define Y6_GPIO_NUM       39
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| #define Y5_GPIO_NUM        5
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| #define Y4_GPIO_NUM       34
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| #define Y3_GPIO_NUM       35
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| #define Y2_GPIO_NUM       32
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| #define VSYNC_GPIO_NUM    22
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| #define HREF_GPIO_NUM     26
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| #define PCLK_GPIO_NUM     21
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| 
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| #elif defined(CAMERA_MODEL_M5STACK_V2_PSRAM)
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| #define PWDN_GPIO_NUM     -1
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| #define RESET_GPIO_NUM    15
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| #define XCLK_GPIO_NUM     27
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| #define SIOD_GPIO_NUM     22
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| #define SIOC_GPIO_NUM     23
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| 
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| #define Y9_GPIO_NUM       19
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| #define Y8_GPIO_NUM       36
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| #define Y7_GPIO_NUM       18
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| #define Y6_GPIO_NUM       39
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| #define Y5_GPIO_NUM        5
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| #define Y4_GPIO_NUM       34
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| #define Y3_GPIO_NUM       35
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| #define Y2_GPIO_NUM       32
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| #define VSYNC_GPIO_NUM    25
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| #define HREF_GPIO_NUM     26
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| #define PCLK_GPIO_NUM     21
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| 
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| #elif defined(CAMERA_MODEL_M5STACK_WIDE)
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| #define PWDN_GPIO_NUM     -1
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| #define RESET_GPIO_NUM    15
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| #define XCLK_GPIO_NUM     27
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| #define SIOD_GPIO_NUM     22
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| #define SIOC_GPIO_NUM     23
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| 
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| #define Y9_GPIO_NUM       19
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| #define Y8_GPIO_NUM       36
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| #define Y7_GPIO_NUM       18
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| #define Y6_GPIO_NUM       39
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| #define Y5_GPIO_NUM        5
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| #define Y4_GPIO_NUM       34
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| #define Y3_GPIO_NUM       35
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| #define Y2_GPIO_NUM       32
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| #define VSYNC_GPIO_NUM    25
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| #define HREF_GPIO_NUM     26
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| #define PCLK_GPIO_NUM     21
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| 
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| #elif defined(CAMERA_MODEL_M5STACK_ESP32CAM)
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| #define PWDN_GPIO_NUM     -1
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| #define RESET_GPIO_NUM    15
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| #define XCLK_GPIO_NUM     27
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| #define SIOD_GPIO_NUM     25
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| #define SIOC_GPIO_NUM     23
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| 
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| #define Y9_GPIO_NUM       19
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| #define Y8_GPIO_NUM       36
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| #define Y7_GPIO_NUM       18
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| #define Y6_GPIO_NUM       39
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| #define Y5_GPIO_NUM        5
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| #define Y4_GPIO_NUM       34
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| #define Y3_GPIO_NUM       35
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| #define Y2_GPIO_NUM       17
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| #define VSYNC_GPIO_NUM    22
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| #define HREF_GPIO_NUM     26
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| #define PCLK_GPIO_NUM     21
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| 
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| #elif defined(CAMERA_MODEL_AI_THINKER)
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| #define PWDN_GPIO_NUM     32
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| #define RESET_GPIO_NUM    -1
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| #define XCLK_GPIO_NUM      0
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| #define SIOD_GPIO_NUM     26
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| #define SIOC_GPIO_NUM     27
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| 
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| #define Y9_GPIO_NUM       35
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| #define Y8_GPIO_NUM       34
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| #define Y7_GPIO_NUM       39
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| #define Y6_GPIO_NUM       36
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| #define Y5_GPIO_NUM       21
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| #define Y4_GPIO_NUM       19
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| #define Y3_GPIO_NUM       18
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| #define Y2_GPIO_NUM        5
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| #define VSYNC_GPIO_NUM    25
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| #define HREF_GPIO_NUM     23
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| #define PCLK_GPIO_NUM     22
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| 
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| #elif defined(CAMERA_MODEL_TTGO_T_JOURNAL)
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| #define PWDN_GPIO_NUM      0
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| #define RESET_GPIO_NUM    15
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| #define XCLK_GPIO_NUM     27
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| #define SIOD_GPIO_NUM     25
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| #define SIOC_GPIO_NUM     23
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| 
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| #define Y9_GPIO_NUM       19
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| #define Y8_GPIO_NUM       36
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| #define Y7_GPIO_NUM       18
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| #define Y6_GPIO_NUM       39
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| #define Y5_GPIO_NUM        5
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| #define Y4_GPIO_NUM       34
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| #define Y3_GPIO_NUM       35
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| #define Y2_GPIO_NUM       17
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| #define VSYNC_GPIO_NUM    22
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| #define HREF_GPIO_NUM     26
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| #define PCLK_GPIO_NUM     21
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| 
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| #else
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| #error "Camera model not selected"
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| #endif
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