mirror of
https://github.com/0xFEEDC0DE64/arduino-esp32.git
synced 2025-10-31 14:11:42 +01:00
161 lines
5.9 KiB
C
161 lines
5.9 KiB
C
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _SOC_GPIO_SD_REG_H_
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#define _SOC_GPIO_SD_REG_H_
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#include "soc.h"
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#define GPIO_SIGMADELTA0_REG (DR_REG_GPIO_SD_BASE + 0x0000)
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/* GPIO_SD0_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
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/*description: */
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#define GPIO_SD0_PRESCALE 0x000000FF
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#define GPIO_SD0_PRESCALE_M ((GPIO_SD0_PRESCALE_V)<<(GPIO_SD0_PRESCALE_S))
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#define GPIO_SD0_PRESCALE_V 0xFF
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#define GPIO_SD0_PRESCALE_S 8
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/* GPIO_SD0_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
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/*description: */
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#define GPIO_SD0_IN 0x000000FF
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#define GPIO_SD0_IN_M ((GPIO_SD0_IN_V)<<(GPIO_SD0_IN_S))
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#define GPIO_SD0_IN_V 0xFF
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#define GPIO_SD0_IN_S 0
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#define GPIO_SIGMADELTA1_REG (DR_REG_GPIO_SD_BASE + 0x0004)
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/* GPIO_SD1_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
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/*description: */
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#define GPIO_SD1_PRESCALE 0x000000FF
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#define GPIO_SD1_PRESCALE_M ((GPIO_SD1_PRESCALE_V)<<(GPIO_SD1_PRESCALE_S))
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#define GPIO_SD1_PRESCALE_V 0xFF
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#define GPIO_SD1_PRESCALE_S 8
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/* GPIO_SD1_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
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/*description: */
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#define GPIO_SD1_IN 0x000000FF
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#define GPIO_SD1_IN_M ((GPIO_SD1_IN_V)<<(GPIO_SD1_IN_S))
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#define GPIO_SD1_IN_V 0xFF
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#define GPIO_SD1_IN_S 0
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#define GPIO_SIGMADELTA2_REG (DR_REG_GPIO_SD_BASE + 0x0008)
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/* GPIO_SD2_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
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/*description: */
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#define GPIO_SD2_PRESCALE 0x000000FF
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#define GPIO_SD2_PRESCALE_M ((GPIO_SD2_PRESCALE_V)<<(GPIO_SD2_PRESCALE_S))
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#define GPIO_SD2_PRESCALE_V 0xFF
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#define GPIO_SD2_PRESCALE_S 8
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/* GPIO_SD2_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
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/*description: */
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#define GPIO_SD2_IN 0x000000FF
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#define GPIO_SD2_IN_M ((GPIO_SD2_IN_V)<<(GPIO_SD2_IN_S))
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#define GPIO_SD2_IN_V 0xFF
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#define GPIO_SD2_IN_S 0
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#define GPIO_SIGMADELTA3_REG (DR_REG_GPIO_SD_BASE + 0x000c)
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/* GPIO_SD3_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
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/*description: */
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#define GPIO_SD3_PRESCALE 0x000000FF
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#define GPIO_SD3_PRESCALE_M ((GPIO_SD3_PRESCALE_V)<<(GPIO_SD3_PRESCALE_S))
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#define GPIO_SD3_PRESCALE_V 0xFF
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#define GPIO_SD3_PRESCALE_S 8
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/* GPIO_SD3_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
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/*description: */
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#define GPIO_SD3_IN 0x000000FF
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#define GPIO_SD3_IN_M ((GPIO_SD3_IN_V)<<(GPIO_SD3_IN_S))
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#define GPIO_SD3_IN_V 0xFF
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#define GPIO_SD3_IN_S 0
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#define GPIO_SIGMADELTA4_REG (DR_REG_GPIO_SD_BASE + 0x0010)
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/* GPIO_SD4_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
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/*description: */
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#define GPIO_SD4_PRESCALE 0x000000FF
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#define GPIO_SD4_PRESCALE_M ((GPIO_SD4_PRESCALE_V)<<(GPIO_SD4_PRESCALE_S))
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#define GPIO_SD4_PRESCALE_V 0xFF
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#define GPIO_SD4_PRESCALE_S 8
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/* GPIO_SD4_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
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/*description: */
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#define GPIO_SD4_IN 0x000000FF
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#define GPIO_SD4_IN_M ((GPIO_SD4_IN_V)<<(GPIO_SD4_IN_S))
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#define GPIO_SD4_IN_V 0xFF
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#define GPIO_SD4_IN_S 0
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#define GPIO_SIGMADELTA5_REG (DR_REG_GPIO_SD_BASE + 0x0014)
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/* GPIO_SD5_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
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/*description: */
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#define GPIO_SD5_PRESCALE 0x000000FF
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#define GPIO_SD5_PRESCALE_M ((GPIO_SD5_PRESCALE_V)<<(GPIO_SD5_PRESCALE_S))
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#define GPIO_SD5_PRESCALE_V 0xFF
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#define GPIO_SD5_PRESCALE_S 8
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/* GPIO_SD5_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
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/*description: */
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#define GPIO_SD5_IN 0x000000FF
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#define GPIO_SD5_IN_M ((GPIO_SD5_IN_V)<<(GPIO_SD5_IN_S))
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#define GPIO_SD5_IN_V 0xFF
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#define GPIO_SD5_IN_S 0
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#define GPIO_SIGMADELTA6_REG (DR_REG_GPIO_SD_BASE + 0x0018)
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/* GPIO_SD6_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
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/*description: */
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#define GPIO_SD6_PRESCALE 0x000000FF
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#define GPIO_SD6_PRESCALE_M ((GPIO_SD6_PRESCALE_V)<<(GPIO_SD6_PRESCALE_S))
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#define GPIO_SD6_PRESCALE_V 0xFF
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#define GPIO_SD6_PRESCALE_S 8
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/* GPIO_SD6_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
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/*description: */
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#define GPIO_SD6_IN 0x000000FF
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#define GPIO_SD6_IN_M ((GPIO_SD6_IN_V)<<(GPIO_SD6_IN_S))
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#define GPIO_SD6_IN_V 0xFF
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#define GPIO_SD6_IN_S 0
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#define GPIO_SIGMADELTA7_REG (DR_REG_GPIO_SD_BASE + 0x001c)
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/* GPIO_SD7_PRESCALE : R/W ;bitpos:[15:8] ;default: 8'hff ; */
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/*description: */
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#define GPIO_SD7_PRESCALE 0x000000FF
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#define GPIO_SD7_PRESCALE_M ((GPIO_SD7_PRESCALE_V)<<(GPIO_SD7_PRESCALE_S))
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#define GPIO_SD7_PRESCALE_V 0xFF
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#define GPIO_SD7_PRESCALE_S 8
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/* GPIO_SD7_IN : R/W ;bitpos:[7:0] ;default: 8'h0 ; */
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/*description: */
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#define GPIO_SD7_IN 0x000000FF
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#define GPIO_SD7_IN_M ((GPIO_SD7_IN_V)<<(GPIO_SD7_IN_S))
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#define GPIO_SD7_IN_V 0xFF
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#define GPIO_SD7_IN_S 0
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#define GPIO_SIGMADELTA_CG_REG (DR_REG_GPIO_SD_BASE + 0x0020)
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/* GPIO_SD_CLK_EN : R/W ;bitpos:[31] ;default: 1'h0 ; */
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/*description: */
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#define GPIO_SD_CLK_EN (BIT(31))
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#define GPIO_SD_CLK_EN_M (BIT(31))
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#define GPIO_SD_CLK_EN_V 0x1
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#define GPIO_SD_CLK_EN_S 31
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#define GPIO_SIGMADELTA_MISC_REG (DR_REG_GPIO_SD_BASE + 0x0024)
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/* GPIO_SPI_SWAP : R/W ;bitpos:[31] ;default: 1'h0 ; */
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/*description: */
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#define GPIO_SPI_SWAP (BIT(31))
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#define GPIO_SPI_SWAP_M (BIT(31))
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#define GPIO_SPI_SWAP_V 0x1
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#define GPIO_SPI_SWAP_S 31
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#define GPIO_SIGMADELTA_VERSION_REG (DR_REG_GPIO_SD_BASE + 0x0028)
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/* GPIO_SD_DATE : R/W ;bitpos:[27:0] ;default: 28'h1506190 ; */
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/*description: */
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#define GPIO_SD_DATE 0x0FFFFFFF
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#define GPIO_SD_DATE_M ((GPIO_SD_DATE_V)<<(GPIO_SD_DATE_S))
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#define GPIO_SD_DATE_V 0xFFFFFFF
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#define GPIO_SD_DATE_S 0
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#define SIGMADELTA_GPIO_SD_DATE_VERSION 0x1506190
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#endif /*_SOC_GPIO_SD_REG_H_ */
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