mirror of
https://github.com/0xFEEDC0DE64/arduino-esp32.git
synced 2025-11-04 08:01:38 +01:00
331 lines
11 KiB
C
331 lines
11 KiB
C
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "esp32-hal-timer.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/xtensa_api.h"
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#include "freertos/task.h"
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#include "soc/timer_group_struct.h"
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#include "soc/dport_reg.h"
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#include "esp_attr.h"
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#include "esp_system.h"
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#ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
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#if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
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#include "esp32/rom/ets_sys.h"
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#include "esp_intr_alloc.h"
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#elif CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/ets_sys.h"
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#include "esp_intr_alloc.h"
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#include "soc/periph_defs.h"
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#else
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#error Target CONFIG_IDF_TARGET is not supported
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#endif
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#else // ESP32 Before IDF 4.0
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#include "rom/ets_sys.h"
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#include "esp_intr.h"
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#endif
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#define HWTIMER_LOCK() portENTER_CRITICAL(timer->lock)
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#define HWTIMER_UNLOCK() portEXIT_CRITICAL(timer->lock)
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typedef struct {
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union {
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struct {
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uint32_t reserved0: 10;
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uint32_t alarm_en: 1; /*When set alarm is enabled*/
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uint32_t level_int_en: 1; /*When set level type interrupt will be generated during alarm*/
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uint32_t edge_int_en: 1; /*When set edge type interrupt will be generated during alarm*/
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uint32_t divider: 16; /*Timer clock (T0/1_clk) pre-scale value.*/
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uint32_t autoreload: 1; /*When set timer 0/1 auto-reload at alarming is enabled*/
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uint32_t increase: 1; /*When set timer 0/1 time-base counter increment. When cleared timer 0 time-base counter decrement.*/
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uint32_t enable: 1; /*When set timer 0/1 time-base counter is enabled*/
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};
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uint32_t val;
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} config;
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uint32_t cnt_low; /*Register to store timer 0/1 time-base counter current value lower 32 bits.*/
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uint32_t cnt_high; /*Register to store timer 0 time-base counter current value higher 32 bits.*/
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uint32_t update; /*Write any value will trigger a timer 0 time-base counter value update (timer 0 current value will be stored in registers above)*/
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uint32_t alarm_low; /*Timer 0 time-base counter value lower 32 bits that will trigger the alarm*/
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uint32_t alarm_high; /*Timer 0 time-base counter value higher 32 bits that will trigger the alarm*/
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uint32_t load_low; /*Lower 32 bits of the value that will load into timer 0 time-base counter*/
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uint32_t load_high; /*higher 32 bits of the value that will load into timer 0 time-base counter*/
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uint32_t reload; /*Write any value will trigger timer 0 time-base counter reload*/
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} hw_timer_reg_t;
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typedef struct hw_timer_s {
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hw_timer_reg_t * dev;
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uint8_t num;
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uint8_t group;
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uint8_t timer;
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portMUX_TYPE lock;
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} hw_timer_t;
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static hw_timer_t hw_timer[4] = {
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{(hw_timer_reg_t *)(DR_REG_TIMERGROUP0_BASE),0,0,0,portMUX_INITIALIZER_UNLOCKED},
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{(hw_timer_reg_t *)(DR_REG_TIMERGROUP0_BASE + 0x0024),1,0,1,portMUX_INITIALIZER_UNLOCKED},
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{(hw_timer_reg_t *)(DR_REG_TIMERGROUP0_BASE + 0x1000),2,1,0,portMUX_INITIALIZER_UNLOCKED},
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{(hw_timer_reg_t *)(DR_REG_TIMERGROUP0_BASE + 0x1024),3,1,1,portMUX_INITIALIZER_UNLOCKED}
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};
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typedef void (*voidFuncPtr)(void);
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static voidFuncPtr __timerInterruptHandlers[4] = {0,0,0,0};
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void IRAM_ATTR __timerISR(void * arg){
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#if CONFIG_IDF_TARGET_ESP32
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uint32_t s0 = TIMERG0.int_st_timers.val;
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uint32_t s1 = TIMERG1.int_st_timers.val;
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TIMERG0.int_clr_timers.val = s0;
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TIMERG1.int_clr_timers.val = s1;
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#else
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uint32_t s0 = TIMERG0.int_st.val;
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uint32_t s1 = TIMERG1.int_st.val;
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TIMERG0.int_clr.val = s0;
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TIMERG1.int_clr.val = s1;
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#endif
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uint8_t status = (s1 & 3) << 2 | (s0 & 3);
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uint8_t i = 4;
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//restart the timers that should autoreload
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while(i--){
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hw_timer_reg_t * dev = hw_timer[i].dev;
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if((status & (1 << i)) && dev->config.autoreload){
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dev->config.alarm_en = 1;
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}
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}
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i = 4;
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//call callbacks
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while(i--){
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if(__timerInterruptHandlers[i] && (status & (1 << i))){
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__timerInterruptHandlers[i]();
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}
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}
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}
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uint64_t timerRead(hw_timer_t *timer){
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timer->dev->update = 1;
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uint64_t h = timer->dev->cnt_high;
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uint64_t l = timer->dev->cnt_low;
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return (h << 32) | l;
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}
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uint64_t timerAlarmRead(hw_timer_t *timer){
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uint64_t h = timer->dev->alarm_high;
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uint64_t l = timer->dev->alarm_low;
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return (h << 32) | l;
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}
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void timerWrite(hw_timer_t *timer, uint64_t val){
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timer->dev->load_high = (uint32_t) (val >> 32);
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timer->dev->load_low = (uint32_t) (val);
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timer->dev->reload = 1;
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}
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void timerAlarmWrite(hw_timer_t *timer, uint64_t alarm_value, bool autoreload){
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timer->dev->alarm_high = (uint32_t) (alarm_value >> 32);
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timer->dev->alarm_low = (uint32_t) alarm_value;
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timer->dev->config.autoreload = autoreload;
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}
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void timerSetConfig(hw_timer_t *timer, uint32_t config){
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timer->dev->config.val = config;
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}
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uint32_t timerGetConfig(hw_timer_t *timer){
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return timer->dev->config.val;
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}
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void timerSetCountUp(hw_timer_t *timer, bool countUp){
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timer->dev->config.increase = countUp;
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}
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bool timerGetCountUp(hw_timer_t *timer){
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return timer->dev->config.increase;
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}
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void timerSetAutoReload(hw_timer_t *timer, bool autoreload){
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timer->dev->config.autoreload = autoreload;
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}
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bool timerGetAutoReload(hw_timer_t *timer){
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return timer->dev->config.autoreload;
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}
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void timerSetDivider(hw_timer_t *timer, uint16_t divider){//2 to 65536
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if(!divider){
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divider = 0xFFFF;
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} else if(divider == 1){
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divider = 2;
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}
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int timer_en = timer->dev->config.enable;
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timer->dev->config.enable = 0;
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timer->dev->config.divider = divider;
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timer->dev->config.enable = timer_en;
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}
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uint16_t timerGetDivider(hw_timer_t *timer){
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return timer->dev->config.divider;
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}
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void timerStart(hw_timer_t *timer){
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timer->dev->config.enable = 1;
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}
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void timerStop(hw_timer_t *timer){
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timer->dev->config.enable = 0;
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}
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void timerRestart(hw_timer_t *timer){
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timer->dev->config.enable = 0;
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timer->dev->reload = 1;
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timer->dev->config.enable = 1;
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}
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bool timerStarted(hw_timer_t *timer){
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return timer->dev->config.enable;
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}
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void timerAlarmEnable(hw_timer_t *timer){
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timer->dev->config.alarm_en = 1;
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}
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void timerAlarmDisable(hw_timer_t *timer){
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timer->dev->config.alarm_en = 0;
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}
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bool timerAlarmEnabled(hw_timer_t *timer){
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return timer->dev->config.alarm_en;
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}
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static void _on_apb_change(void * arg, apb_change_ev_t ev_type, uint32_t old_apb, uint32_t new_apb){
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hw_timer_t * timer = (hw_timer_t *)arg;
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if(ev_type == APB_BEFORE_CHANGE){
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timer->dev->config.enable = 0;
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} else {
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old_apb /= 1000000;
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new_apb /= 1000000;
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timer->dev->config.divider = (new_apb * timer->dev->config.divider) / old_apb;
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timer->dev->config.enable = 1;
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}
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}
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hw_timer_t * timerBegin(uint8_t num, uint16_t divider, bool countUp){
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if(num > 3){
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return NULL;
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}
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hw_timer_t * timer = &hw_timer[num];
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if(timer->group) {
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DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_TIMERGROUP1_CLK_EN);
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DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_TIMERGROUP1_RST);
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TIMERG1.int_ena.val &= ~BIT(timer->timer);
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} else {
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DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_TIMERGROUP_CLK_EN);
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DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_TIMERGROUP_RST);
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TIMERG0.int_ena.val &= ~BIT(timer->timer);
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}
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timer->dev->config.enable = 0;
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timerSetDivider(timer, divider);
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timerSetCountUp(timer, countUp);
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timerSetAutoReload(timer, false);
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timerAttachInterrupt(timer, NULL, false);
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timerWrite(timer, 0);
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timer->dev->config.enable = 1;
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addApbChangeCallback(timer, _on_apb_change);
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return timer;
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}
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void timerEnd(hw_timer_t *timer){
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timer->dev->config.enable = 0;
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timerAttachInterrupt(timer, NULL, false);
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removeApbChangeCallback(timer, _on_apb_change);
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}
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void timerAttachInterrupt(hw_timer_t *timer, void (*fn)(void), bool edge){
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static bool initialized = false;
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static intr_handle_t intr_handle = NULL;
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if(intr_handle){
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esp_intr_disable(intr_handle);
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}
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if(fn == NULL){
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timer->dev->config.level_int_en = 0;
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timer->dev->config.edge_int_en = 0;
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timer->dev->config.alarm_en = 0;
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if(timer->num & 2){
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TIMERG1.int_ena.val &= ~BIT(timer->timer);
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} else {
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TIMERG0.int_ena.val &= ~BIT(timer->timer);
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}
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__timerInterruptHandlers[timer->num] = NULL;
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} else {
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__timerInterruptHandlers[timer->num] = fn;
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timer->dev->config.level_int_en = edge?0:1;//When set, an alarm will generate a level type interrupt.
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timer->dev->config.edge_int_en = edge?1:0;//When set, an alarm will generate an edge type interrupt.
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int intr_source = 0;
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if(!edge){
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if(timer->group){
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intr_source = ETS_TG1_T0_LEVEL_INTR_SOURCE + timer->timer;
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} else {
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intr_source = ETS_TG0_T0_LEVEL_INTR_SOURCE + timer->timer;
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}
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} else {
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if(timer->group){
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intr_source = ETS_TG1_T0_EDGE_INTR_SOURCE + timer->timer;
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} else {
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intr_source = ETS_TG0_T0_EDGE_INTR_SOURCE + timer->timer;
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}
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}
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if(!initialized){
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initialized = true;
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esp_intr_alloc(intr_source, (int)(ESP_INTR_FLAG_IRAM|ESP_INTR_FLAG_LOWMED|ESP_INTR_FLAG_EDGE), __timerISR, NULL, &intr_handle);
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} else {
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intr_matrix_set(esp_intr_get_cpu(intr_handle), intr_source, esp_intr_get_intno(intr_handle));
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}
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if(timer->group){
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TIMERG1.int_ena.val |= BIT(timer->timer);
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} else {
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TIMERG0.int_ena.val |= BIT(timer->timer);
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}
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}
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if(intr_handle){
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esp_intr_enable(intr_handle);
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}
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}
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void timerDetachInterrupt(hw_timer_t *timer){
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timerAttachInterrupt(timer, NULL, false);
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}
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uint64_t timerReadMicros(hw_timer_t *timer){
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uint64_t timer_val = timerRead(timer);
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uint16_t div = timerGetDivider(timer);
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return timer_val * div / (getApbFrequency() / 1000000);
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}
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double timerReadSeconds(hw_timer_t *timer){
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uint64_t timer_val = timerRead(timer);
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uint16_t div = timerGetDivider(timer);
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return (double)timer_val * div / getApbFrequency();
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}
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uint64_t timerAlarmReadMicros(hw_timer_t *timer){
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uint64_t timer_val = timerAlarmRead(timer);
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uint16_t div = timerGetDivider(timer);
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return timer_val * div / (getApbFrequency() / 1000000);
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}
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double timerAlarmReadSeconds(hw_timer_t *timer){
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uint64_t timer_val = timerAlarmRead(timer);
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uint16_t div = timerGetDivider(timer);
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return (double)timer_val * div / getApbFrequency();
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}
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