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145 lines
6.0 KiB
C
Executable File
145 lines
6.0 KiB
C
Executable File
/* Definitions for Xtensa processor config info needed for TRAX.
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Copyright (c) 2005-2011 Tensilica Inc.
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice shall be included
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in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
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#ifndef TRAX_CORE_CONFIG_H
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#define TRAX_CORE_CONFIG_H
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#include "xtensa-params.h"
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/*
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* Vector Enumerations.
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*/
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/* These must match the LX2.0 and later traceport spec: */
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#define VEC_NO_VECTOR 0
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#define VEC_FIRST VEC_RESET /* first valid vector */
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#define VEC_RESET 1
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#define VEC_DEBUG 2
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#define VEC_NMI 3
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#define VEC_USER 4
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#define VEC_KERNEL 5
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#define VEC_DOUBLE 6
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#define VEC_MEMERR 7
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#define VEC_RESERVED8 8
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#define VEC_RESERVED9 9
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#define VEC_WINO4 10
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#define VEC_WINU4 11
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#define VEC_WINO8 12
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#define VEC_WINU8 13
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#define VEC_WINO12 14
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#define VEC_WINU12 15
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#define VEC_INTLEVEL2 16
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#define VEC_INTLEVEL3 17
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#define VEC_INTLEVEL4 18
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#define VEC_INTLEVEL5 19
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#define VEC_INTLEVEL6 20
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/* These are internal, i.e. don't appear like this on traceport: */
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#define VEC_DEBUG_OCD 21
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#define VEC_UNKNOWN 22
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/* Enumerations 23 through 31 are also reserved, but putting */
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/* placeholders here seems wasteful and unnecessary. */
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#define VEC_COUNT 23
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/* Other branch (change-of-PC-flow) type encodings;
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* if PC changes due to an exception or interrupt vector,
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* one of the VEC_* values above is used, otherwise
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* (or if it's unknown whether it's due to an exception/interrupt)
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* one of the following is used: */
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#define BRANCH_IS_VEC(n) ((n) < VEC_COUNT) /* is known to be except/interrupt? */
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#define BRANCH_OR_VEC 24 /* unknown type of branch (branch/exception/interrupt/etc) */
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#define BRANCH_UNKNOWN 25 /* unknown type of branch (anything but except/interrupt) */
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#define BRANCH_UNKNOWN_ERR 26 /* like BRANCH_UNKNOWN with known error (non-branch instr) */
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#define BRANCH_LOOPBACK 28 /* zero-overhead loopback (from LEND to LBEG) */
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#define BRANCH_CONDTAKEN 29 /* conditional branch taken (or LOOP{NEZ,GTZ} loop skip) */
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#define BRANCH_JUMP 30 /* jump (unconditional branch, i.e. J or JX) */
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#define BRANCH_IS_CALL(n) (((n) & ~3) == 32) /* is a function call? */
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#define BRANCH_CALL0 32 /* non-windowed function call (CALL0, CALLX0) */
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#define BRANCH_CALL4 33 /* windowed function call (CALL4, CALLX4) */
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#define BRANCH_CALL8 34 /* windowed function call (CALL8, CALLX8) */
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#define BRANCH_CALL12 35 /* windowed function call (CALL12, CALLX12) */
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#define BRANCH_IS_RETURN(n) ((n) >= 36) /* is any kind of return? */
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#define BRANCH_IS_CALLRETURN(n) (((n) & ~1) == 36) /* is a function return? */
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#define BRANCH_RET 36 /* non-windowed function return (RET or RET.N) */
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#define BRANCH_RETW 37 /* windowed function return (RETW or RETW.N) */
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#define BRANCH_IS_EIRETURN(n) ((n) >= 38) /* is an except/inter. return? */
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#define BRANCH_RFE 38 /* RFE or RFUE */
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#define BRANCH_RFDE 39 /* RFDE */
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#define BRANCH_RFWO 40 /* RFWO */
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#define BRANCH_RFWU 41 /* RFWU */
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#define BRANCH_RFI_2 42 /* RFI 2 */
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#define BRANCH_RFI_3 43 /* RFI 3 */
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#define BRANCH_RFI_4 44 /* RFI 4 */
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#define BRANCH_RFI_5 45 /* RFI 5 */
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#define BRANCH_RFI_6 46 /* RFI 6 */
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#define BRANCH_RFI_NMI 47 /* RFI NMILEVEL */
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#define BRANCH_RFI_DEBUG 48 /* RFI DEBUGLEVEL */
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#define BRANCH_RFME 49 /* RFME */
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#define BRANCH_COUNT 50 /* (number of defined BRANCH_xxx values) */
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typedef struct {
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unsigned vaddr;
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unsigned vaddr2; /* for static vectors only (reloc vectors option) */
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int is_configured;
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} trax_vector_t;
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/*
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* This structure describes those portion of a Tensilica processor's
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* configuration that are useful for trace.
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*/
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typedef struct {
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char ** isa_dlls;
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char * core_name; /* (XPG core name, not necessarily same as XTENSA_CORE) */
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int big_endian; /* 0 = little-endian, 1 = big-endian */
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int has_loops; /* 1 = zero overhead loops configured */
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int has_autorefill; /* 1 = TLB autorefill (MMU) configured */
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unsigned max_instr_size; /* in bytes (eg. 3, 4, 8, ...) */
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unsigned int_level_max; /* number of interrupt levels configured (without NMI) */
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int debug_level; /* debug intlevel, 0 if debug not configured */
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int nmi_level; /* NMI intlevel, 0 if NMI not configured */
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unsigned targethw_min; /* min. targeted hardware version (XTENSA_HWVERSION_<rel>) */
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unsigned targethw_max; /* max. targeted hardware version (XTENSA_HWVERSION_<rel>) */
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int reloc_vectors; /* 0 = fixed vectors, 1 = relocatable vectors */
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int statvec_select; /* 0 = stat vec base 0, 1 = stat vec base 1 (SW default) */
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int vecbase_align; /* number of bits to align VECBASE (32 - bits in VECBASE) */
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unsigned statvec_base0; /* static vector base 0 */
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unsigned statvec_base1; /* static vector base 1 */
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unsigned vecbase_reset; /* reset value of VECBASE */
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trax_vector_t vectors[VEC_COUNT]; /* all vectors... */
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} trax_core_config_t;
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/* Globals: */
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//extern const char * const trax_vector_short_names[/*VEC_COUNT*/]; // nobody uses this one
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extern const char * const trax_vector_names[/*VEC_COUNT*/];
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/* Prototypes: */
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extern int trax_read_params (trax_core_config_t *c, xtensa_params p);
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extern int trax_vector_from_address(trax_core_config_t *config, unsigned long vaddr, unsigned long *vecbases);
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#endif /* TRAX_CORE_CONFIG_H */
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