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	* Update IDF to abea9e4c0 * Update esptool * Enable PSRAM for PICO D4 * Enable APP_ROLLBACK_ENABLE
		
			
				
	
	
		
			77 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			77 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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| //
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| // Licensed under the Apache License, Version 2.0 (the "License");
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| // you may not use this file except in compliance with the License.
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| // You may obtain a copy of the License at
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| 
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| //     http://www.apache.org/licenses/LICENSE-2.0
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| //
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| // Unless required by applicable law or agreed to in writing, software
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| // distributed under the License is distributed on an "AS IS" BASIS,
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| // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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| // See the License for the specific language governing permissions and
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| // limitations under the License.
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| 
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| #pragma once
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| 
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| #ifdef __cplusplus
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| extern "C" {
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| #endif
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| 
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| #include "esp_eth.h"
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| 
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| /**
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|  * @brief Common PHY-management functions.
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|  *
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|  * @note These are not enough to drive any particular Ethernet PHY.
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|  * They provide a common configuration structure and management functions.
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|  *
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|  */
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| 
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| /**
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|  * @brief Configure fixed pins for RMII data interface.
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|  *
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|  * @note This configures GPIOs 0, 19, 22, 25, 26, 27 for use with RMII data interface.
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|  * These pins cannot be changed, and must be wired to ethernet functions.
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|  * This is not sufficient to fully configure the Ethernet PHY.
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|  * MDIO configuration interface pins (such as SMI MDC, MDO, MDI) must also be configured correctly in the GPIO matrix.
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|  *
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|  */
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| void phy_rmii_configure_data_interface_pins(void);
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| 
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| /**
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|  * @brief Configure variable pins for SMI ethernet functions.
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|  *
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|  * @param mdc_gpio MDC GPIO Pin number
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|  * @param mdio_gpio MDIO GPIO Pin number
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|  *
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|  * @note Calling this function along with mii_configure_default_pins() will fully configure the GPIOs for the ethernet PHY.
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|  */
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| void phy_rmii_smi_configure_pins(uint8_t mdc_gpio, uint8_t mdio_gpio);
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| 
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| /**
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|  * @brief Enable flow control in standard PHY MII register.
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|  *
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|  */
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| void phy_mii_enable_flow_ctrl(void);
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| 
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| /**
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|  * @brief Check Ethernet link status via MII interface
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|  *
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|  * @return true Link is on
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|  * @return false Link is off
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|  */
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| bool phy_mii_check_link_status(void);
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| 
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| /**
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|  * @brief Check pause frame ability of partner via MII interface
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|  *
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|  * @return true Partner is able to process pause frame
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|  * @return false Partner can not process pause frame
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|  */
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| bool phy_mii_get_partner_pause_enable(void);
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| 
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| #ifdef __cplusplus
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| }
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| #endif
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