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https://github.com/0xFEEDC0DE64/arduino-esp32.git
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600f4c4130
* Update mDNS and LEDC * update toolchain * Update IDF to 1c3dd23 * Advertise the board variant for Arduino OTA * Add generic variant definition for mDNS
47 lines
2.5 KiB
C
47 lines
2.5 KiB
C
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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// This file contains various convenience macros to be used in ULP programs.
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// Helper macros to calculate bit field width from mask, using the preprocessor.
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// Used later in READ_RTC_FIELD and WRITE_RTC_FIELD.
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#define IS_BIT_SET(m, i) (((m) >> (i)) & 1)
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#define MASK_TO_WIDTH_HELPER1(m, i) IS_BIT_SET(m, i)
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#define MASK_TO_WIDTH_HELPER2(m, i) (MASK_TO_WIDTH_HELPER1(m, i) + MASK_TO_WIDTH_HELPER1(m, i + 1))
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#define MASK_TO_WIDTH_HELPER4(m, i) (MASK_TO_WIDTH_HELPER2(m, i) + MASK_TO_WIDTH_HELPER2(m, i + 2))
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#define MASK_TO_WIDTH_HELPER8(m, i) (MASK_TO_WIDTH_HELPER4(m, i) + MASK_TO_WIDTH_HELPER4(m, i + 4))
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#define MASK_TO_WIDTH_HELPER16(m, i) (MASK_TO_WIDTH_HELPER8(m, i) + MASK_TO_WIDTH_HELPER8(m, i + 8))
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#define MASK_TO_WIDTH_HELPER32(m, i) (MASK_TO_WIDTH_HELPER16(m, i) + MASK_TO_WIDTH_HELPER16(m, i + 16))
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// Peripheral register access macros, build around REG_RD and REG_WR instructions.
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// Registers defined in rtc_cntl_reg.h, rtc_io_reg.h, sens_reg.h, and rtc_i2c_reg.h are usable with these macros.
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// Read from rtc_reg[low_bit + bit_width - 1 : low_bit] into R0, bit_width <= 16
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#define READ_RTC_REG(rtc_reg, low_bit, bit_width) \
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REG_RD (((rtc_reg) - DR_REG_RTCCNTL_BASE) / 4), ((low_bit) + (bit_width) - 1), (low_bit)
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// Write immediate value into rtc_reg[low_bit + bit_width - 1 : low_bit], bit_width <= 8
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#define WRITE_RTC_REG(rtc_reg, low_bit, bit_width, value) \
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REG_WR (((rtc_reg) - DR_REG_RTCCNTL_BASE) / 4), ((low_bit) + (bit_width) - 1), (low_bit), ((value) & 0xff)
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// Read from a field in rtc_reg into R0, up to 16 bits
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#define READ_RTC_FIELD(rtc_reg, field) \
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READ_RTC_REG(rtc_reg, field ## _S, MASK_TO_WIDTH_HELPER16(field ## _V, 0))
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// Write immediate value into a field in rtc_reg, up to 8 bits
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#define WRITE_RTC_FIELD(rtc_reg, field, value) \
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WRITE_RTC_REG(rtc_reg, field ## _S, MASK_TO_WIDTH_HELPER8(field ## _V, 0), ((value) & field ## _V))
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