2018-06-11 19:54:18 +08:00
										 
									 
								 
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								menu "Driver configurations"
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											2019-01-25 17:10:53 +01:00
										 
									 
								 
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								    menu "ADC configuration"
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											2018-03-07 15:04:43 +08:00
										 
									 
								 
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											2019-01-25 17:10:53 +01:00
										 
									 
								 
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								        config ADC_FORCE_XPD_FSM
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								            bool "Use the FSM to control ADC power"
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								            default n
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								            help
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								                ADC power can be controlled by the FSM instead of software. This allows the ADC to
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								                be shut off when it is not working leading to lower power consumption. However
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								                using the FSM control ADC power will increase the noise of ADC.
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											2019-04-29 14:22:57 +02:00
										 
									 
								 
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								        config ADC_DISABLE_DAC
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								            bool "Disable DAC when ADC2 is used on GPIO 25 and 26"
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								            default y
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								            help
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											2019-04-29 14:22:57 +02:00
										 
									 
								 
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								                If this is set, the ADC2 driver will disable the output of the DAC corresponding to the specified
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								                channel. This is the default value.
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											2018-01-24 18:46:34 +08:00
										 
									 
								 
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								                For testing, disable this option so that we can measure the output of DAC by internal ADC.
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											2018-01-24 18:46:34 +08:00
										 
									 
								 
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								    endmenu  # ADC Configuration
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											2019-01-25 17:10:53 +01:00
										 
									 
								 
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								    menu "SPI configuration"
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											2019-01-25 17:10:53 +01:00
										 
									 
								 
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								        config SPI_MASTER_IN_IRAM
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								            bool "Place transmitting functions of SPI master into IRAM"
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								            default n
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								            select SPI_MASTER_ISR_IN_IRAM
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								            help
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								                Normally only the ISR of SPI master is placed in the IRAM, so that it
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								                can work without the flash when interrupt is triggered.
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								                For other functions, there's some possibility that the flash cache
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								                miss when running inside and out of SPI functions, which may increase
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								                the interval of SPI transactions.
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								                Enable this to put ``queue_trans``, ``get_trans_result`` and
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								                ``transmit`` functions into the IRAM to avoid possible cache miss.
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								                During unit test, this is enabled to measure the ideal case of api.
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								        config SPI_MASTER_ISR_IN_IRAM
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								            bool "Place SPI master ISR function into IRAM"
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								            default y
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								            help
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								                Place the SPI master ISR in to IRAM to avoid possible cache miss.
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											2018-10-23 16:57:32 +08:00
										 
									 
								 
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								                Also you can forbid the ISR being disabled during flash writing
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								                access, by add ESP_INTR_FLAG_IRAM when initializing the driver.
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											2018-06-11 19:54:18 +08:00
										 
									 
								 
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											2019-01-25 17:10:53 +01:00
										 
									 
								 
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								        config SPI_SLAVE_IN_IRAM
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								            bool "Place transmitting functions of SPI slave into IRAM"
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								            default n
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								            select SPI_SLAVE_ISR_IN_IRAM
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								            help
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								                Normally only the ISR of SPI slave is placed in the IRAM, so that it
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								                can work without the flash when interrupt is triggered.
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								                For other functions, there's some possibility that the flash cache
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								                miss when running inside and out of SPI functions, which may increase
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								                the interval of SPI transactions.
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								                Enable this to put ``queue_trans``, ``get_trans_result`` and
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								                ``transmit`` functions into the IRAM to avoid possible cache miss.
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											2018-08-20 18:30:40 +08:00
										 
									 
								 
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											2019-01-25 17:10:53 +01:00
										 
									 
								 
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								        config SPI_SLAVE_ISR_IN_IRAM
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								            bool "Place SPI slave ISR function into IRAM"
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								            default y
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								            help
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								                Place the SPI slave ISR in to IRAM to avoid possible cache miss.
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											2018-10-23 16:57:32 +08:00
										 
									 
								 
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											2019-01-25 17:10:53 +01:00
										 
									 
								 
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								                Also you can forbid the ISR being disabled during flash writing
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								                access, by add ESP_INTR_FLAG_IRAM when initializing the driver.
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											2018-08-20 18:30:40 +08:00
										 
									 
								 
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											2019-01-25 17:10:53 +01:00
										 
									 
								 
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								    endmenu # SPI Configuration
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											2018-06-11 19:54:18 +08:00
										 
									 
								 
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								endmenu  # Driver configurations
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