2016-10-24 20:44:57 +02:00
										 
									 
								 
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								Debugging
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								=========
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											2016-08-29 16:24:22 +08:00
										 
									 
								 
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								OpenOCD setup for ESP32
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								-----------------------
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											2016-11-02 10:26:02 +08:00
										 
									 
								 
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								The ESP31 and ESP32 have two powerful Xtensa cores, allowing for a great variety of program architectures. The FreeRTOS
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											2016-11-01 15:41:10 +08:00
										 
									 
								 
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								OS that comes with ESP-IDF is capable of multi-core pre-emptive multithreading, allowing for an intuitive way of writing software. 
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											2016-08-29 16:24:22 +08:00
										 
									 
								 
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								The downside of the ease of programming is that debugging without the right tools is harder: figuring out a bug that is caused 
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											2016-11-01 15:41:10 +08:00
										 
									 
								 
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								by two threads, maybe even running simultaneously on two different CPU cores, can take a long time when all you have are printf 
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											2016-08-29 16:24:22 +08:00
										 
									 
								 
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								statements. A better and in many cases quicker way to debug such problems is by using a debugger, connected to the processors over
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								a debug port. 
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								Espressif has ported OpenOCD to support the ESP32 processor and the multicore FreeRTOS that will be the foundation of most ESP32
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								apps, and has written some tools to help with features OpenOCD does not support natively. These are all available for free, and 
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								this document describes how to install and use them.
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								JTAG adapter hardware
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								---------------------
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								You will need a JTAG adapter that is compatible with both the voltage levels on the ESP32 as well as with the OpenOCD software. 
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								The JTAG port on the ESP32 is an industry-standard JTAG port which lacks (and does not need) the TRST pin. The JTAG I/O pins
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								all are powered from the VDD_3P3_RTC pin (which normally would be powered by a 3.3V rail) so the JTAG adapter needs to be
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								able to work with JTAG pins in that voltage range. On the software side, OpenOCD supports a fair amount of JTAG adapters.
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								See http://openocd.org/doc/html/Debug-Adapter-Hardware.html for an (unfortunately slightly incomplete) list of the adapters 
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								OpenOCD works with. This page lists SWD-compatible adapters as well; take note that the ESP32 does not support SWD.
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								At Espressif, we have tested the TIAO USB Multi-protocol Adapter board as well as the Flyswatter2, which are both USB2.0 high-speed
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								devices and give a good throughput. We also tested a J-link-compatible and an EasyOpenJTAG adapter; both worked as well but are 
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								somewhat slower.
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								The minimal signalling to get a working JTAG connection are TDI, TDO, TCK, TMS and Gnd. Some JTAG debuggers also need a connection 
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											2016-08-30 11:30:03 +08:00
										 
									 
								 
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								from the ESP32 power line to a line called e.g. Vtar to set the working voltage. SRST can optionally be connected to the CH_PD of 
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											2016-08-29 16:24:22 +08:00
										 
									 
								 
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								the ESP32, although for now, support in OpenOCD for that line is pretty minimal.
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								Installing OpenOCD
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								------------------
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								The sources for the ESP32-enabled variant of OpenOCD are available from `Espressifs Github <https://github.com/espressif/openocd-esp32>`_. 
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								To download the source, use the following commands::
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											2016-10-28 22:25:14 +02:00
										 
									 
								 
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								    git clone --recursive https://github.com/espressif/openocd-esp32.git
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											2016-08-29 16:24:22 +08:00
										 
									 
								 
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								    cd openocd-esp32
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								For compilation of OpenOCD, please refer to the README, README.OSX and README.Windows file in the openocd-esp32 directory. You can skip
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								the ``make install`` step if you want.
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								Configuring the ESP32 target in OpenOCD
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								---------------------------------------
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								After OpenOCD is compiled (and optionally installed) and the JTAG adapter is connected to the ESP32 board, everything is ready to
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								invoke OpenOCD for the first time. To do this, OpenOCD needs to be told what JTAG adapter to use as well as what type of board
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								and processor the JTAG adapter is connected to. It is the easiest to do both using a configuration file. A template configuration
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								file (esp32.cfg) is included in the same directory as this file. A way to use this would be:
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								- Copy esp32.cfg to the openocd-esp32 directory
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								- Edit the copied esp32.cfg file. Most importantly, change the ``source [find interface/ftdi/tumpa.cfg]`` line to reflect the
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								  physical JTAG adapter connected.
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								- Open a terminal and ``cd`` to the openocd-esp32 directory.
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								- Run ``./src/openocd -s ./tcl -f ./esp32.cfg`` to start OpenOCD
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								You should now see something like this::
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								    user@machine:~/esp32/openocd-esp32$ ./src/openocd -s ./tcl/ -f ../openocd-esp32-tools/esp32.cfg 
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								    Open On-Chip Debugger 0.10.0-dev-00446-g6e13a97-dirty (2016-08-23-16:36)
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								    Licensed under GNU GPL v2
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								    For bug reports, read
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								    http://openocd.org/doc/doxygen/bugs.html
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								    none separate
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								    adapter speed: 200 kHz
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								    Info : clock speed 200 kHz
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								    Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
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								    Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
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								    Info : esp32.cpu0: Debug controller was reset (pwrstat=0x5F, after clear 0x0F).
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								    Info : esp32.cpu0: Core was reset (pwrstat=0x5F, after clear 0x0F).
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								- If you see an error indicating permission problems, please see the 'Permissions delegation' bit in the OpenOCD README
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								- If you see JTAG errors (...all ones/...all zeroes) please check your connections and see if everything is powered on.
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								Connecting a debugger to OpenOCD
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								--------------------------------
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											2016-08-30 11:30:03 +08:00
										 
									 
								 
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								OpenOCD should now be ready to accept gdb connections. If you have compiled the ESP32 toolchain using Crosstool-NG, or
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								if you have downloaded a precompiled toolchain from the Espressif website, you should already have xtensa-esp32-elf-gdb, 
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								a version of gdb that can be used for this. First, make sure the project you want to debug is compiled and flashed 
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											2016-11-01 15:41:10 +08:00
										 
									 
								 
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								into the ESP32's SPI flash. Then, in a different console than OpenOCD is running in, invoke gdb. For example, for the 
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											2016-08-30 11:30:03 +08:00
										 
									 
								 
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								template app, you would do this like such::
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											2016-08-29 16:24:22 +08:00
										 
									 
								 
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								    cd esp-idf-template
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								    xtensa-esp32-elf-gdb -ex 'target remote localhost:3333' ./build/app-template.elf 
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								This should give you a gdb prompt.
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								FreeRTOS support
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								----------------
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								OpenOCD has explicit support for the ESP-IDF FreeRTOS; FreeRTOS detection can be disabled in esp32.conf. When enabled,
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								gdb can see FreeRTOS tasks as threads. Viewing them all can be done using the gdb ``i threads`` command, changing
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								to a certain task is done with ``thread x``, with x being the number of the thread. All threads can be switched to
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								except for a thread actually running on the other CPU, please see ``ESP32 quirks`` for more information.
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								ESP32 quirks
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								------------
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								Normal gdb breakpoints (``b myFunction``) can only be set in IRAM, because that memory is writable. Setting these types of
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								breakpoints in code in flash will not work. Instead, use a hardware breakpoint (``hb myFunction``). The esp32 supports
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								2 hardware breakpoints. It also supports two watchpoint, so two variables can be watched for change or read by the gdb
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								command ``watch myVariable``.
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								Connecting gdb to the APP or PRO cpu happens by changing the port gdb connects to. ``target remote localhost:3333`` connects
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								to the PRO CPU, ``target remote localhost:3334`` to the APP CPU. Hardware-wise, when one CPU is halted because of debugging
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								reasons, the other one will be halted as well; resuming also happens simultaneously.
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								Because gdb only sees the system from the point of view of the selected CPU, only the FreeRTOS tasks that are suspended
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								and the task running on the CPU gdb is connected to, will be shown correctly. The task that was active on the other
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								cpu can be inspected, but its state may be wildly inconsistent.
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											2016-08-30 15:44:20 +08:00
										 
									 
								 
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								The ESP-IDF code has the option of compiling in various support options for OpenOCD: it can stop execution when the first 
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								thread is started and break the system if a panic or unhandled exception is thrown. Both options are enabled by default 
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								but can be disabled using the esp-idf configuration menu. Please see the ``make menuconfig`` menu for more details.
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											2016-08-29 16:24:22 +08:00
										 
									 
								 
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											2016-08-30 11:30:03 +08:00
										 
									 
								 
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								Normally, under OpenOCD, a board can be reset by entering 'mon reset' or 'mon reset halt' into gdb. For
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								the ESP32, these commands work more or less, but have side effects. First of all, an OpenOCD reset only
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								resets the CPU cores, not the peripherals, which may lead to undefined behaviour if software assumes the
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								after-reset state of peripherals. Secondly, 'mon reset halt' stops before FreeRTOS is initialized. 
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								OpenOCD assumes (in the default configuration, you can change this by editing esp32.cfg) a running 
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								FreeRTOS and may get confused.
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