2019-04-10 16:24:50 +08:00
										 
									 
								 
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								menu "Ethernet"
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											2019-11-14 12:03:14 +08:00
										 
									 
								 
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								    # Invisible item that is enabled if any Ethernet selection is made
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											2019-08-14 11:57:02 +10:00
										 
									 
								 
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								    config ETH_ENABLED
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								        bool
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											2019-08-13 15:11:46 +10:00
										 
									 
								 
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											2019-04-10 16:24:50 +08:00
										 
									 
								 
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								    menuconfig ETH_USE_ESP32_EMAC
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								        depends on IDF_TARGET_ESP32
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											2019-06-25 19:36:56 +08:00
										 
									 
								 
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								        bool "Support ESP32 internal EMAC controller"
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											2019-04-10 16:24:50 +08:00
										 
									 
								 
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								        default y
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											2019-08-13 15:11:46 +10:00
										 
									 
								 
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								        select ETH_ENABLED
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											2019-04-10 16:24:50 +08:00
										 
									 
								 
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								        help
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								            ESP32 integrates a 10/100M Ethernet MAC controller.
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								    if ETH_USE_ESP32_EMAC
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								        choice ETH_PHY_INTERFACE
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								            prompt "PHY interface"
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								            default ETH_PHY_INTERFACE_RMII
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								            help
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								                Select the communication interface between MAC and PHY chip.
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								            config ETH_PHY_INTERFACE_RMII
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								                bool "Reduced Media Independent Interface (RMII)"
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								        endchoice
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								        if ETH_PHY_INTERFACE_RMII
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								            choice ETH_RMII_CLK_MODE
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								                prompt "RMII clock mode"
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								                default ETH_RMII_CLK_INPUT
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								                help
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								                    Select external or internal RMII clock.
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								                config ETH_RMII_CLK_INPUT
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								                    bool "Input RMII clock from external"
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								                    help
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								                        MAC will get RMII clock from outside.
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								                        Note that ESP32 only supports GPIO0 to input the RMII clock.
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								                config ETH_RMII_CLK_OUTPUT
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								                    bool "Output RMII clock from internal"
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								                    help
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								                        ESP32 can generate RMII clock by internal APLL.
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								                        This clock can be routed to the external PHY device.
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								                        ESP32 supports to route the RMII clock to GPIO0/16/17.
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								            endchoice
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											2020-11-06 12:17:18 +08:00
										 
									 
								 
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								        endif # ETH_PHY_INTERFACE_RMII
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											2019-04-10 16:24:50 +08:00
										 
									 
								 
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								        if ETH_RMII_CLK_INPUT
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								            config ETH_RMII_CLK_IN_GPIO
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								                int
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								                range 0 0
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								                default 0
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								                help
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								                    ESP32 only supports GPIO0 to input the RMII clock.
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											2020-11-06 12:17:18 +08:00
										 
									 
								 
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								        endif # ETH_RMII_CLK_INPUT
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											2019-04-10 16:24:50 +08:00
										 
									 
								 
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								        if ETH_RMII_CLK_OUTPUT
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								            config ETH_RMII_CLK_OUTPUT_GPIO0
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								                bool "Output RMII clock from GPIO0 (Experimental!)"
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								                default n
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								                help
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								                    GPIO0 can be set to output a pre-divided PLL clock (test only!).
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								                    Enabling this option will configure GPIO0 to output a 50MHz clock.
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								                    In fact this clock doesn't have directly relationship with EMAC peripheral.
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								                    Sometimes this clock won't work well with your PHY chip. You might need to
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								                    add some extra devices after GPIO0 (e.g. inverter).
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								                    Note that outputting RMII clock on GPIO0 is an experimental practice.
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								                    If you want the Ethernet to work with WiFi, don't select GPIO0 output mode for stability.
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								            if !ETH_RMII_CLK_OUTPUT_GPIO0
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								                config ETH_RMII_CLK_OUT_GPIO
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								                    int "RMII clock GPIO number"
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								                    range 16 17
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								                    default 17
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								                    help
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								                        Set the GPIO number to output RMII Clock.
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											2020-11-06 12:17:18 +08:00
										 
									 
								 
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								            endif # !ETH_RMII_CLK_OUTPUT_GPIO0
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								        endif # ETH_RMII_CLK_OUTPUT
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											2019-04-10 16:24:50 +08:00
										 
									 
								 
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								        config ETH_DMA_BUFFER_SIZE
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								            int "Ethernet DMA buffer size (Byte)"
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								            range 256 1600
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								            default 512
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								            help
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								                Set the size of each buffer used by Ethernet MAC DMA.
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								        config ETH_DMA_RX_BUFFER_NUM
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								            int "Amount of Ethernet DMA Rx buffers"
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											2019-08-28 16:04:50 +08:00
										 
									 
								 
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								            range 3 30
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											2019-04-10 16:24:50 +08:00
										 
									 
								 
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								            default 10
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								            help
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								                Number of DMA receive buffers. Each buffer's size is ETH_DMA_BUFFER_SIZE.
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								                Larger number of buffers could increase throughput somehow.
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								        config ETH_DMA_TX_BUFFER_NUM
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								            int "Amount of Ethernet DMA Tx buffers"
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											2019-08-28 16:04:50 +08:00
										 
									 
								 
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								            range 3 30
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											2019-04-10 16:24:50 +08:00
										 
									 
								 
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								            default 10
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								            help
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								                Number of DMA transmit buffers. Each buffer's size is ETH_DMA_BUFFER_SIZE.
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								                Larger number of buffers could increase throughput somehow.
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											2021-01-28 19:10:42 +08:00
										 
									 
								 
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								        if ETH_DMA_RX_BUFFER_NUM > 15
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								            config ETH_SOFT_FLOW_CONTROL
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								                bool "Enable software flow control"
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								                default n
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								                help
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								                    Ethernet MAC engine on ESP32 doesn't feature a flow control logic.
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								                    The MAC driver can perform a software flow control if you enable this option.
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								                    Note that, if the RX buffer number is small, enabling software flow control will
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								                    cause obvious performance loss.
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								        endif
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											2023-09-01 18:27:04 +02:00
										 
									 
								 
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								        config ETH_IRAM_OPTIMIZATION
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								            bool "Enable IRAM optimization"
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								            default n
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								            help
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								                If enabled, functions related to RX/TX are placed into IRAM. It can improve Ethernet throughput.
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								                If disabled, all functions are placed into FLASH.
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											2020-11-06 12:17:18 +08:00
										 
									 
								 
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								    endif # ETH_USE_ESP32_EMAC
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											2019-06-25 19:36:56 +08:00
										 
									 
								 
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								    menuconfig ETH_USE_SPI_ETHERNET
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								        bool "Support SPI to Ethernet Module"
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								        default y
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											2019-08-13 15:11:46 +10:00
										 
									 
								 
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								        select ETH_ENABLED
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											2019-06-25 19:36:56 +08:00
										 
									 
								 
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								        help
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											2019-08-13 15:11:46 +10:00
										 
									 
								 
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								            ESP-IDF can also support some SPI-Ethernet modules.
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											2019-06-25 19:36:56 +08:00
										 
									 
								 
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								    if ETH_USE_SPI_ETHERNET
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											2019-11-14 12:03:14 +08:00
										 
									 
								 
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								        config ETH_SPI_ETHERNET_DM9051
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											2019-06-25 19:36:56 +08:00
										 
									 
								 
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								            bool "Use DM9051"
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								            help
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								                DM9051 is a fast Ethernet controller with an SPI interface.
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								                It's also integrated with a 10/100M PHY and MAC.
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											2020-11-06 12:17:18 +08:00
										 
									 
								 
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								                Select this to enable DM9051 driver.
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								        config ETH_SPI_ETHERNET_W5500
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								            bool "Use W5500 (MAC RAW)"
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								            help
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								                W5500 is a HW TCP/IP embedded Ethernet controller.
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								                TCP/IP stack, 10/100 Ethernet MAC and PHY are embedded in a single chip.
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								                However the driver in ESP-IDF only enables the RAW MAC mode,
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								                making it compatible with the software TCP/IP stack.
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								                Say yes to enable W5500 driver.
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											2021-03-01 10:39:23 +07:00
										 
									 
								 
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								        config ETH_SPI_ETHERNET_KSZ8851SNL
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								            bool "Use KSZ8851SNL"
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								            help
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								                The KSZ8851SNL is a single-chip Fast Ethernet controller consisting of
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								                a 10/100 physical layer transceiver (PHY), a MAC, and a Serial Peripheral Interface (SPI).
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								                Select this to enable KSZ8851SNL driver.
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											2020-11-06 12:17:18 +08:00
										 
									 
								 
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								    endif # ETH_USE_SPI_ETHERNET
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											2019-10-01 18:50:34 +02:00
										 
									 
								 
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								    menuconfig ETH_USE_OPENETH
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								        bool "Support OpenCores Ethernet MAC (for use with QEMU)"
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								        default n
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											2019-11-14 12:03:14 +08:00
										 
									 
								 
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								        select ETH_ENABLED
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											2019-10-01 18:50:34 +02:00
										 
									 
								 
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								        help
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								            OpenCores Ethernet MAC driver can be used when an ESP-IDF application
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								            is executed in QEMU. This driver is not supported when running on a
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								            real chip.
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								    if ETH_USE_OPENETH
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								        config ETH_OPENETH_DMA_RX_BUFFER_NUM
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								            int "Number of Ethernet DMA Rx buffers"
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								            range 1 64
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								            default 4
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								            help
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								                Number of DMA receive buffers, each buffer is 1600 bytes.
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								        config ETH_OPENETH_DMA_TX_BUFFER_NUM
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								            int "Number of Ethernet DMA Tx buffers"
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								            range 1 64
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								            default 1
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								            help
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								                Number of DMA transmit buffers, each buffer is 1600 bytes.
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											2020-11-06 12:17:18 +08:00
										 
									 
								 
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								    endif # ETH_USE_OPENETH
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											2021-12-01 09:53:25 +01:00
										 
									 
								 
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								    config ETH_TRANSMIT_MUTEX
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								        depends on ETH_ENABLED
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								        bool "Enable Transmit Mutex"
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								        default n
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								        help
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								            Prevents multiple accesses when Ethernet interface is used as shared resource and multiple
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								            functionalities might try to access it at a time.
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											2019-04-10 16:24:50 +08:00
										 
									 
								 
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								endmenu
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