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esp-idf/components/ulp/CMakeLists.txt

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CMake
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esp32c3: Misc fixes needed to build & run
2020-12-29 13:20:24 +08:00
idf_build_get_property(target IDF_TARGET)
ulp: added support to building code for riscv ULP coprocessor
2020-04-17 16:34:56 -03:00
ulp: Added ULP RISC-V support for esp32s3 This commit adds support for ULP RISC-V for esp32s3. Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2021-12-23 11:42:47 +05:30
set(srcs "")
ulp: refactor ulp component This commit refactors the ulp component. Files are now divided based on type of ulp, viz., fsm or risc-v. Files common to both are maintained in the ulp_common folder. This commit also adds menuconfig options for ULP within the ulp component instead of presenting target specific configuations for ulp.
2022-01-21 14:43:48 +05:30
set(includes "")
ulp: added sleep support for lp core Added support for running LP core while hp core sleeps, as well as waking up the hp core.
2023-03-09 14:14:09 +08:00
if(CONFIG_ULP_COPROC_TYPE_FSM OR CONFIG_SOC_RISCV_COPROC_SUPPORTED)
esp32c3: Misc fixes needed to build & run
2020-12-29 13:20:24 +08:00
ulp: Added ULP RISC-V support for esp32s3 This commit adds support for ULP RISC-V for esp32s3. Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2021-12-23 11:42:47 +05:30
list(APPEND srcs
ulp-fsm: Update ulp-fsm ADC example with S3 support Closes https://github.com/espressif/esp-idf/issues/7963
2022-09-02 16:18:14 +08:00
"ulp_common/ulp_common.c"
"ulp_common/ulp_adc.c")
ulp: refactor ulp component This commit refactors the ulp component. Files are now divided based on type of ulp, viz., fsm or risc-v. Files common to both are maintained in the ulp_common folder. This commit also adds menuconfig options for ULP within the ulp component instead of presenting target specific configuations for ulp.
2022-01-21 14:43:48 +05:30
list(APPEND includes
ulp_common/include
ulp_common/include/${target})
if(CONFIG_ULP_COPROC_TYPE_FSM)
list(APPEND srcs
"ulp_fsm/ulp.c"
"ulp_fsm/ulp_macro.c")
list(APPEND includes
ulp: Added support for ULP FSM on esp32s3 and fixed bugs for esp32s2 This commit enables ULP FSM support for esp32s3 and updates ULP FSM code flow for other chips. It adds C Macro support for the ULP FSM instruction set on esp32s2 and esp32s3. The unit tests are also updated to test ULP FSM on ep32s2 and esp32s3.
2022-02-17 11:44:34 +05:30
ulp_fsm/include
ulp_fsm/include/${target})
ulp: added support to building code for riscv ULP coprocessor
2020-04-17 16:34:56 -03:00
ulp: refactor ulp component This commit refactors the ulp component. Files are now divided based on type of ulp, viz., fsm or risc-v. Files common to both are maintained in the ulp_common folder. This commit also adds menuconfig options for ULP within the ulp component instead of presenting target specific configuations for ulp.
2022-01-21 14:43:48 +05:30
elseif(CONFIG_ULP_COPROC_TYPE_RISCV)
ulp: Added ULP RISC-V support for esp32s3 This commit adds support for ULP RISC-V for esp32s3. Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2021-12-23 11:42:47 +05:30
list(APPEND srcs
ulp-riscv: add support for using ADC as well as an example show-casing it.
2022-02-28 18:12:28 +08:00
"ulp_riscv/ulp_riscv.c"
ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP.
2022-08-03 13:59:44 +08:00
"ulp_riscv/ulp_riscv_lock.c"
ulp: Added support for RTC I2C driver for ULP RISC-V on esp32s2 and esp32s3 This commit adds support for using the RTC I2C peripheral on the ULP RISC-V core for esp32s2 and esp32s3. It also adds an example to demonstrate the usage of the RTC I2C peripheral. This commit also modifies the rtc_i2c register structure files to enable the use of bitfields in the ULP RISC-V RTC I2C driver.
2022-08-09 15:46:14 +02:00
"ulp_riscv/ulp_riscv_i2c.c")
ulp: refactor ulp component This commit refactors the ulp component. Files are now divided based on type of ulp, viz., fsm or risc-v. Files common to both are maintained in the ulp_common folder. This commit also adds menuconfig options for ULP within the ulp component instead of presenting target specific configuations for ulp.
2022-01-21 14:43:48 +05:30
list(APPEND includes
ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP.
2022-08-03 13:59:44 +08:00
ulp_riscv/include
ulp_riscv/shared/include)
ulp: Added ULP RISC-V support for esp32s3 This commit adds support for ULP RISC-V for esp32s3. Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2021-12-23 11:42:47 +05:30
endif()
esp32c3: Misc fixes needed to build & run
2020-12-29 13:20:24 +08:00
endif()
ulp: Added ULP RISC-V support for esp32s3 This commit adds support for ULP RISC-V for esp32s3. Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2021-12-23 11:42:47 +05:30
ulp: added basic support for building and running a binary in the lp core
2023-02-27 17:03:42 +08:00
if(CONFIG_ULP_COPROC_TYPE_LP_CORE)
list(APPEND includes
ulp_common/include
ulp_common/include/${target})
list(APPEND srcs
"lp_core/lp_core.c")
list(APPEND includes
"lp_core/include")
endif()
ulp: Added ULP RISC-V support for esp32s3 This commit adds support for ULP RISC-V for esp32s3. Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2021-12-23 11:42:47 +05:30
idf_component_register(SRCS ${srcs}
ulp-riscv: add support for using ADC as well as an example show-casing it.
2022-02-28 18:12:28 +08:00
INCLUDE_DIRS ${includes}
esp_adc: new esp_adc component and adc drivers
2022-07-15 12:52:44 +08:00
REQUIRES driver esp_adc)
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