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										 |  |  | // Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
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							|  |  |  | //
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							|  |  |  | // Licensed under the Apache License, Version 2.0 (the "License");
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							|  |  |  | // you may not use this file except in compliance with the License.
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							|  |  |  | // You may obtain a copy of the License at
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							|  |  |  | //     http://www.apache.org/licenses/LICENSE-2.0
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							|  |  |  | //
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							|  |  |  | // Unless required by applicable law or agreed to in writing, software
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							|  |  |  | // distributed under the License is distributed on an "AS IS" BASIS,
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							|  |  |  | // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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							|  |  |  | // See the License for the specific language governing permissions and
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							|  |  |  | // limitations under the License.
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							|  |  |  | #ifndef _SOC_CPU_H
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							|  |  |  | #define _SOC_CPU_H
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										 |  |  | #include <stdint.h>
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							|  |  |  | #include <stdbool.h>
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							|  |  |  | #include <stddef.h>
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										 |  |  | #include "xtensa/corebits.h"
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							|  |  |  | /* C macros for xtensa special register read/write/exchange */ | 
					
						
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							|  |  |  | #define RSR(reg, curval)  asm volatile ("rsr %0, " #reg : "=r" (curval));
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							|  |  |  | #define WSR(reg, newval)  asm volatile ("wsr %0, " #reg : : "r" (newval));
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							|  |  |  | #define XSR(reg, swapval) asm volatile ("xsr %0, " #reg : "+r" (swapval));
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							|  |  |  | /* Return true if the CPU is in an interrupt context
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							|  |  |  |    (PS.UM == 0) | 
					
						
							|  |  |  | */ | 
					
						
							|  |  |  | static inline bool cpu_in_interrupt_context(void) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     uint32_t ps; | 
					
						
							|  |  |  |     RSR(PS, ps); | 
					
						
							|  |  |  |     return (ps & PS_UM) == 0; | 
					
						
							|  |  |  | } | 
					
						
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										 |  |  | /* Functions to set page attributes for Region Protection option in the CPU.
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							|  |  |  |  * See Xtensa ISA Reference manual for explanation of arguments (section 4.6.3.2). | 
					
						
							|  |  |  |  */ | 
					
						
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							|  |  |  | static inline void cpu_write_dtlb(uint32_t vpn, unsigned attr) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     asm volatile ("wdtlb  %1, %0; dsync\n" :: "r" (vpn), "r" (attr)); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | static inline void cpu_write_itlb(unsigned vpn, unsigned attr) | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     asm volatile ("witlb  %1, %0; isync\n" :: "r" (vpn), "r" (attr)); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | /* Make page 0 access raise an exception.
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							|  |  |  |  * Also protect some other unused pages so we can catch weirdness. | 
					
						
							|  |  |  |  * Useful attribute values: | 
					
						
							|  |  |  |  * 0 — cached, RW | 
					
						
							|  |  |  |  * 2 — bypass cache, RWX (default value after CPU reset) | 
					
						
							|  |  |  |  * 15 — no access, raise exception | 
					
						
							|  |  |  |  */ | 
					
						
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							|  |  |  | static inline void cpu_configure_region_protection() | 
					
						
							|  |  |  | { | 
					
						
							|  |  |  |     const uint32_t pages_to_protect[] = {0x00000000, 0x80000000, 0xa0000000, 0xc0000000, 0xe0000000}; | 
					
						
							|  |  |  |     for (int i = 0; i < sizeof(pages_to_protect)/sizeof(pages_to_protect[0]); ++i) { | 
					
						
							|  |  |  |         cpu_write_dtlb(pages_to_protect[i], 0xf); | 
					
						
							|  |  |  |         cpu_write_itlb(pages_to_protect[i], 0xf); | 
					
						
							|  |  |  |     } | 
					
						
							|  |  |  |     cpu_write_dtlb(0x20000000, 0); | 
					
						
							|  |  |  |     cpu_write_itlb(0x20000000, 0); | 
					
						
							|  |  |  | } | 
					
						
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							|  |  |  | /*
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							|  |  |  |  * @brief Set CPU frequency to the value defined in menuconfig | 
					
						
							|  |  |  |  * | 
					
						
							|  |  |  |  * Called from cpu_start.c, not intended to be called from other places. | 
					
						
							|  |  |  |  * This is a temporary function which will be replaced once dynamic | 
					
						
							|  |  |  |  * CPU frequency changing is implemented. | 
					
						
							|  |  |  |  */ | 
					
						
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										 |  |  | void esp_set_cpu_freq(void); | 
					
						
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										 |  |  | #endif
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